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Elphel
x393
Commits
df06bda0
Commit
df06bda0
authored
Jan 22, 2021
by
Andrey Filippov
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fixed hargs-boson to load correct bit file
parent
6e111056
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py393/hargs-boson
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df06bda0
...
@@ -3,8 +3,8 @@
...
@@ -3,8 +3,8 @@
-f /usr/local/verilog/x393_parameters.vh /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh
-f /usr/local/verilog/x393_parameters.vh /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh
-l /usr/local/verilog/x393_cur_params_target.vh
-l /usr/local/verilog/x393_cur_params_target.vh
-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle
-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle
-c bitstream_set_path /usr/local/verilog/x393_
vospi
.bit
-c bitstream_set_path /usr/local/verilog/x393_
boson
.bit
-c setupSensorsPower "BOSON" all 0 0.1
-c setupSensorsPower "BOSON" all 0 0.1
-c measure_all "*DI"
-c measure_all "*DI"
-c setSensorClock 24.0 "
2V5
_LVDS"
-c setSensorClock 24.0 "
1V8
_LVDS"
-c set_rtc
-c set_rtc
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