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Elphel
x393
Commits
6e111056
Commit
6e111056
authored
Jan 21, 2021
by
Andrey Filippov
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adding boson
parent
c4b3e834
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Makefile
Makefile
+2
-0
hargs-boson
py393/hargs-boson
+10
-0
hargs-post-boson
py393/hargs-post-boson
+8
-0
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Makefile
View file @
6e111056
...
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@@ -26,6 +26,8 @@ COMMAND_FILES = py393/hargs \
py393/hargs-hispi
\
py393/hargs-vospi
\
py393/hargs-post-vospi
\
py393/hargs-boson
\
py393/hargs-post-boson
\
py393/hargs-post-par12
\
py393/hargs-power_par12
\
py393/hargs-power-eyesis
\
...
...
py393/hargs-boson
0 → 100644
View file @
6e111056
-d TARGET_MODE=1
-f /usr/local/verilog/system_defines.vh
-f /usr/local/verilog/x393_parameters.vh /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh
-l /usr/local/verilog/x393_cur_params_target.vh
-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle
-c bitstream_set_path /usr/local/verilog/x393_vospi.bit
-c setupSensorsPower "BOSON" all 0 0.1
-c measure_all "*DI"
-c setSensorClock 24.0 "2V5_LVDS"
-c set_rtc
py393/hargs-post-boson
0 → 100644
View file @
6e111056
-d TARGET_MODE=1
-f /usr/local/verilog/system_defines.vh
-f /usr/local/verilog/x393_parameters.vh /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh
-l /usr/local/verilog/x393_cur_params_target.vh
-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle
-c bitstream_set_path /usr/local/verilog/x393_boson.bit
-c specify_phys_memory
-i
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