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Elphel
x393
Commits
93e8aa42
Commit
93e8aa42
authored
Jul 06, 2015
by
Andrey Filippov
Browse files
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Plain Diff
Fixed teplate error in the headers
parent
428053b8
Changes
109
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109 changed files
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109 additions
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109 deletions
+109
-109
cmprs_afi_mux.v
axi/cmprs_afi_mux.v
+1
-1
cmprs_afi_mux_ptr.v
axi/cmprs_afi_mux_ptr.v
+1
-1
cmprs_afi_mux_ptr_wresp.v
axi/cmprs_afi_mux_ptr_wresp.v
+1
-1
cmprs_afi_mux_status.v
axi/cmprs_afi_mux_status.v
+1
-1
membridge.v
axi/membridge.v
+1
-1
axi_hp_clk.v
axi_hp_clk.v
+1
-1
cmd_mux.v
cmd_mux.v
+1
-1
cmd_readback.v
cmd_readback.v
+1
-1
cmprs_buf_average.v
compressor_jp/cmprs_buf_average.v
+1
-1
cmprs_cmd_decode.v
compressor_jp/cmprs_cmd_decode.v
+1
-1
cmprs_frame_sync.v
compressor_jp/cmprs_frame_sync.v
+1
-1
cmprs_macroblock_buf_iface.v
compressor_jp/cmprs_macroblock_buf_iface.v
+1
-1
cmprs_out_fifo.v
compressor_jp/cmprs_out_fifo.v
+1
-1
cmprs_pixel_buf_iface.v
compressor_jp/cmprs_pixel_buf_iface.v
+1
-1
cmprs_status.v
compressor_jp/cmprs_status.v
+1
-1
cmprs_tile_mode2_decode.v
compressor_jp/cmprs_tile_mode2_decode.v
+1
-1
cmprs_tile_mode_decode.v
compressor_jp/cmprs_tile_mode_decode.v
+1
-1
color_proc393.v
compressor_jp/color_proc393.v
+1
-1
csconvert.v
compressor_jp/csconvert.v
+1
-1
csconvert_jp4.v
compressor_jp/csconvert_jp4.v
+1
-1
csconvert_jp4diff.v
compressor_jp/csconvert_jp4diff.v
+1
-1
csconvert_mono.v
compressor_jp/csconvert_mono.v
+1
-1
dcc_sync393.v
compressor_jp/dcc_sync393.v
+1
-1
jp_channel.v
compressor_jp/jp_channel.v
+1
-1
x393_cur_params_target.vh
includes/x393_cur_params_target.vh
+1
-1
x393_localparams.vh
includes/x393_localparams.vh
+1
-1
x393_mcontr_encode_cmd.vh
includes/x393_mcontr_encode_cmd.vh
+1
-1
x393_parameters.vh
includes/x393_parameters.vh
+1
-1
x393_simulation_parameters.vh
includes/x393_simulation_parameters.vh
+1
-1
x393_tasks01.vh
includes/x393_tasks01.vh
+1
-1
x393_tasks_afi.vh
includes/x393_tasks_afi.vh
+1
-1
x393_tasks_mcntrl_buffers.vh
includes/x393_tasks_mcntrl_buffers.vh
+1
-1
x393_tasks_mcntrl_en_dis_priority.vh
includes/x393_tasks_mcntrl_en_dis_priority.vh
+1
-1
x393_tasks_mcntrl_timing.vh
includes/x393_tasks_mcntrl_timing.vh
+1
-1
x393_tasks_pio_sequences.vh
includes/x393_tasks_pio_sequences.vh
+1
-1
x393_tasks_ps_pio.vh
includes/x393_tasks_ps_pio.vh
+1
-1
x393_tasks_status.vh
includes/x393_tasks_status.vh
+1
-1
cmd_encod_4mux.v
memctrl/cmd_encod_4mux.v
+1
-1
cmd_encod_linear_mux.v
memctrl/cmd_encod_linear_mux.v
+1
-1
cmd_encod_linear_rd.v
memctrl/cmd_encod_linear_rd.v
+1
-1
cmd_encod_linear_rw.v
memctrl/cmd_encod_linear_rw.v
+1
-1
cmd_encod_linear_wr.v
memctrl/cmd_encod_linear_wr.v
+1
-1
cmd_encod_tiled_32_rd.v
memctrl/cmd_encod_tiled_32_rd.v
+1
-1
cmd_encod_tiled_32_rw.v
memctrl/cmd_encod_tiled_32_rw.v
+1
-1
cmd_encod_tiled_32_wr.v
memctrl/cmd_encod_tiled_32_wr.v
+1
-1
cmd_encod_tiled_mux.v
memctrl/cmd_encod_tiled_mux.v
+1
-1
cmd_encod_tiled_rd.v
memctrl/cmd_encod_tiled_rd.v
+1
-1
cmd_encod_tiled_rw.v
memctrl/cmd_encod_tiled_rw.v
+1
-1
cmd_encod_tiled_wr.v
memctrl/cmd_encod_tiled_wr.v
+1
-1
mcntrl393.v
memctrl/mcntrl393.v
+1
-1
mcntrl393_test01.v
memctrl/mcntrl393_test01.v
+1
-1
mcntrl_1kx32r.v
memctrl/mcntrl_1kx32r.v
+1
-1
mcntrl_1kx32w.v
memctrl/mcntrl_1kx32w.v
+1
-1
mcntrl_buf_rd.v
memctrl/mcntrl_buf_rd.v
+1
-1
mcntrl_buf_wr.v
memctrl/mcntrl_buf_wr.v
+1
-1
mcntrl_linear_rw.v
memctrl/mcntrl_linear_rw.v
+1
-1
mcntrl_ps_pio.v
memctrl/mcntrl_ps_pio.v
+1
-1
mcntrl_tiled_rw.v
memctrl/mcntrl_tiled_rw.v
+1
-1
memctrl16.v
memctrl/memctrl16.v
+1
-1
scheduler16.v
memctrl/scheduler16.v
+1
-1
histogram_saxi.v
sensor/histogram_saxi.v
+1
-1
pxd_clock.v
sensor/pxd_clock.v
+1
-1
pxd_single.v
sensor/pxd_single.v
+1
-1
sens_gamma.v
sensor/sens_gamma.v
+1
-1
sens_histogram.v
sensor/sens_histogram.v
+1
-1
sens_histogram_mux.v
sensor/sens_histogram_mux.v
+1
-1
sens_parallel12.v
sensor/sens_parallel12.v
+1
-1
sensor_channel.v
sensor/sensor_channel.v
+1
-1
sensor_fifo.v
sensor/sensor_fifo.v
+1
-1
sensor_i2c.v
sensor/sensor_i2c.v
+1
-1
sensor_i2c_io.v
sensor/sensor_i2c_io.v
+1
-1
simul_axi_hp_rd.v
simulation_modules/simul_axi_hp_rd.v
+1
-1
simul_axi_hp_wr.v
simulation_modules/simul_axi_hp_wr.v
+1
-1
status_read.v
status_read.v
+1
-1
rtc393.v
timing/rtc393.v
+1
-1
timestamp_fifo.v
timing/timestamp_fifo.v
+1
-1
timestamp_snapshot.v
timing/timestamp_snapshot.v
+1
-1
timestamp_to_parallel.v
timing/timestamp_to_parallel.v
+1
-1
timestamp_to_serial.v
timing/timestamp_to_serial.v
+1
-1
timing393.v
timing/timing393.v
+1
-1
clk_to_clk2x.v
util_modules/clk_to_clk2x.v
+1
-1
cmd_deser.v
util_modules/cmd_deser.v
+1
-1
cmd_frame_sequencer.v
util_modules/cmd_frame_sequencer.v
+1
-1
cmd_seq_mux.v
util_modules/cmd_seq_mux.v
+1
-1
fifo_2regs.v
util_modules/fifo_2regs.v
+1
-1
index_max_16.v
util_modules/index_max_16.v
+1
-1
masked_max_reg.v
util_modules/masked_max_reg.v
+1
-1
mcont_common_chnbuf_reg.v
util_modules/mcont_common_chnbuf_reg.v
+1
-1
mcont_from_chnbuf_reg.v
util_modules/mcont_from_chnbuf_reg.v
+1
-1
mcont_to_chnbuf_reg.v
util_modules/mcont_to_chnbuf_reg.v
+1
-1
multipulse_cross_clock.v
util_modules/multipulse_cross_clock.v
+1
-1
pri1hot16.v
util_modules/pri1hot16.v
+1
-1
pulse_cross_clock.v
util_modules/pulse_cross_clock.v
+1
-1
status_generate.v
util_modules/status_generate.v
+1
-1
status_router16.v
util_modules/status_router16.v
+1
-1
status_router2.v
util_modules/status_router2.v
+1
-1
status_router4.v
util_modules/status_router4.v
+1
-1
status_router8.v
util_modules/status_router8.v
+1
-1
table_ad_receive.v
util_modules/table_ad_receive.v
+1
-1
table_ad_transmit.v
util_modules/table_ad_transmit.v
+1
-1
ddr3_wrap.v
wrap/ddr3_wrap.v
+1
-1
iobuf.v
wrap/iobuf.v
+1
-1
mpullup.v
wrap/mpullup.v
+1
-1
oddr_ss.v
wrap/oddr_ss.v
+1
-1
ram18_var_w_var_r.v
wrap/ram18_var_w_var_r.v
+1
-1
ramt_var_w_var_r.v
wrap/ramt_var_w_var_r.v
+1
-1
ramtp_var_w_var_r.v
wrap/ramtp_var_w_var_r.v
+1
-1
x393.v
x393.v
+1
-1
x393_testbench01.tf
x393_testbench01.tf
+1
-1
No files found.
axi/cmprs_afi_mux.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Writes comressor data from up to 4 channels to system memory over AXI_HP
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmprs_afi_mux.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
axi/cmprs_afi_mux_ptr.v
View file @
93e8aa42
...
...
@@ -5,7 +5,7 @@
* Description: Maintain 4-channel chunk pointers (before AXI)
* Advance 32-byte chunk pointers for each AXI burst and each frame (4*2=8 pointers)
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmprs_afi_mux_ptr.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
axi/cmprs_afi_mux_ptr_wresp.v
View file @
93e8aa42
...
...
@@ -5,7 +5,7 @@
* Description: Maintain 4-channel chunk pointers for wrirte response
* Advance 32-byte chunk pointers for each AXI burst and each frame (4*2=8 pointers)
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmprs_afi_mux_ptr_wresp.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
axi/cmprs_afi_mux_status.v
View file @
93e8aa42
...
...
@@ -8,7 +8,7 @@
* and the same for the write response channel (confirmed written to the system
* memory
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmprs_afi_mux_status.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
axi/membridge.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: bi-directional bridge between system and video memory over axi_hp
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* membridge.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
axi_hp_clk.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Generate global clock for axi_hp
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* axi_hp_clk.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
cmd_mux.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Command multiplexer between AXI and frame-based command sequencer
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmd_mux.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
cmd_readback.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Store control register data and readback
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmd_readback.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/cmprs_buf_average.v
View file @
93e8aa42
...
...
@@ -6,7 +6,7 @@
* during write, then subtracts them during read and provides to
* the after DCT to restore DC
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmprs_buf_average.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/cmprs_cmd_decode.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Decode compressor command/modes, reclock some signals
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmprs_cmd_decode.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/cmprs_frame_sync.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Synchronizes memory channels (sensor and compressor)
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmprs_frame_sync.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/cmprs_macroblock_buf_iface.v
View file @
93e8aa42
...
...
@@ -6,7 +6,7 @@
* stream matching selected color mode, accommodates for the buffer latency,
* acts as a pacemaker for the whole compressor (next stages are able to keep up).
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmprs_macroblock_buf_iface.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/cmprs_out_fifo.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Compressor output FIFO
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmprs_out_fifo.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/cmprs_pixel_buf_iface.v
View file @
93e8aa42
...
...
@@ -6,7 +6,7 @@
* stream matching selected color mode, accommodates for the buffer latency,
* acts as a pacemaker for the whole compressor (next stages are able to keep up).
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmprs_pixel_buf_iface.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/cmprs_status.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Generate compressor status word
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmprs_status.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/cmprs_tile_mode2_decode.v
View file @
93e8aa42
...
...
@@ -5,7 +5,7 @@
* Description: Decode mode parameters, registered at pre-start of the macroblock
* data to color conversion module
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmprs_tile_mode2_decode.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/cmprs_tile_mode_decode.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Decode tile/macroblocks parameters from compressor type
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmprs_tile_mode_decode.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/color_proc393.v
View file @
93e8aa42
...
...
@@ -5,7 +5,7 @@
* Description: Color processor for JPEG 4:2:0/JP4
* Updating from the earlier 2002-2010 version
*
* Copyright (c) 2002-2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2002-2015
Elphel, Inc
.
* color_proc393.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/csconvert.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Color space convert: combine differnt color modes
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* csconvert.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/csconvert_jp4.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Color conversion for JP4 mode
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* csconvert_jp4.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/csconvert_jp4diff.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Color conversion for JP4 differential
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* csconvert_jp4diff.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/csconvert_mono.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Convert JPEG monochrome
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* csconvert_mono.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/dcc_sync393.v
View file @
93e8aa42
...
...
@@ -6,7 +6,7 @@
* Syncronizes dcc data with dma1 output, adds 16..31 16-bit zero words for Axis DMA
* Was not used in late NC353 camera (DMA channel used fro IMU logger)
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* dcc_sync393.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
compressor_jp/jp_channel.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Top module of JPEG/JP4 compressor channel
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* jp_channel.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
includes/x393_cur_params_target.vh
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Memory controller parameters that need adjustment during training
* Target ,pde
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* x393_cur_params_target.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
includes/x393_localparams.vh
View file @
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...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Local parameters for simulation of the x393
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* x393_localparams.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
includes/x393_mcontr_encode_cmd.vh
View file @
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...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Functions used to encode memory controller sequences
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* x393_mcontr_encode_cmd.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
includes/x393_parameters.vh
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Parameters for the x393 (simulation and implementation)
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* x393_parameters.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
includes/x393_simulation_parameters.vh
View file @
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...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Simulation-specific parameters for the x393
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* x393_simulation_parameters.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
includes/x393_tasks01.vh
View file @
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...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Simulation tasks for the x393 (low level)
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* x393_tasks01.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
includes/x393_tasks_afi.vh
View file @
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...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Simulation tasks for the AXI_HP (AFI)
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* x393_tasks_afi.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
includes/x393_tasks_mcntrl_buffers.vh
View file @
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...
...
@@ -5,7 +5,7 @@
* Description: Simulation tasks for software reading/writing (with test patterns)
* of the block buffers.
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* x393_tasks_mcntrl_buffers.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
includes/x393_tasks_mcntrl_en_dis_priority.vh
View file @
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...
...
@@ -5,7 +5,7 @@
* Description: Simulation tasks for software reading/writing (with test patterns)
* of the block buffers.
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* x393_tasks_mcntrl_en_dis_priority.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
includes/x393_tasks_mcntrl_timing.vh
View file @
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...
...
@@ -5,7 +5,7 @@
* Description: Simulation tasks for programming I/O delays and other timing
* parameters in the memory controller
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* x393_tasks_mcntrl_timing.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
includes/x393_tasks_pio_sequences.vh
View file @
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...
...
@@ -5,7 +5,7 @@
* Description: Simulation tasks for programming memory transaction
* sequences (controlles by PS)
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* x393_tasks_pio_sequences.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
includes/x393_tasks_ps_pio.vh
View file @
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...
...
@@ -5,7 +5,7 @@
* Description: Simulation tasks for mcntrl_ps_pio module (launching software
* - programmed memory transaction sequences)
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* x393_tasks_ps_pio.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
includes/x393_tasks_status.vh
View file @
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...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Simulation tasks for the x393 related to status
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* x393_status.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/cmd_encod_4mux.v
View file @
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...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: 4-to-1 mux to cmbine memory sequences sources
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmd_encod_4mux.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/cmd_encod_linear_mux.v
View file @
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...
...
@@ -6,7 +6,7 @@
* linear command encoders (cmd_encod_linear_rd and cmd_encod_linear_wr)
* Latency 1 clcok cycle
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmd_encod_linear_mux.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/cmd_encod_linear_rd.v
View file @
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...
...
@@ -5,7 +5,7 @@
* Description: Command sequencer generator for reading a sequential up to 1KB page
* single page access, bank and row will not be changed
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmd_encod_linear_rd.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/cmd_encod_linear_rw.v
View file @
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...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Combining 2 modules:cmd_encod_linear_rd and cmd_encod_linear_wr
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmd_encod_linear_rw.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/cmd_encod_linear_wr.v
View file @
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...
...
@@ -5,7 +5,7 @@
* Description: Command sequencer generator for writing a sequential up to 1KB page
* single page access, bank and row will not be changed
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmd_encod_linear_wr.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/cmd_encod_tiled_32_rd.v
View file @
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...
...
@@ -10,7 +10,7 @@
* just reading 32 bytes per row instead of the 16 - that eases timing
* Start burst should be even (LSB is ignored)
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmd_encod_tiled_32_rd.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/cmd_encod_tiled_32_rw.v
View file @
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...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Combines cmd_encod_tiled_32_rd and cmd_encod_tiled_32_wr modules
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmd_encod_tiled_32_rw.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/cmd_encod_tiled_32_wr.v
View file @
93e8aa42
...
...
@@ -10,7 +10,7 @@
* just writing 32 bytes per row instead of the 16 - that eases timing
* Start burst should be even (LSB is ignored)
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmd_encod_tiled_32_wr.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/cmd_encod_tiled_mux.v
View file @
93e8aa42
...
...
@@ -6,7 +6,7 @@
* tiled command encoders (cmd_encod_tiled_rd and cmd_encod_tiled_wr)
* Latency 1 clcok cycle
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmd_encod_tiled_mux.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/cmd_encod_tiled_rd.v
View file @
93e8aa42
...
...
@@ -12,7 +12,7 @@
* if number of rows >=8, that port is ignored. If number of rows is less than
* 5 (less for slower clock) without keep_open_in tRTP may be not matched.
* Seems that actual tile heigt mod 8 should be only 0, 6 or7
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmd_encod_tiled_rd.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/cmd_encod_tiled_rw.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Combines cmd_encod_tiled_rd and cmd_encod_tiled_wr modules
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmd_encod_tiled_rw.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/cmd_encod_tiled_wr.v
View file @
93e8aa42
...
...
@@ -12,7 +12,7 @@
* if number of rows >=8, that port is ignored. If number of rows is less than
* 5 (less for slower clock) without keep_open_in tRTP may be not matched.
* Seems that actual tile heigt mod 8 should be only 0, 6 or7
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* cmd_encod_tiled_wr.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/mcntrl393.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Top level memory controller for 393 camera, includes channel buffers
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* mcntrl393.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/mcntrl393_test01.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Temporary module to interface mcntrl393 control signals
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* mcntrl393_test01.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/mcntrl_1kx32r.v
View file @
93e8aa42
...
...
@@ -5,7 +5,7 @@
* Description: Paged buffer for ddr3 controller read channel
* with address autoincrement. 32 bit external data.
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* mcntrl_1kx32r.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/mcntrl_1kx32w.v
View file @
93e8aa42
...
...
@@ -5,7 +5,7 @@
* Description: Paged buffer for ddr3 controller write channel
* with address autoincrement. 32 bit external data. Extends rd to regen
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* mcntrl_1kx32w.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/mcntrl_buf_rd.v
View file @
93e8aa42
...
...
@@ -5,7 +5,7 @@
* Description: Paged buffer for ddr3 controller read channel
* with address autoincrement. Variable width external data
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* mcntrl_buf_rd.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/mcntrl_buf_wr.v
View file @
93e8aa42
...
...
@@ -5,7 +5,7 @@
* Description: Paged buffer for ddr3 controller write channel
* with address autoincrement. 32 bit external data. Extends rd to regen
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* mcntrl_buf_wr.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/mcntrl_linear_rw.v
View file @
93e8aa42
...
...
@@ -5,7 +5,7 @@
* Description: Organize paged R/W from DDR3 memory in scan-line order
* with window support
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* mcntrl_linear_rw.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/mcntrl_ps_pio.v
View file @
93e8aa42
...
...
@@ -5,7 +5,7 @@
* Description: Read/write channels to DDR3 memory with software-programmable
* command sequence
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* mcntrl_ps_pio.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/mcntrl_tiled_rw.v
View file @
93e8aa42
...
...
@@ -7,7 +7,7 @@
* Tiles spreading over two different frames is not yet supported (needed for
* line-scan mode in JPEG (JP4 - OK)
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* mcntrl_tiled_rw.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/memctrl16.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: 16-channel memory controller
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* memctrl16.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
memctrl/scheduler16.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: 16-channel programmable DDR memory access scheduler
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* scheduler16.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
sensor/histogram_saxi.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Histograms transfer to the system memory over S_AXI
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* histogram_saxi.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
sensor/pxd_clock.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: pixel clock line input
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* pxd_clock.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
sensor/pxd_single.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: pixel data line input
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* pxd_single.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
sensor/sens_gamma.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: table based piecewise-linear conversion of 16 -> 8 bit data
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* sens_gamma.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
sensor/sens_histogram.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Calculates per-color histogram over the specified rectangular region
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* sens_histogram.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
sensor/sens_histogram_mux.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Readout multiplexer for 4 histogram modules
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* sens_histogram_mux.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
sensor/sens_parallel12.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Sensor interface with 12-bit for parallel bus
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* sens_parallel12.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
...
...
sensor/sensor_channel.v
View file @
93e8aa42
...
...
@@ -4,7 +4,7 @@
* Author: andrey
* Description: Top module for a sensor channel
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* sensor_channel.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
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sensor/sensor_fifo.v
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93e8aa42
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@@ -4,7 +4,7 @@
* Author: andrey
* Description: Cross clock boundary for sensor data, synchronize to HACT
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* sensor_fifo.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
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sensor/sensor_i2c.v
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93e8aa42
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@@ -4,7 +4,7 @@
* Author: andrey
* Description: i2c write-only sequencer to control image sensor
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* sensor_i2c.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
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sensor/sensor_i2c_io.v
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@@ -4,7 +4,7 @@
* Author: andrey
* Description: sensor_i2c with I/O pad elements
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* sensor_i2c_io.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
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simulation_modules/simul_axi_hp_rd.v
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93e8aa42
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@@ -4,7 +4,7 @@
* Author: andrey
* Description: Simplified model of AXI_HP read channel (64-bit only)
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* simul_axi_hp_rd.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
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simulation_modules/simul_axi_hp_wr.v
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93e8aa42
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@@ -4,7 +4,7 @@
* Author: andrey
* Description: Simplified model of AXI_HP write channel (64-bit only)
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* simul_axi_hp_wr.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
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status_read.v
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93e8aa42
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@@ -12,7 +12,7 @@
* sequence number to use just 2-byte packets?
* TODO: add interrupt capabilities
*
* Copyright (c) 2015
<set up in Preferences-Verilog/VHDL Editor-Templates>
.
* Copyright (c) 2015
Elphel, Inc
.
* status_read.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
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timing/rtc393.v
View file @
93e8aa42