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  • Andrey Filippov's avatar
    troubleshooting lack of DONE during loading of the bitfile · cd3ccb58
    Andrey Filippov authored Jun 07, 2014
    cd3ccb58
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com.elphel.vdt.FPGA_project.prefs Loading commit data...
com.elphel.vdt.ISExst.prefs Loading commit data...
com.elphel.vdt.VivadoBitstream.prefs Loading commit data...
com.elphel.vdt.VivadoPlace.prefs Loading commit data...
com.elphel.vdt.VivadoSynthesis.prefs Loading commit data...
com.elphel.vdt.VivadoTimimgSummaryReportSynthesis.prefs Loading commit data...
com.elphel.vdt.VivadoTimingReportSynthesis.prefs Loading commit data...
com.elphel.vdt.iverilog.prefs Loading commit data...
com.elphel.vdt.prefs Loading commit data...