Programming languages used in this repository

  •   Verilog
    56.26 %
  •   SystemVerilog
    16.12 %
  •   Python
    14.2 %
  •   HCL
    13.42 %

Commit statistics for master Apr 25 - Oct 12

  • Total: 84 commits
  • Average per day: 0 commits
  • Authors: 2

Commits per day of month

Commits per weekday

Commits per day hour (UTC)