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Elphel
x393
Repository
7a0b9347ebe85eba48e76421255943ee5a8e77d9
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x393
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testing hardware, adding related code
· 7a0b9347
Andrey Filippov
authored
9 years ago
7a0b9347
Name
Last commit
Last update
.settings
testing hardware, adding related code
9 years ago
axi
working on synthesis with Vivado tools
9 years ago
ddr3
debugging/simulation
9 years ago
docs
Description of the memory controller clocks and programmable delays
9 years ago
hardware_tests
eye pattern tests at 400MHz
10 years ago
includes
testing hardware, adding related code
9 years ago
memctrl
porting delay scan/adjustment functions from the eddr3 Python code
9 years ago
py393
testing hardware, adding related code
9 years ago
python
code to align bit delays on random data
10 years ago
simulation_modules
debugging, more corrections, tested write levelling/buffer reading
9 years ago
unisims_patches
patch to work with Icarus Verilog simulator
10 years ago
util_modules
working on synthesis with Vivado tools
9 years ago
wrap
working with hardware
10 years ago
.editor_defines.vh
working on synthesis with Vivado tools
9 years ago
.gitignore
working on Python code for hardware testing
9 years ago
.project
testing hardware, adding related code
9 years ago
.pydevproject
organized new/debug files
10 years ago
OSERDESE1.diff
Modifications for Icarus Verilog
10 years ago
README.md
more changes to convert project
9 years ago
address_map.txt
before adding extra register layer between channel buffers outputs and memory controller
9 years ago
cmd_mux.v
before adding extra register layer between channel buffers outputs and memory controller
9 years ago
ddrc_test01.xcf
added configuration for ISE, timing constraints for Vivado
10 years ago
ddrc_test01.xdc
troubleshooting lack of DONE during loading of the bitfile
10 years ago
ddrc_test01_testbench.sav
more changes to convert project
9 years ago
ddrc_test01_timing.xdc
troubleshooting lack of DONE during loading of the bitfile
10 years ago
glbl.v
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status_read.v
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system_defines.vh
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x393.v
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x393.xcf
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x393.xdc
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x393_testbench01.sav
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x393_testbench01.tf
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x393_timing.xdc
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README.md
x393
FPGA code for Elphel 393 camera