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Elphel
x393
Commits
cad9a46e
Commit
cad9a46e
authored
May 29, 2015
by
Andrey Filippov
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Plain Diff
typo fix
parent
b6281d7d
Changes
9
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9 changed files
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9 additions
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9 deletions
+9
-9
mcntrl393.v
memctrl/mcntrl393.v
+1
-1
mcntrl393_test01.v
memctrl/mcntrl393_test01.v
+1
-1
memctrl16.v
memctrl/memctrl16.v
+1
-1
ddrc_sequencer.v
memctrl/phy/ddrc_sequencer.v
+1
-1
mcontr_sequencer.v
memctrl/phy/mcontr_sequencer.v
+1
-1
sens_parallel12.v
sensor/sens_parallel12.v
+1
-1
sensor_channel.v
sensor/sensor_channel.v
+1
-1
sensor_i2c.v
sensor/sensor_i2c.v
+1
-1
sensor_i2c_io.v
sensor/sensor_i2c_io.v
+1
-1
No files found.
memctrl/mcntrl393.v
View file @
cad9a46e
...
...
@@ -218,7 +218,7 @@ module mcntrl393 #(
)
(
input
rst_in
,
input
clk_in
,
output
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O th
o
rough the command port
output
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O through the command port
// programming interface
input
[
7
:
0
]
cmd_ad
,
// byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3
input
cmd_stb
,
// strobe (with first byte) for the command a/d
...
...
memctrl/mcntrl393_test01.v
View file @
cad9a46e
...
...
@@ -38,7 +38,7 @@ module mcntrl393_test01#(
parameter
MCNTRL_TEST01_STATUS_REG_CHN4_ADDR
=
'h3f
// status/readback register for channel 4
)(
input
rst
,
input
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O th
o
rough the command port
input
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O through the command port
// programming interface
input
[
7
:
0
]
cmd_ad
,
// byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3
input
cmd_stb
,
// strobe (with first byte) for the command a/d
...
...
memctrl/memctrl16.v
View file @
cad9a46e
...
...
@@ -140,7 +140,7 @@ module memctrl16 #(
)
(
input
rst_in
,
input
clk_in
,
output
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O th
o
rough the command port
output
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O through the command port
// programming interface
input
[
7
:
0
]
cmd_ad
,
// byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3
input
cmd_stb
,
// strobe (with first byte) for the command a/d
...
...
memctrl/phy/ddrc_sequencer.v
View file @
cad9a46e
...
...
@@ -68,7 +68,7 @@ module ddrc_sequencer #(
// clocks, reset
input
clk_in
,
input
rst_in
,
output
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O th
o
rough the command port
output
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O through the command port
// command port 0 (filled by software - 32w->32r) - used for mode set, refresh, write levelling, ...
input
cmd0_clk
,
input
cmd0_we
,
...
...
memctrl/phy/mcontr_sequencer.v
View file @
cad9a46e
...
...
@@ -114,7 +114,7 @@ module mcontr_sequencer #(
// clocks, reset
input
clk_in
,
input
rst_in
,
output
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O th
o
rough the command port
output
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O through the command port
// command port 0 (filled by software - 32w->32r) - used for mode set, refresh, write levelling, ...
input
cmd0_clk
,
input
cmd0_we
,
...
...
sensor/sens_parallel12.v
View file @
cad9a46e
...
...
@@ -105,7 +105,7 @@ module sens_parallel12 #(
// output senspgmin,
// programming interface
input
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O th
o
rough the command port
input
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O through the command port
input
[
7
:
0
]
cmd_ad
,
// byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3
input
cmd_stb
,
// strobe (with first byte) for the command a/d
output
[
7
:
0
]
status_ad
,
// status address/data - up to 5 bytes: A - {seq,status[1:0]} - status[2:9] - status[10:17] - status[18:25]
...
...
sensor/sensor_channel.v
View file @
cad9a46e
...
...
@@ -100,7 +100,7 @@ module sensor_channel#(
inout
sns_ctl
,
inout
sns_pg
,
// programming interface
input
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O th
o
rough the command port
input
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O through the command port
input
[
7
:
0
]
cmd_ad
,
// byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3
input
cmd_stb
,
// strobe (with first byte) for the command a/d
output
[
7
:
0
]
status_ad
,
// status address/data - up to 5 bytes: A - {seq,status[1:0]} - status[2:9] - status[10:17] - status[18:25]
...
...
sensor/sensor_i2c.v
View file @
cad9a46e
...
...
@@ -31,7 +31,7 @@ module sensor_i2c#(
parameter
SENSI2C_STATUS_REG
=
'h30
)(
input
rst
,
input
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O th
o
rough the command port
input
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O through the command port
input
[
7
:
0
]
cmd_ad
,
// byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3
input
cmd_stb
,
// strobe (with first byte) for the command a/d
// status will {frame_num[3:0],busy,sda,scl} - read outside of this module?
...
...
sensor/sensor_i2c_io.v
View file @
cad9a46e
...
...
@@ -35,7 +35,7 @@ module sensor_i2c_io#(
parameter
SENSI2C_SLEW
=
"SLOW"
)(
input
rst
,
input
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O th
o
rough the command port
input
mclk
,
// global clock, half DDR3 clock, synchronizes all I/O through the command port
input
[
7
:
0
]
cmd_ad
,
// byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3
input
cmd_stb
,
// strobe (with first byte) for the command a/d
output
[
7
:
0
]
status_ad
,
// status address/data - up to 5 bytes: A - {seq,status[1:0]} - status[2:9] - status[10:17] - status[18:25]
...
...
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