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Commit c153c326 authored by Andrey Filippov's avatar Andrey Filippov
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writing sensor simulation code

parent 3af47156
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.settings/com.elphel.vdt.iverilog.prefs
View file @ c153c326
com.elphel.store.context.iverilog=iverilog_81_TopModulesOther<-@\#\#@->iverilog_83_ExtraFiles<-@\#\#@->iverilog_88_ShowNoProblem<-@\#\#@->iverilog_77_Param_Exe<-@\#\#@->iverilog_78_VVP_Exe<-@\#\#@->iverilog_99_GrepFindErrWarn<-@\#\#@->iverilog_84_IncludeDir<-@\#\#@->iverilog_89_ShowNoProblem<-@\#\#@->iverilog_79_GtkWave_Exe<-@\#\#@->iverilog_98_GTKWaveSavFile<-@\#\#@->iverilog_100_TopModulesOther<-@\#\#@->iverilog_102_ExtraFiles<-@\#\#@->iverilog_103_IncludeDir<-@\#\#@->
com.elphel.store.context.iverilog=iverilog_81_TopModulesOther<-@\#\#@->iverilog_83_ExtraFiles<-@\#\#@->iverilog_88_ShowNoProblem<-@\#\#@->iverilog_77_Param_Exe<-@\#\#@->iverilog_78_VVP_Exe<-@\#\#@->iverilog_99_GrepFindErrWarn<-@\#\#@->iverilog_84_IncludeDir<-@\#\#@->iverilog_89_ShowNoProblem<-@\#\#@->iverilog_79_GtkWave_Exe<-@\#\#@->iverilog_98_GTKWaveSavFile<-@\#\#@->iverilog_100_TopModulesOther<-@\#\#@->iverilog_102_ExtraFiles<-@\#\#@->iverilog_103_IncludeDir<-@\#\#@->iverilog_101_TopModulesOther<-@\#\#@->iverilog_103_ExtraFiles<-@\#\#@->iverilog_104_IncludeDir<-@\#\#@->
eclipse.preferences.version=1
iverilog_100_TopModulesOther=glbl<-@\#\#@->
iverilog_101_TopModulesOther=glbl<-@\#\#@->
iverilog_102_ExtraFiles=glbl.v<-@\#\#@->
iverilog_103_ExtraFiles=glbl.v<-@\#\#@->
iverilog_103_IncludeDir=${verilog_project_loc}/includes<-@\#\#@->${verilog_project_loc}/includes<-@\#\#@->
iverilog_104_IncludeDir=${verilog_project_loc}/ddr3<-@\#\#@->${verilog_project_loc}/includes<-@\#\#@->
iverilog_77_Param_Exe=/usr/local/bin/iverilog
iverilog_78_VVP_Exe=/usr/local/bin/vvp
iverilog_79_GtkWave_Exe=/usr/local/bin/gtkwave
......
includes/tasks_tests_memory.vh 0 → 100644
View file @ c153c326
This diff is collapsed.
includes/x393_parameters.vh
View file @ c153c326
......@@ -319,15 +319,30 @@
parameter SENSOR_CTRL_RADDR = 0, // relative to SENSOR_GROUP_ADDR
parameter SENSOR_CTRL_ADDR_MASK = 'h7ff, //
// bits of the SENSOR mode register
parameter SENSOR_MODE_WIDTH = 9,
parameter SENSOR_HIST_EN_BIT = 0, // 0..3 1 - enable histogram modules, disable after processing the started frame
parameter SENSOR_HIST_NRST_BIT = 4, // 0 - immediately reset all histogram modules
parameter SENSOR_16BIT_BIT = 8, // 0 - 8 bpp mode, 1 - 16 bpp (bypass gamma). Gamma-processed data is still used for histograms
parameter SENSOR_MODE_WIDTH = 10,
parameter SENSOR_HIST_EN_BITS = 0, // 0..3 1 - enable histogram modules, disable after processing the started frame
parameter SENSOR_HIST_NRST_BITS = 4, // 0 - immediately reset all histogram modules
parameter SENSOR_CHN_EN_BIT = 8, // 1 - this enable channel
parameter SENSOR_16BIT_BIT = 9, // 0 - 8 bpp mode, 1 - 16 bpp (bypass gamma). Gamma-processed data is still used for histograms
parameter SENSI2C_CTRL_RADDR = 2, // 302..'h303
parameter SENSI2C_CTRL_MASK = 'h7fe,
// sensor_i2c_io relative control register addresses
parameter SENSI2C_CTRL = 'h0,
// Control register bits
parameter SENSI2C_CMD_RESET = 14, // [14] reset all FIFO (takes 16 clock pulses), also - stops i2c until run command
parameter SENSI2C_CMD_RUN = 13, // [13:12]3 - run i2c, 2 - stop i2c (needed before software i2c), 1,0 - no change to run state
parameter SENSI2C_CMD_RUN_PBITS = 1,
parameter SENSI2C_CMD_BYTES = 11, // if 1, use [10:9] to set command bytes to send after slave address (0..3)
parameter SENSI2C_CMD_BYTES_PBITS = 2,
parameter SENSI2C_CMD_DLY = 8, // [7:0] - duration of quater i2c cycle (if 0, [3:0] control SCL+SDA)
parameter SENSI2C_CMD_DLY_PBITS = 8,
// direct control of SDA/SCL mutually exclusive with DLY control, disabled by running i2c
parameter SENSI2C_CMD_SCL = 0, // [1:0] : 0: NOP, 1: 1'b0->SCL, 2: 1'b1->SCL, 3: 1'bz -> SCL
parameter SENSI2C_CMD_SCL_WIDTH = 2,
parameter SENSI2C_CMD_SDA = 2, // [3:2] : 0: NOP, 1: 1'b0->SDA, 2: 1'b1->SDA, 3: 1'bz -> SDA,
parameter SENSI2C_CMD_SDA_WIDTH = 2,
parameter SENSI2C_STATUS = 'h1,
parameter SENS_SYNC_RADDR = 'h4,
......
includes/x393_simulation_parameters.vh
View file @ c153c326
......@@ -29,5 +29,22 @@
parameter MEMCLK_PERIOD = 5.0,
parameter FCLK0_PERIOD = 10.417,
parameter FCLK1_PERIOD = 0.0
\ No newline at end of file
parameter FCLK1_PERIOD = 0.0,
parameter SENSOR12BITS_LLINE = 192, // 1664;// line duration in clocks
parameter SENSOR12BITS_NCOLS = 66, //58; //56; // 129; //128; //1288;
parameter SENSOR12BITS_NROWS = 18, // 16; // 1032;
parameter SENSOR12BITS_NROWB = 1, // number of "blank rows" from vact to 1-st hact
parameter SENSOR12BITS_NROWA = 1, // number of "blank rows" from last hact to end of vact
// parameter nAV = 24, //240; // clocks from ARO to VACT (actually from en_dclkd)
parameter SENSOR12BITS_NBPF = 20, //16; // bpf length
parameter SENSOR12BITS_NGPL = 8, // bpf to hact
parameter SENSOR12BITS_NVLO = 1, // VACT=0 in video mode (clocks)
//parameter tMD = 14; //
//parameter tDDO = 10; // some confusion here - let's assume that it is from DCLK to Data out
parameter SENSOR12BITS_TMD = 4, //
parameter SENSOR12BITS_TDDO = 2, // some confusion here - let's assume that it is from DCLK to Data out
parameter SENSOR12BITS_TDDO1 = 5, //
parameter SENSOR12BITS_TRIGDLY = 8, // delay between trigger input and start of output (VACT) in lines
parameter SENSOR12BITS_RAMP = 1, // 1 - ramp, 0 - random (now - sensor.dat)
parameter SENSOR12BITS_NEW_BAYER = 0 // 0 - "old" tiles (16x16, 1 - new - (18x18)
\ No newline at end of file
sensor/sensor_channel.v
View file @ c153c326
......@@ -52,15 +52,29 @@ module sensor_channel#(
parameter SENSOR_CTRL_ADDR_MASK = 'h7ff, //
// bits of the SENSOR mode register
parameter SENSOR_MODE_WIDTH = 10,
parameter SENSOR_HIST_EN_BIT = 4, // 0..3 1 - enable histogram modules, disable after processing the started frame
parameter SENSOR_HIST_NRST_BIT = 8, // 0 - immediately reset all histogram modules
parameter SENSOR_CHN_EN_BIT = 8, // 1 - this enable channel
parameter SENSOR_16BIT_BIT = 9, // 0 - 8 bpp mode, 1 - 16 bpp (bypass gamma). Gamma-processed data is still used for histograms
parameter SENSOR_HIST_EN_BITS = 0, // 0..3 1 - enable histogram modules, disable after processing the started frame
parameter SENSOR_HIST_NRST_BITS = 4, // 0 - immediately reset all histogram modules
parameter SENSOR_CHN_EN_BIT = 8, // 1 - this enable channel
parameter SENSOR_16BIT_BIT = 9, // 0 - 8 bpp mode, 1 - 16 bpp (bypass gamma). Gamma-processed data is still used for histograms
parameter SENSI2C_CTRL_RADDR = 2, // 'h02..'h03
parameter SENSI2C_CTRL_MASK = 'h7fe,
// sensor_i2c_io relative control register addresses
parameter SENSI2C_CTRL = 'h0,
// Control register bits
parameter SENSI2C_CMD_RESET = 14, // [14] reset all FIFO (takes 16 clock pulses), also - stops i2c until run command
parameter SENSI2C_CMD_RUN = 13, // [13:12]3 - run i2c, 2 - stop i2c (needed before software i2c), 1,0 - no change to run state
parameter SENSI2C_CMD_RUN_PBITS = 1,
parameter SENSI2C_CMD_BYTES = 11, // if 1, use [10:9] to set command bytes to send after slave address (0..3)
parameter SENSI2C_CMD_BYTES_PBITS = 2,
parameter SENSI2C_CMD_DLY = 8, // [7:0] - duration of quater i2c cycle (if 0, [3:0] control SCL+SDA)
parameter SENSI2C_CMD_DLY_PBITS = 8,
// direct control of SDA/SCL mutually exclusive with DLY control, disabled by running i2c
parameter SENSI2C_CMD_SCL = 0, // [1:0] : 0: NOP, 1: 1'b0->SCL, 2: 1'b1->SCL, 3: 1'bz -> SCL
parameter SENSI2C_CMD_SCL_WIDTH = 2,
parameter SENSI2C_CMD_SDA = 2, // [3:2] : 0: NOP, 1: 1'b0->SDA, 2: 1'b1->SDA, 3: 1'bz -> SDA,
parameter SENSI2C_CMD_SDA_WIDTH = 2,
parameter SENSI2C_STATUS = 'h1,
parameter SENS_GAMMA_RADDR = 'h38, //4, 'h38..'h3b
......@@ -263,7 +277,7 @@ module sensor_channel#(
wire [3:0] hist_en;
wire en_mclk; // enable this channel
wire en_pclk; // enabole in pclk domain
wire hist_nrst;
wire [3:0] hist_nrst;
wire bit16; // 16-bit mode, 0 - 8 bit mode
wire [3:0] hist_rq;
wire [3:0] hist_gr;
......@@ -299,8 +313,8 @@ module sensor_channel#(
assign last_in_line = ! ( bit16 ? gamma_hact_in : gamma_hact_out);
assign en_mclk = mode[SENSOR_CHN_EN_BIT];
assign hist_en = mode[SENSOR_HIST_EN_BIT+:4];
assign hist_nrst = mode[SENSOR_HIST_NRST_BIT];
assign hist_en = mode[SENSOR_HIST_EN_BITS +: 4];
assign hist_nrst = mode[SENSOR_HIST_NRST_BITS +: 4];
assign bit16 = mode[SENSOR_16BIT_BIT];
......@@ -362,18 +376,29 @@ module sensor_channel#(
);
sensor_i2c_io #(
.SENSI2C_ABS_ADDR (SENSI2C_ABS_ADDR),
.SENSI2C_REL_ADDR (SENSI2C_REL_ADDR),
.SENSI2C_ADDR_MASK (SENSI2C_ADDR_MASK),
.SENSI2C_CTRL_ADDR (SENSI2C_CTRL_ADDR),
.SENSI2C_CTRL_MASK (SENSI2C_CTRL_MASK),
.SENSI2C_CTRL (SENSI2C_CTRL),
.SENSI2C_STATUS (SENSI2C_STATUS),
.SENSI2C_STATUS_REG (SENSI2C_STATUS_REG),
.SENSI2C_DRIVE (SENSI2C_DRIVE),
.SENSI2C_IBUF_LOW_PWR (SENSI2C_IBUF_LOW_PWR),
.SENSI2C_IOSTANDARD (SENSI2C_IOSTANDARD),
.SENSI2C_SLEW (SENSI2C_SLEW)
.SENSI2C_ABS_ADDR (SENSI2C_ABS_ADDR),
.SENSI2C_REL_ADDR (SENSI2C_REL_ADDR),
.SENSI2C_ADDR_MASK (SENSI2C_ADDR_MASK),
.SENSI2C_CTRL_ADDR (SENSI2C_CTRL_ADDR),
.SENSI2C_CTRL_MASK (SENSI2C_CTRL_MASK),
.SENSI2C_CTRL (SENSI2C_CTRL),
.SENSI2C_STATUS (SENSI2C_STATUS),
.SENSI2C_STATUS_REG (SENSI2C_STATUS_REG),
.SENSI2C_CMD_RESET (SENSI2C_CMD_RESET),
.SENSI2C_CMD_RUN (SENSI2C_CMD_RUN),
.SENSI2C_CMD_RUN_PBITS (SENSI2C_CMD_RUN_PBITS),
.SENSI2C_CMD_BYTES (SENSI2C_CMD_BYTES),
.SENSI2C_CMD_BYTES_PBITS (SENSI2C_CMD_BYTES_PBITS),
.SENSI2C_CMD_DLY (SENSI2C_CMD_DLY),
.SENSI2C_CMD_DLY_PBITS (SENSI2C_CMD_DLY_PBITS),
.SENSI2C_CMD_SCL (SENSI2C_CMD_SCL),
.SENSI2C_CMD_SCL_WIDTH (SENSI2C_CMD_SCL_WIDTH),
.SENSI2C_CMD_SDA (SENSI2C_CMD_SDA),
.SENSI2C_CMD_SDA_WIDTH (SENSI2C_CMD_SDA_WIDTH),
.SENSI2C_DRIVE (SENSI2C_DRIVE),
.SENSI2C_IBUF_LOW_PWR (SENSI2C_IBUF_LOW_PWR),
.SENSI2C_IOSTANDARD (SENSI2C_IOSTANDARD),
.SENSI2C_SLEW (SENSI2C_SLEW)
) sensor_i2c_io_i (
.mrst (mrst), // input
.mclk (mclk), // input
......@@ -563,7 +588,7 @@ module sensor_channel#(
.hist_di (gamma_pxd_out), // input[7:0]
.mclk (mclk), // input
.hist_en (hist_en[0]), // input
.hist_rst (!hist_nrst), // input
.hist_rst (!hist_nrst[0]), // input
.hist_rq (hist_rq[0]), // output
.hist_grant (hist_gr[0]), // input
.hist_do (hist_do0), // output[31:0]
......@@ -597,7 +622,7 @@ module sensor_channel#(
.hist_di (gamma_pxd_out), // input[7:0]
.mclk (mclk), // input
.hist_en (hist_en[1]), // input
.hist_rst (!hist_nrst), // input
.hist_rst (!hist_nrst[1]), // input
.hist_rq (hist_rq[1]), // output
.hist_grant (hist_gr[1]), // input
.hist_do (hist_do1), // output[31:0]
......@@ -631,7 +656,7 @@ module sensor_channel#(
.hist_di (gamma_pxd_out), // input[7:0]
.mclk (mclk), // input
.hist_en (hist_en[2]), // input
.hist_rst (!hist_nrst), // input
.hist_rst (!hist_nrst[2]), // input
.hist_rq (hist_rq[2]), // output
.hist_grant (hist_gr[2]), // input
.hist_do (hist_do2), // output[31:0]
......@@ -665,7 +690,7 @@ module sensor_channel#(
.hist_di (gamma_pxd_out), // input[7:0]
.mclk (mclk), // input
.hist_en (hist_en[3]), // input
.hist_rst (!hist_nrst), // input
.hist_rst (!hist_nrst[3]), // input
.hist_rq (hist_rq[3]), // output
.hist_grant (hist_gr[3]), // input
.hist_do (hist_do3), // output[31:0]
......@@ -683,7 +708,7 @@ module sensor_channel#(
sens_histogram_mux sens_histogram_mux_i (
.mclk (mclk), // input
.en (!hist_nrst), // input
.en (!(|hist_nrst)), // input
.rq0 (hist_rq[0]), // input
.grant0 (hist_gr[0]), // output
.dav0 (hist_dv[0]), // input
......
sensor/sensor_i2c.v
View file @ c153c326
......@@ -21,14 +21,27 @@
`timescale 1ns/1ps
module sensor_i2c#(
parameter SENSI2C_ABS_ADDR = 'h300,
parameter SENSI2C_REL_ADDR = 'h310,
parameter SENSI2C_ADDR_MASK = 'h7f0, // both for SENSI2C_ABS_ADDR and SENSI2C_REL_ADDR
parameter SENSI2C_CTRL_ADDR = 'h320,
parameter SENSI2C_CTRL_MASK = 'h7fe,
parameter SENSI2C_CTRL = 'h0,
parameter SENSI2C_STATUS = 'h1,
parameter SENSI2C_STATUS_REG = 'h30
parameter SENSI2C_ABS_ADDR = 'h300,
parameter SENSI2C_REL_ADDR = 'h310,
parameter SENSI2C_ADDR_MASK = 'h7f0, // both for SENSI2C_ABS_ADDR and SENSI2C_REL_ADDR
parameter SENSI2C_CTRL_ADDR = 'h320,
parameter SENSI2C_CTRL_MASK = 'h7fe,
parameter SENSI2C_CTRL = 'h0,
parameter SENSI2C_STATUS = 'h1,
parameter SENSI2C_STATUS_REG = 'h30,
// Control register bits
parameter SENSI2C_CMD_RESET = 14, // [14] reset all FIFO (takes 16 clock pulses), also - stops i2c until run command
parameter SENSI2C_CMD_RUN = 13, // [13:12]3 - run i2c, 2 - stop i2c (needed before software i2c), 1,0 - no change to run state
parameter SENSI2C_CMD_RUN_PBITS = 1,
parameter SENSI2C_CMD_BYTES = 11, // if 1, use [10:9] to set command bytes to send after slave address (0..3)
parameter SENSI2C_CMD_BYTES_PBITS = 2,
parameter SENSI2C_CMD_DLY = 8, // [7:0] - duration of quater i2c cycle (if 0, [3:0] control SCL+SDA)
parameter SENSI2C_CMD_DLY_PBITS = 8,
// direct control of SDA/SCL mutually exclusive with DLY control, disabled by running i2c
parameter SENSI2C_CMD_SCL = 0, // [1:0] : 0: NOP, 1: 1'b0->SCL, 2: 1'b1->SCL, 3: 1'bz -> SCL
parameter SENSI2C_CMD_SCL_WIDTH = 2,
parameter SENSI2C_CMD_SDA = 2, // [3:2] : 0: NOP, 1: 1'b0->SDA, 2: 1'b1->SDA, 3: 1'bz -> SDA,
parameter SENSI2C_CMD_SDA_WIDTH = 2
)(
input mrst, // @ posedge mclk
input mclk, // global clock, half DDR3 clock, synchronizes all I/O through the command port
......@@ -250,28 +263,31 @@ module sensor_i2c#(
// wen_i2c_soft <= wen_d[0] && is_ctl;
// decoded commands, valid next cycle after we_*
reset_cmd <= set_ctrl_w && di[14];
run_cmd <= set_ctrl_w && di[13];
bytes_cmd <= set_ctrl_w && di[11];
dly_cmd <= set_ctrl_w && di[ 8];
reset_cmd <= set_ctrl_w && di[SENSI2C_CMD_RESET];
run_cmd <= set_ctrl_w && di[SENSI2C_CMD_RUN];
bytes_cmd <= set_ctrl_w && di[SENSI2C_CMD_BYTES];
dly_cmd <= set_ctrl_w && di[SENSI2C_CMD_DLY];
// direct i2c control, valid 1 cycle after we_*
if (i2c_run) scl_en_soft <= 1'b0;
else if (set_ctrl_w & |di[1:0]) scl_en_soft <= (di[1:0]!=2'h3);
else if (set_ctrl_w && !di[SENSI2C_CMD_DLY] && |di[SENSI2C_CMD_SCL +: SENSI2C_CMD_SCL_WIDTH])
scl_en_soft <= (di[SENSI2C_CMD_SCL +: SENSI2C_CMD_SCL_WIDTH] != 2'h3);
if (i2c_run) scl_soft <= 1'b0;
else if (set_ctrl_w & |di[1:0]) scl_soft <= (di[1:0]==2'h2);
else if (set_ctrl_w && !di[SENSI2C_CMD_DLY] && |di[SENSI2C_CMD_SCL +: SENSI2C_CMD_SCL_WIDTH])
scl_soft <= (di[SENSI2C_CMD_SCL +: SENSI2C_CMD_SCL_WIDTH] == 2'h2);
if (i2c_run) sda_en_soft <= 1'b0;
else if (set_ctrl_w & |di[3:2]) sda_en_soft <= (di[3:2]!=2'h3);
else if (set_ctrl_w && !di[SENSI2C_CMD_DLY] && |di[SENSI2C_CMD_SDA +: SENSI2C_CMD_SDA_WIDTH])
sda_en_soft <= (di[SENSI2C_CMD_SDA +: SENSI2C_CMD_SDA_WIDTH] != 2'h3);
if (i2c_run) sda_soft <= 1'b0;
else if (set_ctrl_w & |di[3:2]) sda_soft <= (di[3:2]==2'h2);
else if (set_ctrl_w && !di[SENSI2C_CMD_DLY] && |di[SENSI2C_CMD_SDA +: SENSI2C_CMD_SDA_WIDTH])
sda_soft <= (di[SENSI2C_CMD_SDA +: SENSI2C_CMD_SDA_WIDTH] == 2'h2);
// setting i2c control parameters, valid 2 cycles after we_*
if (bytes_cmd) i2c_bytes[1:0] <= di_r[10:9];
if (dly_cmd) i2c_dly[7:0] <= di_r[ 7:0];
if (bytes_cmd) i2c_bytes[1:0] <= di_r[SENSI2C_CMD_BYTES - 1 -: SENSI2C_CMD_BYTES_PBITS]; //[10:9];
if (dly_cmd) i2c_dly[7:0] <= di_r[SENSI2C_CMD_DLY - 1 -: SENSI2C_CMD_DLY_PBITS]; //[ 7:0];
if (reset_cmd) i2c_enrun <= 1'b0;
else if (run_cmd) i2c_enrun <= di_r[12];
else if (run_cmd) i2c_enrun <= di_r[SENSI2C_CMD_RUN - 1 -: SENSI2C_CMD_RUN_PBITS]; // [12];
// write pointer memory
wpage0_inc <= {wpage0_inc[0],pre_wpage0_inc};
......
sensor/sensor_i2c_io.v
View file @ c153c326
......@@ -29,10 +29,24 @@ module sensor_i2c_io#(
parameter SENSI2C_CTRL = 'h0,
parameter SENSI2C_STATUS = 'h1,
parameter SENSI2C_STATUS_REG = 'h20,
// Control register bits
parameter SENSI2C_CMD_RESET = 14, // [14] reset all FIFO (takes 16 clock pulses), also - stops i2c until run command
parameter SENSI2C_CMD_RUN = 13, // [13:12]3 - run i2c, 2 - stop i2c (needed before software i2c), 1,0 - no change to run state
parameter SENSI2C_CMD_RUN_PBITS = 1,
parameter SENSI2C_CMD_BYTES = 11, // if 1, use [10:9] to set command bytes to send after slave address (0..3)
parameter SENSI2C_CMD_BYTES_PBITS = 2,
parameter SENSI2C_CMD_DLY = 8, // [7:0] - duration of quater i2c cycle (if 0, [3:0] control SCL+SDA)
parameter SENSI2C_CMD_DLY_PBITS = 8,
// direct control of SDA/SCL mutually exclusive with DLY control, disabled by running i2c
parameter SENSI2C_CMD_SCL = 0, // [1:0] : 0: NOP, 1: 1'b0->SCL, 2: 1'b1->SCL, 3: 1'bz -> SCL
parameter SENSI2C_CMD_SCL_WIDTH = 2,
parameter SENSI2C_CMD_SDA = 2, // [3:2] : 0: NOP, 1: 1'b0->SDA, 2: 1'b1->SDA, 3: 1'bz -> SDA,
parameter SENSI2C_CMD_SDA_WIDTH = 2,
// I/O parameters
parameter integer SENSI2C_DRIVE = 12,
parameter SENSI2C_IBUF_LOW_PWR = "TRUE",
parameter SENSI2C_IOSTANDARD = "DEFAULT",
parameter SENSI2C_SLEW = "SLOW"
parameter SENSI2C_IOSTANDARD = "DEFAULT",
parameter SENSI2C_SLEW = "SLOW"
)(
input mrst, // @mclk
input mclk, // global clock, half DDR3 clock, synchronizes all I/O through the command port
......@@ -53,14 +67,26 @@ module sensor_i2c_io#(
wire sda_en;
sensor_i2c #(
.SENSI2C_ABS_ADDR (SENSI2C_ABS_ADDR),
.SENSI2C_REL_ADDR (SENSI2C_REL_ADDR),
.SENSI2C_ADDR_MASK (SENSI2C_ADDR_MASK),
.SENSI2C_CTRL_ADDR (SENSI2C_CTRL_ADDR),
.SENSI2C_CTRL_MASK (SENSI2C_CTRL_MASK),
.SENSI2C_CTRL (SENSI2C_CTRL),
.SENSI2C_STATUS (SENSI2C_STATUS),
.SENSI2C_STATUS_REG (SENSI2C_STATUS_REG)
.SENSI2C_ABS_ADDR (SENSI2C_ABS_ADDR),
.SENSI2C_REL_ADDR (SENSI2C_REL_ADDR),
.SENSI2C_ADDR_MASK (SENSI2C_ADDR_MASK),
.SENSI2C_CTRL_ADDR (SENSI2C_CTRL_ADDR),
.SENSI2C_CTRL_MASK (SENSI2C_CTRL_MASK),
.SENSI2C_CTRL (SENSI2C_CTRL),
.SENSI2C_STATUS (SENSI2C_STATUS),
.SENSI2C_STATUS_REG (SENSI2C_STATUS_REG),
.SENSI2C_CMD_RESET (SENSI2C_CMD_RESET),
.SENSI2C_CMD_RUN (SENSI2C_CMD_RUN),
.SENSI2C_CMD_RUN_PBITS (SENSI2C_CMD_RUN_PBITS),
.SENSI2C_CMD_BYTES (SENSI2C_CMD_BYTES),
.SENSI2C_CMD_BYTES_PBITS (SENSI2C_CMD_BYTES_PBITS),
.SENSI2C_CMD_DLY (SENSI2C_CMD_DLY),
.SENSI2C_CMD_DLY_PBITS (SENSI2C_CMD_DLY_PBITS),
.SENSI2C_CMD_SCL (SENSI2C_CMD_SCL),
.SENSI2C_CMD_SCL_WIDTH (SENSI2C_CMD_SCL_WIDTH),
.SENSI2C_CMD_SDA (SENSI2C_CMD_SDA),
.SENSI2C_CMD_SDA_WIDTH (SENSI2C_CMD_SDA_WIDTH)
) sensor_i2c_i (
.mrst (mrst), // input
.mclk (mclk), // input
......
sensor/sensors393.v
View file @ c153c326
......@@ -43,15 +43,30 @@ module sensors393 #(
parameter SENSOR_CTRL_RADDR = 0, // relative to SENSOR_GROUP_ADDR
parameter SENSOR_CTRL_ADDR_MASK = 'h7ff, //
// bits of the SENSOR mode register
parameter SENSOR_MODE_WIDTH = 9,
parameter SENSOR_HIST_EN_BIT = 0, // 0..3 1 - enable histogram modules, disable after processing the started frame
parameter SENSOR_HIST_NRST_BIT = 4, // 0 - immediately reset all histogram modules
parameter SENSOR_16BIT_BIT = 8, // 0 - 8 bpp mode, 1 - 16 bpp (bypass gamma). Gamma-processed data is still used for histograms
parameter SENSOR_MODE_WIDTH = 10,
parameter SENSOR_HIST_EN_BITS = 0, // 0..3 1 - enable histogram modules, disable after processing the started frame
parameter SENSOR_HIST_NRST_BITS = 4, // 0 - immediately reset all histogram modules
parameter SENSOR_CHN_EN_BIT = 8, // 1 - this enable channel
parameter SENSOR_16BIT_BIT = 9, // 0 - 8 bpp mode, 1 - 16 bpp (bypass gamma). Gamma-processed data is still used for histograms
parameter SENSI2C_CTRL_RADDR = 2, // 302..'h303
parameter SENSI2C_CTRL_MASK = 'h7fe,
// sensor_i2c_io relative control register addresses
parameter SENSI2C_CTRL = 'h0,
// Control register bits
parameter SENSI2C_CMD_RESET = 14, // [14] reset all FIFO (takes 16 clock pulses), also - stops i2c until run command
parameter SENSI2C_CMD_RUN = 13, // [13:12]3 - run i2c, 2 - stop i2c (needed before software i2c), 1,0 - no change to run state
parameter SENSI2C_CMD_RUN_PBITS = 1,
parameter SENSI2C_CMD_BYTES = 11, // if 1, use [10:9] to set command bytes to send after slave address (0..3)
parameter SENSI2C_CMD_BYTES_PBITS = 2,
parameter SENSI2C_CMD_DLY = 8, // [7:0] - duration of quater i2c cycle (if 0, [3:0] control SCL+SDA)
parameter SENSI2C_CMD_DLY_PBITS = 8,
// direct control of SDA/SCL mutually exclusive with DLY control, disabled by running i2c
parameter SENSI2C_CMD_SCL = 0, // [1:0] : 0: NOP, 1: 1'b0->SCL, 2: 1'b1->SCL, 3: 1'bz -> SCL
parameter SENSI2C_CMD_SCL_WIDTH = 2,
parameter SENSI2C_CMD_SDA = 2, // [3:2] : 0: NOP, 1: 1'b0->SDA, 2: 1'b1->SDA, 3: 1'bz -> SDA
parameter SENSI2C_CMD_SDA_WIDTH = 2,
parameter SENSI2C_STATUS = 'h1,
parameter SENS_SYNC_RADDR = 'h4,
......@@ -315,12 +330,25 @@ module sensors393 #(
.SENSOR_CTRL_RADDR (SENSOR_CTRL_RADDR),
.SENSOR_CTRL_ADDR_MASK (SENSOR_CTRL_ADDR_MASK),
.SENSOR_MODE_WIDTH (SENSOR_MODE_WIDTH),
.SENSOR_HIST_EN_BIT (SENSOR_HIST_EN_BIT),
.SENSOR_HIST_NRST_BIT (SENSOR_HIST_NRST_BIT),
.SENSOR_CHN_EN_BIT (SENSOR_CHN_EN_BIT),
.SENSOR_HIST_EN_BITS (SENSOR_HIST_EN_BITS),
.SENSOR_HIST_NRST_BITS (SENSOR_HIST_NRST_BITS),
.SENSOR_16BIT_BIT (SENSOR_16BIT_BIT),
.SENSI2C_CTRL_RADDR (SENSI2C_CTRL_RADDR),
.SENSI2C_CTRL_MASK (SENSI2C_CTRL_MASK),
.SENSI2C_CTRL (SENSI2C_CTRL),
.SENSI2C_CMD_RESET (SENSI2C_CMD_RESET),
.SENSI2C_CMD_RUN (SENSI2C_CMD_RUN),
.SENSI2C_CMD_RUN_PBITS (SENSI2C_CMD_RUN_PBITS),
.SENSI2C_CMD_BYTES (SENSI2C_CMD_BYTES),
.SENSI2C_CMD_BYTES_PBITS (SENSI2C_CMD_BYTES_PBITS),
.SENSI2C_CMD_DLY (SENSI2C_CMD_DLY),
.SENSI2C_CMD_DLY_PBITS (SENSI2C_CMD_DLY_PBITS),
.SENSI2C_CMD_SCL (SENSI2C_CMD_SCL),
.SENSI2C_CMD_SCL_WIDTH (SENSI2C_CMD_SCL_WIDTH),
.SENSI2C_CMD_SDA (SENSI2C_CMD_SDA),
.SENSI2C_CMD_SDA_WIDTH (SENSI2C_CMD_SDA_WIDTH),
.SENSI2C_STATUS (SENSI2C_STATUS),
.SENS_GAMMA_RADDR (SENS_GAMMA_RADDR),
.SENS_GAMMA_ADDR_MASK (SENS_GAMMA_ADDR_MASK),
......
simulation_modules/simul_sensor12bits.v
View file @ c153c326
......@@ -35,8 +35,8 @@ module simul_sensor12bits # (
parameter tDDO = 2, // some confusion here - let's assume that it is from DCLK to Data out
parameter tDDO1 = 5, //
parameter trigdly = 8, // delay between trigger input and start of output (VACT) in lines
parameter ramp = 1 // 1 - ramp, 0 - random (now - sensor.dat)
parameter ramp = 1, // 1 - ramp, 0 - random (now - sensor.dat)
parameter new_bayer = 0 // 0 - old (16x16), 1 - new (18x18)
) (
input MCLK, // Master clock
input MRST, // Master Reset - active low
......@@ -94,7 +94,6 @@ wire [3:0] stated;
wire [15:0] cntrd;
wire NMRST=!MRST;
parameter new_bayer=0; // 0 - old (16x16), 1 - new (18x18)
wire [5:0] row_index=row[5:0]-new_bayer;
wire [5:0] col_index=col[5:0]-new_bayer;
......
x393.v
View file @ c153c326
......@@ -1377,12 +1377,24 @@ assign axi_grst = axi_rst_pre;
.SENSOR_CTRL_RADDR (SENSOR_CTRL_RADDR),
.SENSOR_CTRL_ADDR_MASK (SENSOR_CTRL_ADDR_MASK),
.SENSOR_MODE_WIDTH (SENSOR_MODE_WIDTH),
.SENSOR_HIST_EN_BIT (SENSOR_HIST_EN_BIT),
.SENSOR_HIST_NRST_BIT (SENSOR_HIST_NRST_BIT),
.SENSOR_HIST_EN_BITS (SENSOR_HIST_EN_BITS),
.SENSOR_CHN_EN_BIT (SENSOR_CHN_EN_BIT),
.SENSOR_HIST_NRST_BITS (SENSOR_HIST_NRST_BITS),
.SENSOR_16BIT_BIT (SENSOR_16BIT_BIT),
.SENSI2C_CTRL_RADDR (SENSI2C_CTRL_RADDR),
.SENSI2C_CTRL_MASK (SENSI2C_CTRL_MASK),
.SENSI2C_CTRL (SENSI2C_CTRL),
.SENSI2C_CMD_RESET (SENSI2C_CMD_RESET),
.SENSI2C_CMD_RUN (SENSI2C_CMD_RUN),
.SENSI2C_CMD_RUN_PBITS (SENSI2C_CMD_RUN_PBITS),
.SENSI2C_CMD_BYTES (SENSI2C_CMD_BYTES),
.SENSI2C_CMD_BYTES_PBITS (SENSI2C_CMD_BYTES_PBITS),
.SENSI2C_CMD_DLY (SENSI2C_CMD_DLY),
.SENSI2C_CMD_DLY_PBITS (SENSI2C_CMD_DLY_PBITS),
.SENSI2C_CMD_SCL (SENSI2C_CMD_SCL),
.SENSI2C_CMD_SCL_WIDTH (SENSI2C_CMD_SCL_WIDTH),
.SENSI2C_CMD_SDA (SENSI2C_CMD_SDA),
.SENSI2C_CMD_SDA_WIDTH (SENSI2C_CMD_SDA_WIDTH),
.SENSI2C_STATUS (SENSI2C_STATUS),
.SENS_SYNC_RADDR (SENS_SYNC_RADDR),
.SENS_SYNC_MASK (SENS_SYNC_MASK),
......
x393_testbench01.tf
View file @ c153c326
......@@ -48,7 +48,7 @@
module x393_testbench01 #(
`include "includes/x393_parameters.vh" // SuppressThisWarning VEditor - not used
`include "includes/x393_simulation_parameters.vh"
`include "includes/x393_simulation_parameters.vh"// SuppressThisWarning VEditor - not used
)(
);
`ifdef IVERILOG
......
x393_testbench02.tf 0 → 100644
View file @ c153c326
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