Commit bf463e76 authored by Andrey Filippov's avatar Andrey Filippov

v.202 for Boson - reset with OD

parent df06bda0
......@@ -35,7 +35,8 @@
* contains all the components and scripts required to completely simulate it
* with at least one of the Free Software programs.
*/
parameter FPGA_VERSION = 32'h03930201; // Initial Boson implementation (cheating with 2.5V - as with HISPI)
parameter FPGA_VERSION = 32'h03930202; // Initial Boson implementation (cheating with 2.5V), open drain for Boson reset
// parameter FPGA_VERSION = 32'h03930201; // Initial Boson implementation (cheating with 2.5V - as with HISPI)
// parameter FPGA_VERSION = 32'h03930200; // Initial Boson implementation (1.8V)
//BOSON
// parameter FPGA_VERSION = 32'h03930139; // Adding pullup on senspgm
......
......@@ -496,15 +496,16 @@ module sens_103993 #(
.I (ext_sync) // input
);
// generate MRST
obuf #(
// generate MRST (for Boson ground/float
obuft #(
.CAPACITANCE (PXD_CAPACITANCE),
.DRIVE (PXD_DRIVE),
.IOSTANDARD (PXD_IOSTANDARD),
.SLEW (PXD_SLEW)
) sns_mrst_i (
.O (sns_mrst), // output
.I (imrst) // input
.I (imrst), // input
.T (imrst) // input // tristate when high
);
......
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