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Commit 9f409add authored by Andrey Filippov's avatar Andrey Filippov
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another samll set of simulation signals

parent 500cf616
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x393_testbench04.gtkw 0 → 100644
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[*]
[*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI
[*] Wed Mar 16 06:26:20 2016
[*]
[dumpfile] "/home/andrey/git/x393/simulation/x393_testbench03-20160315224430019.fst"
[dumpfile_mtime] "Wed Mar 16 05:18:26 2016"
[dumpfile_size] 287405686
[savefile] "/home/andrey/git/x393/x393_testbench04.gtkw"
[timestart] 0
[size] 1823 1180
[pos] -1 -1
*-25.170794 11766250 105383200 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] x393_testbench03.
[treeopen] x393_testbench03.simul_axi_hp1_wr_i.
[treeopen] x393_testbench03.simul_axi_hp_wr_i.
[treeopen] x393_testbench03.x393_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].
[treeopen] x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.
[treeopen] x393_testbench03.x393_i.compressor393_i.genblk3.
[treeopen] x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.
[sst_width] 391
[signals_width] 325
[sst_expanded] 1
[sst_vpaned_height] 500
@800200
-interrupts
-wresp
@28
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.hclk
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.afi_bvalid_r
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.afi_bready_r
@22
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.id_r[4:0]
@200
-
@1000200
-wresp
@800022
[color] 3
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.eof_stb[3:0]
@28
[color] 2
(0)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.eof_stb[3:0]
[color] 2
(1)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.eof_stb[3:0]
[color] 2
(2)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.eof_stb[3:0]
[color] 2
(3)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.eof_stb[3:0]
@1001200
-group_end
@28
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.eof_written3
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.eof_written2
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.eof_written1
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.eof_written0
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.afi_bvalid
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.afi_bvalid_r
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.afi_bready
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.afi_bready_r
@22
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.afi_bid[5:0]
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.id_r[4:0]
@28
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.pre_busy
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.en
@c00022
x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.busy[4:0]
@28
(0)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.busy[4:0]
(1)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.busy[4:0]
(2)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.busy[4:0]
(3)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.busy[4:0]
(4)x393_testbench03.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.cmprs_afi_mux_ptr_wresp_i.busy[4:0]
@1401200
-group_end
@28
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_status_i.is_r
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_status_i.mrst
x393_testbench03.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.mrst
@800023
x393_testbench03.x393_i.frseq_is[3:0]
@29
(0)x393_testbench03.x393_i.frseq_is[3:0]
(1)x393_testbench03.x393_i.frseq_is[3:0]
(2)x393_testbench03.x393_i.frseq_is[3:0]
(3)x393_testbench03.x393_i.frseq_is[3:0]
@1001201
-group_end
@22
x393_testbench03.x393_i.frseq_im[3:0]
x393_testbench03.x393_i.frseq_irq[3:0]
@1000200
-interrupts
@800200
-simulate_hp
@c00022
x393_testbench03.simul_axi_hp1_wr_i.wresp_i.data_out[7:0]
@28
(0)x393_testbench03.simul_axi_hp1_wr_i.wresp_i.data_out[7:0]
(1)x393_testbench03.simul_axi_hp1_wr_i.wresp_i.data_out[7:0]
(2)x393_testbench03.simul_axi_hp1_wr_i.wresp_i.data_out[7:0]
(3)x393_testbench03.simul_axi_hp1_wr_i.wresp_i.data_out[7:0]
(4)x393_testbench03.simul_axi_hp1_wr_i.wresp_i.data_out[7:0]
(5)x393_testbench03.simul_axi_hp1_wr_i.wresp_i.data_out[7:0]
(6)x393_testbench03.simul_axi_hp1_wr_i.wresp_i.data_out[7:0]
(7)x393_testbench03.simul_axi_hp1_wr_i.wresp_i.data_out[7:0]
@1401200
-group_end
@28
x393_testbench03.simul_axi_hp1_wr_i.bready
x393_testbench03.simul_axi_hp1_wr_i.bresp_in[1:0]
x393_testbench03.simul_axi_hp1_wr_i.bvalid
@22
x393_testbench03.simul_axi_hp1_wr_i.bid[5:0]
x393_testbench03.simul_axi_hp1_wr_i.bid_in[5:0]
@28
x393_testbench03.simul_axi_hp1_wr_i.bresp[1:0]
x393_testbench03.simul_axi_hp1_wr_i.last_confirmed_write
@22
x393_testbench03.simul_axi_hp1_wr_i.wid[5:0]
@28
x393_testbench03.simul_axi_hp1_wr_i.wresp_ext_i.we
x393_testbench03.simul_axi_hp1_wr_i.fifo_wd_rd_dly
@22
x393_testbench03.simul_axi_hp1_wr_i.bid_in[5:0]
@c00022
x393_testbench03.simul_axi_hp1_wr_i.wresp_num_in_fifo[5:0]
@28
(0)x393_testbench03.simul_axi_hp1_wr_i.wresp_num_in_fifo[5:0]
(1)x393_testbench03.simul_axi_hp1_wr_i.wresp_num_in_fifo[5:0]
(2)x393_testbench03.simul_axi_hp1_wr_i.wresp_num_in_fifo[5:0]
(3)x393_testbench03.simul_axi_hp1_wr_i.wresp_num_in_fifo[5:0]
(4)x393_testbench03.simul_axi_hp1_wr_i.wresp_num_in_fifo[5:0]
(5)x393_testbench03.simul_axi_hp1_wr_i.wresp_num_in_fifo[5:0]
@1401200
-group_end
@28
x393_testbench03.simul_axi_hp1_wr_i.wresp_i.we
@c00022
x393_testbench03.simul_axi_hp1_wr_i.wresp_i.fill[5:0]
@28
(0)x393_testbench03.simul_axi_hp1_wr_i.wresp_i.fill[5:0]
(1)x393_testbench03.simul_axi_hp1_wr_i.wresp_i.fill[5:0]
(2)x393_testbench03.simul_axi_hp1_wr_i.wresp_i.fill[5:0]
(3)x393_testbench03.simul_axi_hp1_wr_i.wresp_i.fill[5:0]
(4)x393_testbench03.simul_axi_hp1_wr_i.wresp_i.fill[5:0]
(5)x393_testbench03.simul_axi_hp1_wr_i.wresp_i.fill[5:0]
@1401200
-group_end
@28
x393_testbench03.simul_axi_hp1_wr_i.wresp_i.re
x393_testbench03.simul_axi_hp1_wr_i.wresp_i.rem
@200
-
@28
x393_testbench03.simul_axi_hp1_wr_i.wresp_i.nempty
@22
x393_testbench03.simul_axi_hp1_wr_i.bid[5:0]
@200
-
@22
x393_testbench03.simul_axi_hp1_wr_i.wresp_ext_i.wa[4:0]
x393_testbench03.simul_axi_hp1_wr_i.wresp_ext_i.data_in[7:0]
@28
x393_testbench03.simul_axi_hp1_wr_i.wresp_ext_i.re
x393_testbench03.simul_axi_hp1_wr_i.wresp_ext_i.rem
@22
x393_testbench03.simul_axi_hp1_wr_i.wresp_i.wa[4:0]
@28
x393_testbench03.simul_axi_hp1_wr_i.wresp_i.we
@200
-
@1000200
-simulate_hp
[pattern_trace] 1
[pattern_trace] 0
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