Commit 93e8aa42 authored by Andrey Filippov's avatar Andrey Filippov

Fixed teplate error in the headers

parent 428053b8
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Writes comressor data from up to 4 channels to system memory over AXI_HP * Description: Writes comressor data from up to 4 channels to system memory over AXI_HP
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmprs_afi_mux.v is free software; you can redistribute it and/or modify * cmprs_afi_mux.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Maintain 4-channel chunk pointers (before AXI) * Description: Maintain 4-channel chunk pointers (before AXI)
* Advance 32-byte chunk pointers for each AXI burst and each frame (4*2=8 pointers) * Advance 32-byte chunk pointers for each AXI burst and each frame (4*2=8 pointers)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmprs_afi_mux_ptr.v is free software; you can redistribute it and/or modify * cmprs_afi_mux_ptr.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Maintain 4-channel chunk pointers for wrirte response * Description: Maintain 4-channel chunk pointers for wrirte response
* Advance 32-byte chunk pointers for each AXI burst and each frame (4*2=8 pointers) * Advance 32-byte chunk pointers for each AXI burst and each frame (4*2=8 pointers)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmprs_afi_mux_ptr_wresp.v is free software; you can redistribute it and/or modify * cmprs_afi_mux_ptr_wresp.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
* and the same for the write response channel (confirmed written to the system * and the same for the write response channel (confirmed written to the system
* memory * memory
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmprs_afi_mux_status.v is free software; you can redistribute it and/or modify * cmprs_afi_mux_status.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: bi-directional bridge between system and video memory over axi_hp * Description: bi-directional bridge between system and video memory over axi_hp
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* membridge.v is free software; you can redistribute it and/or modify * membridge.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Generate global clock for axi_hp * Description: Generate global clock for axi_hp
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* axi_hp_clk.v is free software; you can redistribute it and/or modify * axi_hp_clk.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Command multiplexer between AXI and frame-based command sequencer * Description: Command multiplexer between AXI and frame-based command sequencer
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_mux.v is free software; you can redistribute it and/or modify * cmd_mux.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Store control register data and readback * Description: Store control register data and readback
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_readback.v is free software; you can redistribute it and/or modify * cmd_readback.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
* during write, then subtracts them during read and provides to * during write, then subtracts them during read and provides to
* the after DCT to restore DC * the after DCT to restore DC
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmprs_buf_average.v is free software; you can redistribute it and/or modify * cmprs_buf_average.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Decode compressor command/modes, reclock some signals * Description: Decode compressor command/modes, reclock some signals
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmprs_cmd_decode.v is free software; you can redistribute it and/or modify * cmprs_cmd_decode.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Synchronizes memory channels (sensor and compressor) * Description: Synchronizes memory channels (sensor and compressor)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmprs_frame_sync.v is free software; you can redistribute it and/or modify * cmprs_frame_sync.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
* stream matching selected color mode, accommodates for the buffer latency, * stream matching selected color mode, accommodates for the buffer latency,
* acts as a pacemaker for the whole compressor (next stages are able to keep up). * acts as a pacemaker for the whole compressor (next stages are able to keep up).
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmprs_macroblock_buf_iface.v is free software; you can redistribute it and/or modify * cmprs_macroblock_buf_iface.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Compressor output FIFO * Description: Compressor output FIFO
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmprs_out_fifo.v is free software; you can redistribute it and/or modify * cmprs_out_fifo.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
* stream matching selected color mode, accommodates for the buffer latency, * stream matching selected color mode, accommodates for the buffer latency,
* acts as a pacemaker for the whole compressor (next stages are able to keep up). * acts as a pacemaker for the whole compressor (next stages are able to keep up).
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmprs_pixel_buf_iface.v is free software; you can redistribute it and/or modify * cmprs_pixel_buf_iface.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Generate compressor status word * Description: Generate compressor status word
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmprs_status.v is free software; you can redistribute it and/or modify * cmprs_status.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Decode mode parameters, registered at pre-start of the macroblock * Description: Decode mode parameters, registered at pre-start of the macroblock
* data to color conversion module * data to color conversion module
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmprs_tile_mode2_decode.v is free software; you can redistribute it and/or modify * cmprs_tile_mode2_decode.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Decode tile/macroblocks parameters from compressor type * Description: Decode tile/macroblocks parameters from compressor type
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmprs_tile_mode_decode.v is free software; you can redistribute it and/or modify * cmprs_tile_mode_decode.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Color processor for JPEG 4:2:0/JP4 * Description: Color processor for JPEG 4:2:0/JP4
* Updating from the earlier 2002-2010 version * Updating from the earlier 2002-2010 version
* *
* Copyright (c) 2002-2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2002-2015 Elphel, Inc.
* color_proc393.v is free software; you can redistribute it and/or modify * color_proc393.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Color space convert: combine differnt color modes * Description: Color space convert: combine differnt color modes
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* csconvert.v is free software; you can redistribute it and/or modify * csconvert.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Color conversion for JP4 mode * Description: Color conversion for JP4 mode
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* csconvert_jp4.v is free software; you can redistribute it and/or modify * csconvert_jp4.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Color conversion for JP4 differential * Description: Color conversion for JP4 differential
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* csconvert_jp4diff.v is free software; you can redistribute it and/or modify * csconvert_jp4diff.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Convert JPEG monochrome * Description: Convert JPEG monochrome
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* csconvert_mono.v is free software; you can redistribute it and/or modify * csconvert_mono.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
* Syncronizes dcc data with dma1 output, adds 16..31 16-bit zero words for Axis DMA * Syncronizes dcc data with dma1 output, adds 16..31 16-bit zero words for Axis DMA
* Was not used in late NC353 camera (DMA channel used fro IMU logger) * Was not used in late NC353 camera (DMA channel used fro IMU logger)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* dcc_sync393.v is free software; you can redistribute it and/or modify * dcc_sync393.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Top module of JPEG/JP4 compressor channel * Description: Top module of JPEG/JP4 compressor channel
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* jp_channel.v is free software; you can redistribute it and/or modify * jp_channel.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Memory controller parameters that need adjustment during training * Description: Memory controller parameters that need adjustment during training
* Target ,pde * Target ,pde
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* x393_cur_params_target.vh is free software; you can redistribute it and/or modify * x393_cur_params_target.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Local parameters for simulation of the x393 * Description: Local parameters for simulation of the x393
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* x393_localparams.vh is free software; you can redistribute it and/or modify * x393_localparams.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Functions used to encode memory controller sequences * Description: Functions used to encode memory controller sequences
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* x393_mcontr_encode_cmd.vh is free software; you can redistribute it and/or modify * x393_mcontr_encode_cmd.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Parameters for the x393 (simulation and implementation) * Description: Parameters for the x393 (simulation and implementation)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* x393_parameters.vh is free software; you can redistribute it and/or modify * x393_parameters.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Simulation-specific parameters for the x393 * Description: Simulation-specific parameters for the x393
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* x393_simulation_parameters.vh is free software; you can redistribute it and/or modify * x393_simulation_parameters.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Simulation tasks for the x393 (low level) * Description: Simulation tasks for the x393 (low level)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* x393_tasks01.vh is free software; you can redistribute it and/or modify * x393_tasks01.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Simulation tasks for the AXI_HP (AFI) * Description: Simulation tasks for the AXI_HP (AFI)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* x393_tasks_afi.vh is free software; you can redistribute it and/or modify * x393_tasks_afi.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Simulation tasks for software reading/writing (with test patterns) * Description: Simulation tasks for software reading/writing (with test patterns)
* of the block buffers. * of the block buffers.
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* x393_tasks_mcntrl_buffers.vh is free software; you can redistribute it and/or modify * x393_tasks_mcntrl_buffers.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Simulation tasks for software reading/writing (with test patterns) * Description: Simulation tasks for software reading/writing (with test patterns)
* of the block buffers. * of the block buffers.
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* x393_tasks_mcntrl_en_dis_priority.vh is free software; you can redistribute it and/or modify * x393_tasks_mcntrl_en_dis_priority.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Simulation tasks for programming I/O delays and other timing * Description: Simulation tasks for programming I/O delays and other timing
* parameters in the memory controller * parameters in the memory controller
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* x393_tasks_mcntrl_timing.vh is free software; you can redistribute it and/or modify * x393_tasks_mcntrl_timing.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Simulation tasks for programming memory transaction * Description: Simulation tasks for programming memory transaction
* sequences (controlles by PS) * sequences (controlles by PS)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* x393_tasks_pio_sequences.vh is free software; you can redistribute it and/or modify * x393_tasks_pio_sequences.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Simulation tasks for mcntrl_ps_pio module (launching software * Description: Simulation tasks for mcntrl_ps_pio module (launching software
* - programmed memory transaction sequences) * - programmed memory transaction sequences)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* x393_tasks_ps_pio.vh is free software; you can redistribute it and/or modify * x393_tasks_ps_pio.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Simulation tasks for the x393 related to status * Description: Simulation tasks for the x393 related to status
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* x393_status.vh is free software; you can redistribute it and/or modify * x393_status.vh is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: 4-to-1 mux to cmbine memory sequences sources * Description: 4-to-1 mux to cmbine memory sequences sources
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_encod_4mux.v is free software; you can redistribute it and/or modify * cmd_encod_4mux.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
* linear command encoders (cmd_encod_linear_rd and cmd_encod_linear_wr) * linear command encoders (cmd_encod_linear_rd and cmd_encod_linear_wr)
* Latency 1 clcok cycle * Latency 1 clcok cycle
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_encod_linear_mux.v is free software; you can redistribute it and/or modify * cmd_encod_linear_mux.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Command sequencer generator for reading a sequential up to 1KB page * Description: Command sequencer generator for reading a sequential up to 1KB page
* single page access, bank and row will not be changed * single page access, bank and row will not be changed
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_encod_linear_rd.v is free software; you can redistribute it and/or modify * cmd_encod_linear_rd.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Combining 2 modules:cmd_encod_linear_rd and cmd_encod_linear_wr * Description: Combining 2 modules:cmd_encod_linear_rd and cmd_encod_linear_wr
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_encod_linear_rw.v is free software; you can redistribute it and/or modify * cmd_encod_linear_rw.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Command sequencer generator for writing a sequential up to 1KB page * Description: Command sequencer generator for writing a sequential up to 1KB page
* single page access, bank and row will not be changed * single page access, bank and row will not be changed
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_encod_linear_wr.v is free software; you can redistribute it and/or modify * cmd_encod_linear_wr.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -10,7 +10,7 @@ ...@@ -10,7 +10,7 @@
* just reading 32 bytes per row instead of the 16 - that eases timing * just reading 32 bytes per row instead of the 16 - that eases timing
* Start burst should be even (LSB is ignored) * Start burst should be even (LSB is ignored)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_encod_tiled_32_rd.v is free software; you can redistribute it and/or modify * cmd_encod_tiled_32_rd.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Combines cmd_encod_tiled_32_rd and cmd_encod_tiled_32_wr modules * Description: Combines cmd_encod_tiled_32_rd and cmd_encod_tiled_32_wr modules
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_encod_tiled_32_rw.v is free software; you can redistribute it and/or modify * cmd_encod_tiled_32_rw.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -10,7 +10,7 @@ ...@@ -10,7 +10,7 @@
* just writing 32 bytes per row instead of the 16 - that eases timing * just writing 32 bytes per row instead of the 16 - that eases timing
* Start burst should be even (LSB is ignored) * Start burst should be even (LSB is ignored)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_encod_tiled_32_wr.v is free software; you can redistribute it and/or modify * cmd_encod_tiled_32_wr.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
* tiled command encoders (cmd_encod_tiled_rd and cmd_encod_tiled_wr) * tiled command encoders (cmd_encod_tiled_rd and cmd_encod_tiled_wr)
* Latency 1 clcok cycle * Latency 1 clcok cycle
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_encod_tiled_mux.v is free software; you can redistribute it and/or modify * cmd_encod_tiled_mux.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -12,7 +12,7 @@ ...@@ -12,7 +12,7 @@
* if number of rows >=8, that port is ignored. If number of rows is less than * if number of rows >=8, that port is ignored. If number of rows is less than
* 5 (less for slower clock) without keep_open_in tRTP may be not matched. * 5 (less for slower clock) without keep_open_in tRTP may be not matched.
* Seems that actual tile heigt mod 8 should be only 0, 6 or7 * Seems that actual tile heigt mod 8 should be only 0, 6 or7
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_encod_tiled_rd.v is free software; you can redistribute it and/or modify * cmd_encod_tiled_rd.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Combines cmd_encod_tiled_rd and cmd_encod_tiled_wr modules * Description: Combines cmd_encod_tiled_rd and cmd_encod_tiled_wr modules
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_encod_tiled_rw.v is free software; you can redistribute it and/or modify * cmd_encod_tiled_rw.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -12,7 +12,7 @@ ...@@ -12,7 +12,7 @@
* if number of rows >=8, that port is ignored. If number of rows is less than * if number of rows >=8, that port is ignored. If number of rows is less than
* 5 (less for slower clock) without keep_open_in tRTP may be not matched. * 5 (less for slower clock) without keep_open_in tRTP may be not matched.
* Seems that actual tile heigt mod 8 should be only 0, 6 or7 * Seems that actual tile heigt mod 8 should be only 0, 6 or7
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_encod_tiled_wr.v is free software; you can redistribute it and/or modify * cmd_encod_tiled_wr.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Top level memory controller for 393 camera, includes channel buffers * Description: Top level memory controller for 393 camera, includes channel buffers
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* mcntrl393.v is free software; you can redistribute it and/or modify * mcntrl393.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Temporary module to interface mcntrl393 control signals * Description: Temporary module to interface mcntrl393 control signals
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* mcntrl393_test01.v is free software; you can redistribute it and/or modify * mcntrl393_test01.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Paged buffer for ddr3 controller read channel * Description: Paged buffer for ddr3 controller read channel
* with address autoincrement. 32 bit external data. * with address autoincrement. 32 bit external data.
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* mcntrl_1kx32r.v is free software; you can redistribute it and/or modify * mcntrl_1kx32r.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Paged buffer for ddr3 controller write channel * Description: Paged buffer for ddr3 controller write channel
* with address autoincrement. 32 bit external data. Extends rd to regen * with address autoincrement. 32 bit external data. Extends rd to regen
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* mcntrl_1kx32w.v is free software; you can redistribute it and/or modify * mcntrl_1kx32w.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Paged buffer for ddr3 controller read channel * Description: Paged buffer for ddr3 controller read channel
* with address autoincrement. Variable width external data * with address autoincrement. Variable width external data
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* mcntrl_buf_rd.v is free software; you can redistribute it and/or modify * mcntrl_buf_rd.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Paged buffer for ddr3 controller write channel * Description: Paged buffer for ddr3 controller write channel
* with address autoincrement. 32 bit external data. Extends rd to regen * with address autoincrement. 32 bit external data. Extends rd to regen
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* mcntrl_buf_wr.v is free software; you can redistribute it and/or modify * mcntrl_buf_wr.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Organize paged R/W from DDR3 memory in scan-line order * Description: Organize paged R/W from DDR3 memory in scan-line order
* with window support * with window support
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* mcntrl_linear_rw.v is free software; you can redistribute it and/or modify * mcntrl_linear_rw.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Read/write channels to DDR3 memory with software-programmable * Description: Read/write channels to DDR3 memory with software-programmable
* command sequence * command sequence
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* mcntrl_ps_pio.v is free software; you can redistribute it and/or modify * mcntrl_ps_pio.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -7,7 +7,7 @@ ...@@ -7,7 +7,7 @@
* Tiles spreading over two different frames is not yet supported (needed for * Tiles spreading over two different frames is not yet supported (needed for
* line-scan mode in JPEG (JP4 - OK) * line-scan mode in JPEG (JP4 - OK)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* mcntrl_tiled_rw.v is free software; you can redistribute it and/or modify * mcntrl_tiled_rw.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: 16-channel memory controller * Description: 16-channel memory controller
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* memctrl16.v is free software; you can redistribute it and/or modify * memctrl16.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: 16-channel programmable DDR memory access scheduler * Description: 16-channel programmable DDR memory access scheduler
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* scheduler16.v is free software; you can redistribute it and/or modify * scheduler16.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Histograms transfer to the system memory over S_AXI * Description: Histograms transfer to the system memory over S_AXI
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* histogram_saxi.v is free software; you can redistribute it and/or modify * histogram_saxi.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: pixel clock line input * Description: pixel clock line input
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* pxd_clock.v is free software; you can redistribute it and/or modify * pxd_clock.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: pixel data line input * Description: pixel data line input
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* pxd_single.v is free software; you can redistribute it and/or modify * pxd_single.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: table based piecewise-linear conversion of 16 -> 8 bit data * Description: table based piecewise-linear conversion of 16 -> 8 bit data
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* sens_gamma.v is free software; you can redistribute it and/or modify * sens_gamma.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Calculates per-color histogram over the specified rectangular region * Description: Calculates per-color histogram over the specified rectangular region
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* sens_histogram.v is free software; you can redistribute it and/or modify * sens_histogram.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Readout multiplexer for 4 histogram modules * Description: Readout multiplexer for 4 histogram modules
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* sens_histogram_mux.v is free software; you can redistribute it and/or modify * sens_histogram_mux.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Sensor interface with 12-bit for parallel bus * Description: Sensor interface with 12-bit for parallel bus
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* sens_parallel12.v is free software; you can redistribute it and/or modify * sens_parallel12.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Top module for a sensor channel * Description: Top module for a sensor channel
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* sensor_channel.v is free software; you can redistribute it and/or modify * sensor_channel.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Cross clock boundary for sensor data, synchronize to HACT * Description: Cross clock boundary for sensor data, synchronize to HACT
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* sensor_fifo.v is free software; you can redistribute it and/or modify * sensor_fifo.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: i2c write-only sequencer to control image sensor * Description: i2c write-only sequencer to control image sensor
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* sensor_i2c.v is free software; you can redistribute it and/or modify * sensor_i2c.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: sensor_i2c with I/O pad elements * Description: sensor_i2c with I/O pad elements
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* sensor_i2c_io.v is free software; you can redistribute it and/or modify * sensor_i2c_io.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Simplified model of AXI_HP read channel (64-bit only) * Description: Simplified model of AXI_HP read channel (64-bit only)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* simul_axi_hp_rd.v is free software; you can redistribute it and/or modify * simul_axi_hp_rd.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Simplified model of AXI_HP write channel (64-bit only) * Description: Simplified model of AXI_HP write channel (64-bit only)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* simul_axi_hp_wr.v is free software; you can redistribute it and/or modify * simul_axi_hp_wr.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -12,7 +12,7 @@ ...@@ -12,7 +12,7 @@
* sequence number to use just 2-byte packets? * sequence number to use just 2-byte packets?
* TODO: add interrupt capabilities * TODO: add interrupt capabilities
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* status_read.v is free software; you can redistribute it and/or modify * status_read.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
* timestamps. Provides seconds (32 bit) and microseconds (20 bits), * timestamps. Provides seconds (32 bit) and microseconds (20 bits),
* allows 24-bit accummulator-based fine adjustment * allows 24-bit accummulator-based fine adjustment
* *
* Copyright (c) 2005-2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2005-2015 Elphel, Inc.
* rtc393.v is free software; you can redistribute it and/or modify * rtc393.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
* Write, advance registers and readout events are supposed to have suffitient * Write, advance registers and readout events are supposed to have suffitient
* pauses between them * pauses between them
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* timestamp_fifo.v is free software; you can redistribute it and/or modify * timestamp_fifo.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Take timestamp snapshot and send the ts message over the 8-bit bus * Description: Take timestamp snapshot and send the ts message over the 8-bit bus
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* timestamp_snapshot.v is free software; you can redistribute it and/or modify * timestamp_snapshot.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: convert byte-parallel timestamp message to parallel sec, usec * Description: convert byte-parallel timestamp message to parallel sec, usec
* compatible to the x353 code (for NC353 camera) * compatible to the x353 code (for NC353 camera)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* timestamp_to_parallel.v is free software; you can redistribute it and/or modify * timestamp_to_parallel.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: convert legacy parallel timestamp data to a byte-parallel message * Description: convert legacy parallel timestamp data to a byte-parallel message
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* timestamp_to_serial.v is free software; you can redistribute it and/or modify * timestamp_to_serial.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: timestamp realrted functionality, extrenal synchronization * Description: timestamp realrted functionality, extrenal synchronization
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* timing393.v is free software; you can redistribute it and/or modify * timing393.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: move data between clk and clk2x (nominally posedge aligned) * Description: move data between clk and clk2x (nominally posedge aligned)
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* clk_to_clk2x.v is free software; you can redistribute it and/or modify * clk_to_clk2x.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Expand command address/data from a byte-wide * Description: Expand command address/data from a byte-wide
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_deser.v is free software; you can redistribute it and/or modify * cmd_deser.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Store/dispatch commands on per-frame basis * Description: Store/dispatch commands on per-frame basis
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_frame_sequencer.v is free software; you can redistribute it and/or modify * cmd_frame_sequencer.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Command multiplexer from 4 channels of frame-based command * Description: Command multiplexer from 4 channels of frame-based command
* sequencers. * sequencers.
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* cmd_seq_mux.v is free software; you can redistribute it and/or modify * cmd_seq_mux.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -5,7 +5,7 @@ ...@@ -5,7 +5,7 @@
* Description: Simple two-register FIFO, no over/under check, * Description: Simple two-register FIFO, no over/under check,
* behaves correctly only for correct inputs * behaves correctly only for correct inputs
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* fifo_2regs.v is free software; you can redistribute it and/or modify * fifo_2regs.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Find index of the maximal of 16 values (masked), 4 cycle latency * Description: Find index of the maximal of 16 values (masked), 4 cycle latency
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* index_max_16.v is free software; you can redistribute it and/or modify * index_max_16.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Finds maximal of two masked values, registers result * Description: Finds maximal of two masked values, registers result
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* masked_max_reg.v is free software; you can redistribute it and/or modify * masked_max_reg.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Registering data from channel buffer to memory controller * Description: Registering data from channel buffer to memory controller
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* mcont_common_chnbuf_reg.v is free software; you can redistribute it and/or modify * mcont_common_chnbuf_reg.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Registering data from channel buffer to memory controller * Description: Registering data from channel buffer to memory controller
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* mcont_from_chnbuf_reg.v is free software; you can redistribute it and/or modify * mcont_from_chnbuf_reg.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Registering data from memory controller to channel buffer * Description: Registering data from memory controller to channel buffer
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* mcont_to_chnbuf_reg.v is free software; you can redistribute it and/or modify * mcont_to_chnbuf_reg.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
* Lowering Fsrc reduces duty cycle proportianally as counter is in src_clk * Lowering Fsrc reduces duty cycle proportianally as counter is in src_clk
* domain. * domain.
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* multipulse_cross_clock.v is free software; you can redistribute it and/or modify * multipulse_cross_clock.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Priority select one of 16 inputs * Description: Priority select one of 16 inputs
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* pri1hot16.v is free software; you can redistribute it and/or modify * pri1hot16.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
* For same frequencies input pulses can have 1:3 duty cycle EXTRA_DLY=0 * For same frequencies input pulses can have 1:3 duty cycle EXTRA_DLY=0
* and 1:5 for EXTRA_DLY=1 * and 1:5 for EXTRA_DLY=1
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* pulse_cross_clock.v is free software; you can redistribute it and/or modify * pulse_cross_clock.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: generate byte-serial status data * Description: generate byte-serial status data
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* status_generate.v is free software; you can redistribute it and/or modify * status_generate.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Routes status data from 16 sources * Description: Routes status data from 16 sources
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* status_router16.v is free software; you can redistribute it and/or modify * status_router16.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: 2:1 status data router/mux * Description: 2:1 status data router/mux
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* status_router2.v is free software; you can redistribute it and/or modify * status_router2.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Routes status data from 4 sources * Description: Routes status data from 4 sources
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* status_router4.v is free software; you can redistribute it and/or modify * status_router4.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Routes status data from 8 sources * Description: Routes status data from 8 sources
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* status_router8.v is free software; you can redistribute it and/or modify * status_router8.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Receive tabble address/data sent by table_ad_transmit * Description: Receive tabble address/data sent by table_ad_transmit
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* table_ad_receive.v is free software; you can redistribute it and/or modify * table_ad_receive.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
* In 32-bit mode we duty cycle is >= 6, so there will always be gaps in * In 32-bit mode we duty cycle is >= 6, so there will always be gaps in
* chn_stb[i] active * chn_stb[i] active
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* table_ad_transmit.v is free software; you can redistribute it and/or modify * table_ad_transmit.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: ddr3 model wrapper to include delays matching hardware * Description: ddr3 model wrapper to include delays matching hardware
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* ddr3_wrap.v is free software; you can redistribute it and/or modify * ddr3_wrap.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Wrapper for IOBUF primitive * Description: Wrapper for IOBUF primitive
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* iobuf.v is free software; you can redistribute it and/or modify * iobuf.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: wrapper for PULLUP primitive * Description: wrapper for PULLUP primitive
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* mpullup.v is free software; you can redistribute it and/or modify * mpullup.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Wrapper for ODDR+OBUFT * Description: Wrapper for ODDR+OBUFT
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* oddr_ss.v is free software; you can redistribute it and/or modify * oddr_ss.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Half-BRAM module wrapper to use as a variable width R/W, no parity * Description: Half-BRAM module wrapper to use as a variable width R/W, no parity
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* ram18_var_w_var_r.v is free software; you can redistribute it and/or modify * ram18_var_w_var_r.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
* width read, using "TDP" mode of RAMB36E1. Same R/W widths in each port. * width read, using "TDP" mode of RAMB36E1. Same R/W widths in each port.
* Does not use parity bits to increase total data width, width down to 1 are valid. * Does not use parity bits to increase total data width, width down to 1 are valid.
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* ramt_var_w_var_r.v is free software; you can redistribute it and/or modify * ramt_var_w_var_r.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
* width read, using "TDP" mode of RAMB36E1. Same R/W widths in each port. * width read, using "TDP" mode of RAMB36E1. Same R/W widths in each port.
* Uses parity bits to increase total data width. Widths down to 9 are valid. * Uses parity bits to increase total data width. Widths down to 9 are valid.
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* ramtp_var_w_var_r.v is free software; you can redistribute it and/or modify * ramtp_var_w_var_r.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: Elphel NC393 camera FPGA top module * Description: Elphel NC393 camera FPGA top module
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* x393.v is free software; you can redistribute it and/or modify * x393.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
* Author: andrey * Author: andrey
* Description: testbench for the initial x393.v simulation * Description: testbench for the initial x393.v simulation
* *
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> . * Copyright (c) 2015 Elphel, Inc.
* x393_testbench01.v is free software; you can redistribute it and/or modify * x393_testbench01.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or
......
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