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Commit 79e0b9a4 authored by Andrey Filippov's avatar Andrey Filippov
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fixed wrong include

parent 6030b5c1
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wrap/ram18t_var_w_var_r.v
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...@@ -101,7 +101,7 @@ module ram18t_var_w_var_r ...@@ -101,7 +101,7 @@ module ram18t_var_w_var_r
parameter WRITE_MODE_B = "NO_CHANGE" //Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE" parameter WRITE_MODE_B = "NO_CHANGE" //Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE"
`ifdef PRELOAD_BRAMS `ifdef PRELOAD_BRAMS
, ,
`include "includes/ram36_declare_init.vh" `include "includes/ram18_declare_init.vh"
`endif `endif
)( )(
input clk_a, // clock for port A input clk_a, // clock for port A
......
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