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Elphel
x393
Commits
64e5e516
Commit
64e5e516
authored
May 13, 2016
by
Andrey Filippov
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added bitsteam selection to Python programs
parent
510a3dc6
Changes
2
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2 changed files
with
9 additions
and
0 deletions
+9
-0
x393_jpeg.py
py393/x393_jpeg.py
+2
-0
x393_utils.py
py393/x393_utils.py
+7
-0
No files found.
py393/x393_jpeg.py
View file @
64e5e516
...
@@ -998,6 +998,7 @@ setup_all_sensors True None 0x4
...
@@ -998,6 +998,7 @@ setup_all_sensors True None 0x4
################## Parallel ##################
################## Parallel ##################
cd /usr/local/verilog/; test_mcntrl.py @hargs
cd /usr/local/verilog/; test_mcntrl.py @hargs
bitstream_set_path /usr/local/verilog/x393_parallel.bit
#fpga_shutdown
#fpga_shutdown
setupSensorsPower "PAR12"
setupSensorsPower "PAR12"
measure_all "*DI"
measure_all "*DI"
...
@@ -1060,6 +1061,7 @@ jpeg_write "img.jpeg" 0 85
...
@@ -1060,6 +1061,7 @@ jpeg_write "img.jpeg" 0 85
################## Serial ####################
################## Serial ####################
cd /usr/local/verilog/; test_mcntrl.py @hargs
cd /usr/local/verilog/; test_mcntrl.py @hargs
bitstream_set_path /usr/local/verilog/x393_hispi.bit
setupSensorsPower "HISPI"
setupSensorsPower "HISPI"
measure_all "*DI"
measure_all "*DI"
setup_all_sensors True None 0xf
setup_all_sensors True None 0xf
...
...
py393/x393_utils.py
View file @
64e5e516
...
@@ -109,6 +109,13 @@ class X393Utils(object):
...
@@ -109,6 +109,13 @@ class X393Utils(object):
print
(
"fpga_shutdown(): Applying PROG_B"
)
print
(
"fpga_shutdown(): Applying PROG_B"
)
self
.
x393_mem
.
write_mem
(
FPGA_DEVCFG_CTRL
,
old_devcfg_ctrl
&
~
(
1
<<
30
))
self
.
x393_mem
.
write_mem
(
FPGA_DEVCFG_CTRL
,
old_devcfg_ctrl
&
~
(
1
<<
30
))
def
bitstream_get_path
(
self
):
return
DEFAULT_BITFILE
def
bitstream_set_path
(
self
,
bitfile
):
global
DEFAULT_BITFILE
DEFAULT_BITFILE
=
bitfile
def
bitstream
(
self
,
def
bitstream
(
self
,
bitfile
=
None
,
bitfile
=
None
,
quiet
=
1
):
quiet
=
1
):
...
...
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