Commit 51d9d5ad authored by Andrey Filippov's avatar Andrey Filippov

working on memory channels synchronization

parent 95bcaf82
[*]
[*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI
[*] Thu Sep 1 21:10:54 2016
[*] Sun Sep 4 16:43:07 2016
[*]
[dumpfile] "/home/eyesis/git/x393-neon/simulation/x393_dut-20160901133543970.fst"
[dumpfile_mtime] "Thu Sep 1 20:31:46 2016"
[dumpfile_size] 118208746
[dumpfile] "/home/eyesis/git/x393-neon/simulation/x393_dut-20160903141950280.fst"
[dumpfile_mtime] "Sat Sep 3 20:58:57 2016"
[dumpfile_size] 219266337
[savefile] "/home/eyesis/git/x393-neon/cocotb/x393_cocotb_02.sav"
[timestart] 115264800
[timestart] 0
[size] 1836 1171
[pos] 1920 23
*-15.820814 115547388 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
*-25.534578 177517388 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] x393_dut.
[treeopen] x393_dut.ddr3_i.ddr3_i.
[treeopen] x393_dut.simul_axi_master_wdata_i.
[treeopen] x393_dut.x393_i.
[treeopen] x393_dut.x393_i.cmd_mux_i.
[treeopen] x393_dut.x393_i.compressor393_i.
[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].
[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.
[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.
[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.
[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_pixel_buf_iface_i.
[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_status_i.
[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[1].
......@@ -31,6 +34,7 @@
[treeopen] x393_dut.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.
[treeopen] x393_dut.x393_i.frame_sequencer_block[0].
[treeopen] x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.
[treeopen] x393_dut.x393_i.mcntrl393_i.
[treeopen] x393_dut.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.
[treeopen] x393_dut.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.
[treeopen] x393_dut.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.phy_top_i.
......@@ -38,6 +42,8 @@
[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].
[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.
[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.
[treeopen] x393_dut.x393_i.sensors393_i.
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_membuf_i.
......@@ -45,10 +51,10 @@
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[2].
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[3].
[treeopen] x393_dut.x393_i.timing393_i.
[sst_width] 266
[sst_width] 251
[signals_width] 293
[sst_expanded] 1
[sst_vpaned_height] 540
[sst_vpaned_height] 641
@820
x393_dut.TEST_TITLE[639:0]
@800200
......@@ -150,7 +156,7 @@ x393_dut.dutm0_xtra_blag[3:0]
x393_dut.dutm0_xtra_rdlag[3:0]
@1401200
-maxi0
@800200
@c00200
-SENSOR1
@28
x393_dut.simul_sensor12bits_i.ARO
......@@ -166,7 +172,7 @@ x393_dut.simul_sensor12bits_i.stopped
x393_dut.simul_sensor12bits_i.DCLK
x393_dut.simul_sensor12bits_i.MCLK
x393_dut.PX1_MCLK
@1000200
@1401200
-SENSOR1
@c00200
-memory_timing
......@@ -406,7 +412,7 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.pxd[11:0]
#{x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0]} (0)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (1)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (2)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (3)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (4)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (5)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (6)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (7)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (8)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (9)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (10)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0] (11)x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.pxd[11:0]
@1001200
-group_end
@800200
@c00200
-scanline0
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_start
......@@ -415,9 +421,9 @@ x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_s
@22
x393_dut.x393_i.sens_frame_run[3:0]
x393_dut.x393_i.cmprs_frame_start_dst[3:0]
@1000200
@1401200
-scanline0
@800200
@c00200
-memory
@28
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_membuf_i.mclk
......@@ -429,7 +435,7 @@ x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.cmd_we
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.cmd_a[3:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.cmd_data[31:0]
@1000200
@1401200
-memory
@c00200
-debug_mmcm_clk
......@@ -451,6 +457,38 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_paral
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_parallel12_i.trigger_mode
@1401200
-debug_mmcm_clk
@28
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.pre_sof_out
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.pre_sof_late
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.sof_late
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.sof_dly
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.eof_in
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.hact_single
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.last_line
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.gamma_bayer[1:0]
@800200
-compressor0
@800022
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.bayer_phase[1:0]
@28
(0)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.bayer_phase[1:0]
(1)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.bayer_phase[1:0]
@1001200
-group_end
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_cmd_decode_i.frame_start_xclk
@22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_cmd_decode_i.bayer_shift_xclk[1:0]
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_cmd_decode_i.ctrl_we_xclk
@22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_cmd_decode_i.bayer_shift_mclk[1:0]
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_cmd_decode_i.ctrl_we_r
@1000200
-compressor0
@200
-
@1401200
-sensor_channel0
@c00200
-par12_hispi_psp4l1
......@@ -491,17 +529,45 @@ x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_membuf_i.waddr[8:0]
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_membuf_i.wpage[1:0]
@1401200
-all_par_hispi
@c00200
@800200
-compressor_0
@22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.frame_number_src[15:0]
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.frame_number_dst[15:0]
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.mclk
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.frame_start_dst
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.cmprs_en
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.cmprs_run
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_cmd_decode_i.cmprs_run_mclk
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_cmd_decode_i.ctrl_we_r
@22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_cmd_decode_i.di_r[30:0]
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.cmprs_standalone
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.reading_frame
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.reading_frame_r
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.frame_started
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.frame_started_mclk
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.first_mb
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.mb_pre_start
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.buf_ready_w
@c00022
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.buf_diff[2:0]
@28
(0)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.buf_diff[2:0]
(1)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.buf_diff[2:0]
(2)x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.buf_diff[2:0]
@1401200
-group_end
@22
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.needed_page[2:0]
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.next_valid[2:0]
@28
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.reset_page_rd
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.frame_done_dst
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.vsync_late
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.reading_frame_r
@200
-
@c00022
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_r[4:0]
@28
......@@ -529,7 +595,11 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.frame_number
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.line_unfinished_src[15:0]
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.frame_number_dst[15:0]
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.line_unfinished_dst[15:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.curr_y[15:0]
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.xfer_grant
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.xfer_need
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.xfer_want
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.suspend
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.frame_done_dst
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.frame_start_xclk
......@@ -539,16 +609,8 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macrob
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.frame_pre_start_r
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.starting
x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macroblock_buf_iface_i.last_mb
@200
-
@22
x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_membuf_i.wpage[1:0]
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.xfer_need
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.xfer_want
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.xfer_grant
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.curr_y[15:0]
@200
-SAXI
@28
......@@ -570,8 +632,80 @@ x393_dut.simul_axi_hp1_wr_i.sim_wr_address[31:0]
x393_dut.simul_axi_hp1_wr_i.sim_wr_data[63:0]
@28
x393_dut.simul_axi_hp1_wr_i.sim_wr_valid
@1401200
@1000200
-compressor_0
@800200
-follow_master
-scanline_linear
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.xfer_page_rst_wr
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.buf_reset_pend
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_start
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_start_late
(1)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_start_r[4:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_start_delayed
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_number_cntr[15:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_linear_wr_sensor_i.frame_number[15:0]
@200
-
@1000200
-scanline_linear
@800200
-mcntrl_tiled
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.xfer_page_rst_rd
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.buf_reset_pend
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_master_pend
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_start_r[4:0]
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.rst_frame_num_w
@c00028
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.rst_frame_num_r[1:0]
@28
(0)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.rst_frame_num_r[1:0]
(1)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.rst_frame_num_r[1:0]
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_number_cntr[15:0]
@1401200
-group_end
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_number_cntr[15:0]
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_number[15:0]
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.cmd_we
@22
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.master_frame[15:0]
@28
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.master_set
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_en
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_finished
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.xfer_page_rst_r
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.chn_rst
@c00022
x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
@28
(0)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(1)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(2)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(3)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(4)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(5)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(6)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(7)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(8)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(9)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(10)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
(11)x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.mode_reg[11:0]
@1401200
-group_end
@200
-
@1000200
-mcntrl_tiled
-follow_master
@c00200
-compressors_all
@28
......@@ -824,10 +958,12 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[2].jp_channel_i.buf_pxd[7:0]
x393_dut.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.buf_pxd[7:0]
@1401200
-compressors_all
@800200
@c00200
-cmdseq_0
@28
x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.frame_sync
@800200
-command_write
@c00022
x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.cmdseq_di[63:0]
@28
......@@ -988,8 +1124,10 @@ x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.wpage_inc[1:0]
x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.cmd_we_ctl_w
@1001200
-group_end
@200
-
@1000200
-command_write
@800200
-command_read
@28
x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.seq_enrun
@22
......@@ -1019,16 +1157,16 @@ x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.read_busy[1:0]
@28
(0)x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.read_busy[1:0]
(1)x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.read_busy[1:0]
x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.conf_send
x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.valid
x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.ackn
@29
x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.mclk
@1001200
-group_end
@1000200
-command_read
@1401200
-cmdseq_0
@800200
@c00200
-cmdseq_mux
@22
x393_dut.x393_i.cmd_seq_mux_i.frame_num0[3:0]
......@@ -1076,9 +1214,9 @@ x393_dut.x393_i.cmd_seq_mux_i.pri_enc_w[1:0]
x393_dut.x393_i.cmd_seq_mux_i.pri_one[3:0]
@28
x393_dut.x393_i.cmd_seq_mux_i.chn_r[1:0]
@1000200
@1401200
-cmdseq_mux
@800200
@c00200
-cmd_mux
@22
x393_dut.x393_i.cmd_mux_i.pre_waddr[13:0]
......@@ -1125,7 +1263,7 @@ x393_dut.x393_i.cmd_mux_i.seq_busy_r[4:0]
@28
x393_dut.x393_i.cmd_mux_i.start_axi_w
x393_dut.x393_i.cmd_mux_i.start_wburst
@1000200
@1401200
-cmd_mux
@800200
-readback
......@@ -1136,7 +1274,7 @@ x393_dut.x393_i.cmd_readback_i.waddr[10:0]
x393_dut.x393_i.cmd_readback_i.wdata[31:0]
@1000200
-readback
@800200
@c00200
-gpio
@28
x393_dut.x393_i.gpio393_i.set_mode_w
......@@ -1232,7 +1370,7 @@ x393_dut.x393_i.gpio393_i.io_pins[9:0]
(9)x393_dut.x393_i.gpio393_i.io_pins[9:0]
@1001200
-group_end
@1000200
@1401200
-gpio
@c00200
-sensor_channel1
......
......@@ -166,6 +166,8 @@ module jp_channel#(
input frame_done_dst, // single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory
// use as 'eot_real' in 353
output suspend, // suspend reading data for this channel - waiting for the source data
// output master_follow, // compressor is following sensor, copy sesnor frame number instead of reset.
output reg [LAST_FRAME_BITS-1:0] frame_number_finished, // valid after stuffer done
......@@ -781,14 +783,14 @@ module jp_channel#(
.mrst (mrst), // input
.xrst (xrst), // input
.cmprs_en (cmprs_en_mclk), // input - @mclk 0 resets immediately
.cmprs_en_extend (cmprs_en_extend), // output
.cmprs_en_extend (cmprs_en_extend), // output
.cmprs_run (cmprs_run_mclk), // input - @mclk enable propagation of vsync_late to frame_start_dst in bonded(sync to src) mode
.cmprs_standalone (cmprs_standalone), // input - @mclk single-cycle: generate a single frame_start_dst in unbonded (not synchronized) mode.
// cmprs_run should be off
.sigle_frame_buf (sigle_frame_buf), // input - memory controller uses a single frame buffer (frame_number_* == 0), use other sync
.vsync_late (vsync_late), // input - @mclk delayed start of frame, @xclk. In 353 it was 16 lines after VACT active
// source channel should already start, some delay give time for sequencer commands
// that should arrive before it
// that should arrive before it, in NC393 it is programmable
.frame_started (first_mb && mb_pre_start), // @xclk started first macroblock (checking for broken frames)
.frame_start_dst (frame_start_dst), // output reg @mclk - trigger receive (tiled) memory channel (it will take care of
// single/repetitive modes itself this output either follows vsync_late (reclocks it)
......
......@@ -35,14 +35,15 @@
* contains all the components and scripts required to completely simulate it
* with at least one of the Free Software programs.
*/
parameter FPGA_VERSION = 32'h039300a8; // parallel, fixing BUG in command sequencer that was missing some commands 79.25%, all met
// parameter FPGA_VERSION = 32'h039300a7; // parallel, changing parameter to reset buffer pages at each frame start. 79.4%, -0.022 (2 paths)
// parameter FPGA_VERSION = 32'h039300a6; // parallel, adding frame sync delays to mcntrl_linear 79.26, mclk and xclk violated
// parameter FPGA_VERSION = 32'h039300a5; // parallel, fixing command sequencer and ARO 80.21%, -0.068
// parameter FPGA_VERSION = 32'h039300a4; // parallel 79.66, -0.1
// parameter FPGA_VERSION = 32'h039300a3; // hispi, after minor interface changes (separated control bits)80.52% -0.163
// parameter FPGA_VERSION = 32'h039300a2; // hispi trying default placement 81.39% not met by -0.183
// parameter FPGA_VERSION = 32'h039300a1; // hispi 81.19%, not met by -0.07
parameter FPGA_VERSION = 32'h039300a9; // parallel, added copying maste-t-slave frame number -0.169(8 paths), 80.28%
// parameter FPGA_VERSION = 32'h039300a8; // parallel, fixing BUG in command sequencer that was missing some commands 79.25%, all met
// parameter FPGA_VERSION = 32'h039300a7; // parallel, changing parameter to reset buffer pages at each frame start. 79.4%, -0.022 (2 paths)
// parameter FPGA_VERSION = 32'h039300a6; // parallel, adding frame sync delays to mcntrl_linear 79.26, mclk and xclk violated
// parameter FPGA_VERSION = 32'h039300a5; // parallel, fixing command sequencer and ARO 80.21%, -0.068
// parameter FPGA_VERSION = 32'h039300a4; // parallel 79.66, -0.1
// parameter FPGA_VERSION = 32'h039300a3; // hispi, after minor interface changes (separated control bits)80.52% -0.163
// parameter FPGA_VERSION = 32'h039300a2; // hispi trying default placement 81.39% not met by -0.183
// parameter FPGA_VERSION = 32'h039300a1; // hispi 81.19%, not met by -0.07
// parameter FPGA_VERSION = 32'h039300a0; // parallel, re-ran after bug fix, %79.38%, not met -0.072
// parameter FPGA_VERSION = 32'h039300a0; // parallel, else same as 9f 78.91%, not met by -0.032
// parameter FPGA_VERSION = 32'h0393009f; // hispi, adding IRQ status register (placemnt "explore") 81.36%, all met - broken on one channel?
......
......@@ -297,6 +297,8 @@
parameter MCONTR_LINTILE_REPEAT = 10, // read/write pages until disabled
parameter MCONTR_LINTILE_DIS_NEED = 11, // disable 'need' request
parameter MCONTR_LINTILE_SKIP_LATE = 12, // skip actual R/W operation when it is too late, advance pointers
parameter MCONTR_LINTILE_COPY_FRAME = 13, // copy frame number from the master channel (single event, not a persistent mode)
parameter MCNTRL_SCANLINE_DLY_WIDTH = 7, // delay start pulse by 1..64 mclk
parameter MCNTRL_SCANLINE_DLY_DEFAULT = 63, // initial delay value for start pulse
......
......@@ -261,6 +261,7 @@ module mcntrl393 #(
parameter MCONTR_LINTILE_REPEAT = 10, // read/write pages until disabled
parameter MCONTR_LINTILE_DIS_NEED = 11, // disable 'need' request
parameter MCONTR_LINTILE_SKIP_LATE = 12, // skip actual R/W operation when it is too late, advance pointers
parameter MCONTR_LINTILE_COPY_FRAME = 13, // copy frame number from the master channel (single event, not a persistent mode)
parameter MCNTRL_SCANLINE_DLY_WIDTH = 7, // delay start pulse by 1..64 mclk
parameter MCNTRL_SCANLINE_DLY_DEFAULT = 63 // initial delay value for start pulse
......@@ -352,7 +353,7 @@ module mcntrl393 #(
output [3:0] cmprs_frame_done_dst, // single-cycle pulse when the full frame (window) was transferred to/from DDR3 memory
// use as 'eot_real' in 353
input [3:0] cmprs_suspend, // suspend reading data for this channel - waiting for the source data
// input [3:0] master_follow, // compressor memory frame should follow that of the sensor channel, instead of reset
// TODO: move line_unfinished and suspend to internals of this module (and control comparator modes)
// Channel 1 - AFI read/write to system memory with scanline linear mode
input frame_start_chn1, // resets page, x,y, and initiates transfer requests (in write mode will wait for next_page)
......@@ -564,6 +565,7 @@ module mcntrl393 #(
wire [3:0] status_cmprs_start;
// Sensor and compressor signals
wire [3:0] sens_frame_set; // sensor memory controller has just set frame number (slave can use to sync)
wire [3:0] sens_want;
wire [3:0] sens_need;
wire [3:0] cmprs_want;
......@@ -1129,7 +1131,8 @@ module mcntrl393 #(
.frame_finished (), // output
.line_unfinished (cmprs_line_unfinished_src[i * FRAME_HEIGHT_BITS +: FRAME_HEIGHT_BITS]), // output[15:0]
.suspend (1'b0), // input
.frame_number (cmprs_frame_number_src[i * LAST_FRAME_BITS +: LAST_FRAME_BITS]),
.frame_number (cmprs_frame_number_src[i * LAST_FRAME_BITS +: LAST_FRAME_BITS]), //output[15:0]
.frame_set (sens_frame_set[i]), // output
.xfer_want (sens_want[i]), // output
.xfer_need (sens_need[i]), // output
.xfer_grant (sens_channel_pgm_en[i]), // input
......@@ -1185,7 +1188,8 @@ module mcntrl393 #(
.MCONTR_LINTILE_RST_FRAME (MCONTR_LINTILE_RST_FRAME),
.MCONTR_LINTILE_SINGLE (MCONTR_LINTILE_SINGLE),
.MCONTR_LINTILE_REPEAT (MCONTR_LINTILE_REPEAT),
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED)
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED),
.MCONTR_LINTILE_COPY_FRAME (MCONTR_LINTILE_COPY_FRAME)
) mcntrl_tiled_rd_compressor_i (
.mrst (mrst), // input
.mclk (mclk), // input
......@@ -1200,7 +1204,10 @@ module mcntrl393 #(
.frame_finished (), // output
.line_unfinished (cmprs_line_unfinished_dst[i * FRAME_HEIGHT_BITS +: FRAME_HEIGHT_BITS]), // output[15:0]
.suspend (cmprs_suspend[i]), // input
.frame_number (cmprs_frame_number_dst[i * LAST_FRAME_BITS +: LAST_FRAME_BITS]),
.frame_number (cmprs_frame_number_dst[i * LAST_FRAME_BITS +: LAST_FRAME_BITS]), // output[15:0]
.master_frame (cmprs_frame_number_src[i * LAST_FRAME_BITS +: LAST_FRAME_BITS]), // input[15:0]
.master_set (sens_frame_set[i]), // input
// .master_follow (master_follow[i]), // input
.xfer_want (cmprs_want[i]), // output
.xfer_need (cmprs_need[i]), // output
.xfer_grant (cmprs_channel_pgm_en[i]), // input
......@@ -1279,6 +1286,7 @@ module mcntrl393 #(
.line_unfinished (line_unfinished_chn1), // output[15:0]
.suspend (suspend_chn1), // input
.frame_number (), // output[15:0] - not used for this channel
.frame_set (), // output
.xfer_want (want_rq1), // output
.xfer_need (need_rq1), // output
.xfer_grant (channel_pgm_en1), // input
......@@ -1352,6 +1360,7 @@ module mcntrl393 #(
.line_unfinished (line_unfinished_chn3), // output[15:0]
.suspend (suspend_chn3), // input
.frame_number (frame_number_chn3),
.frame_set (), // output
.xfer_want (want_rq3), // output
.xfer_need (need_rq3), // output
.xfer_grant (channel_pgm_en3), // input
......@@ -1422,6 +1431,9 @@ module mcntrl393 #(
.line_unfinished (line_unfinished_chn2), // output[15:0]
.suspend (suspend_chn2), // input
.frame_number (frame_number_chn2),
.master_frame (16'b0), // input[15:0]
.master_set (1'b0), // input
// .master_follow (1'b0), // input
.xfer_want (want_rq2), // output
.xfer_need (need_rq2), // output
.xfer_grant (channel_pgm_en2), // input
......@@ -1490,6 +1502,9 @@ module mcntrl393 #(
.line_unfinished (line_unfinished_chn4), // output[15:0]
.suspend (suspend_chn4), // input
.frame_number (frame_number_chn4), // output [15:0]
.master_frame (16'b0), // input[15:0]
.master_set (1'b0), // input
// .master_follow (1'b0), // input
.xfer_want (want_rq4), // output
.xfer_need (need_rq4), // output
.xfer_grant (channel_pgm_en4), // input
......
......@@ -106,6 +106,7 @@ module mcntrl_linear_rw #(
output [FRAME_HEIGHT_BITS-1:0] line_unfinished, // number of the current (unfinished ) line, RELATIVE TO FRAME, NOT WINDOW?.
input suspend, // suspend transfers (from external line number comparator)
output [LAST_FRAME_BITS-1:0] frame_number, // current frame number (for multi-frame ranges)
output frame_set, // frame number is just set to a new value (can be used by slave to sync)
output xfer_want, // "want" data transfer
output xfer_need, // "need" - really need a transfer (only 1 page/ room for 1 page left in a buffer), want should still be set.
input xfer_grant, // sequencer programming access granted, deassert wait/need
......@@ -258,6 +259,8 @@ module mcntrl_linear_rw #(
reg [MCNTRL_SCANLINE_DLY_WIDTH-1:0] start_delay; // how much to delay frame start
wire frame_start_late;
wire set_start_delay_w;
reg buf_reset_pend; // reset buffer page at next (late)frame sync (compressor should be disabled
// if total number of pages in a frame is not multiple of 4
assign frame_number = frame_number_current;
......@@ -277,7 +280,7 @@ module mcntrl_linear_rw #(
assign rst_frame_num_w = cmd_we && (cmd_a== MCNTRL_SCANLINE_MODE) && cmd_data[MCONTR_LINTILE_RST_FRAME];
assign frame_run = busy_r;
assign frame_set = frame_start_r[3];
// Set parameter registers
always @(posedge mclk) begin
if (mrst) mode_reg <= 0;
......@@ -314,7 +317,11 @@ module mcntrl_linear_rw #(
if (mrst) frame_en <= 0;
else if (single_frame_r || repeat_frames) frame_en <= 1;
else if (frame_start_late) frame_en <= 0;
else if (frame_start_late) frame_en <= 0;
// will reset buffer page at next frame start
if (mrst ||frame_start_r[0]) buf_reset_pend <= 0;
else if (rst_frame_num_r) buf_reset_pend <= 1;
if (mrst) frame_number_cntr <= 0;
else if (rst_frame_num_r[0]) frame_number_cntr <= 0;
......@@ -578,10 +585,10 @@ wire start_not_partial= xfer_start_r[0] && !xfer_limited_by_mem_page_r;
else if (!start_not_partial && next_page) page_cntr <= page_cntr + 1;
if (mrst) xfer_page_rst_r <= 1;
else xfer_page_rst_r <= chn_rst || (MCNTRL_SCANLINE_FRAME_PAGE_RESET ? (frame_start_r[0] & cmd_wrmem):1'b0);
else xfer_page_rst_r <= chn_rst || (buf_reset_pend && (MCNTRL_SCANLINE_FRAME_PAGE_RESET ? (frame_start_r[0] & cmd_wrmem):1'b0));
if (mrst) xfer_page_rst_pos <= 1;
else xfer_page_rst_pos <= chn_rst || (MCNTRL_SCANLINE_FRAME_PAGE_RESET ? (frame_start_r[0] & ~cmd_wrmem):1'b0);
else xfer_page_rst_pos <= chn_rst || (buf_reset_pend && (MCNTRL_SCANLINE_FRAME_PAGE_RESET ? (frame_start_r[0] & ~cmd_wrmem):1'b0));
// increment x,y (two cycles)
......
......@@ -81,9 +81,9 @@ module mcntrl_tiled_rw#(
parameter MCONTR_LINTILE_BYTE32 = 6, // use 32-byte wide columns in each tile (false - 16-byte)
parameter MCONTR_LINTILE_RST_FRAME = 8, // reset frame number
parameter MCONTR_LINTILE_SINGLE = 9, // read/write a single page
parameter MCONTR_LINTILE_REPEAT = 10, // read/write pages until disabled
parameter MCONTR_LINTILE_DIS_NEED = 11 // disable 'need' request
parameter MCONTR_LINTILE_REPEAT = 10, // read/write pages until disabled
parameter MCONTR_LINTILE_DIS_NEED = 11, // disable 'need' request
parameter MCONTR_LINTILE_COPY_FRAME = 13 // copy frame number from the master channel (single event, not a persistent mode)
)(
input mrst,
input mclk,
......@@ -105,6 +105,9 @@ module mcntrl_tiled_rw#(
output [FRAME_HEIGHT_BITS-1:0] line_unfinished, // number of the current (unfinished ) line, RELATIVE TO FRAME, NOT WINDOW.
input suspend, // suspend transfers (from external line number comparator)
output [LAST_FRAME_BITS-1:0] frame_number, // current frame number (for multi-frame ranges)
input [LAST_FRAME_BITS-1:0] master_frame, // current frame number of a master channel
input master_set, // master frame number set (1-st cycle when new value is valid)
// input master_follow, // copy master frame number instead of reset @master_set, 0 - ignore master_set
output xfer_want, // "want" data transfer
output xfer_need, // "need" - really need a transfer (only 1 page/ room for 1 page left in a buffer), want should still be set.
input xfer_grant, // sequencer programming access granted, deassert wait/need
......@@ -185,6 +188,7 @@ module mcntrl_tiled_rw#(
wire repeat_frames; // mode bit
wire single_frame_w; // pulse
wire rst_frame_num_w;
wire set_copy_frame_num_w;
reg single_frame_r; // pulse
reg [1:0] rst_frame_num_r; // reset frame number/next start address
reg frame_en; // enable next frame
......@@ -264,6 +268,10 @@ module mcntrl_tiled_rw#(
reg [FRAME_WIDTH_BITS-1:0] start_x; // (programmed) normally 0, copied to curr_x on frame_start
reg [FRAME_HEIGHT_BITS-1:0] start_y; // (programmed) normally 0, copied to curr_y on frame_start
reg xfer_page_done_d; // next cycle after xfer_page_done
reg frame_master_pend; // set frame counter from the master frame number at next master_set
reg set_frame_from_master; // single-clock copy frame counter from the master channel
reg buf_reset_pend; // reset buffer page at next (late)frame sync (compressor should be disabled
// if total number of pages in a frame is not multiple of 4
assign frame_number = frame_number_current;
......@@ -278,10 +286,10 @@ module mcntrl_tiled_rw#(
assign set_window_start_w = cmd_we && (cmd_a== MCNTRL_TILED_WINDOW_STARTXY);
assign set_tile_whs_w = cmd_we && (cmd_a== MCNTRL_TILED_TILE_WHS);
assign single_frame_w = cmd_we && (cmd_a== MCNTRL_TILED_MODE) && cmd_data[MCONTR_LINTILE_SINGLE];
assign rst_frame_num_w = cmd_we && (cmd_a== MCNTRL_TILED_MODE) && cmd_data[MCONTR_LINTILE_RST_FRAME];
assign single_frame_w = cmd_we && (cmd_a== MCNTRL_TILED_MODE) && cmd_data[MCONTR_LINTILE_SINGLE];
assign rst_frame_num_w = cmd_we && (cmd_a== MCNTRL_TILED_MODE) && cmd_data[MCONTR_LINTILE_RST_FRAME];
assign set_copy_frame_num_w = cmd_we && (cmd_a== MCNTRL_TILED_MODE) && cmd_data[MCONTR_LINTILE_COPY_FRAME];
//
// Set parameter registers
always @(posedge mclk) begin
......@@ -293,7 +301,7 @@ module mcntrl_tiled_rw#(
if (mrst) rst_frame_num_r <= 0;
else rst_frame_num_r <= {rst_frame_num_r[0],
rst_frame_num_w |
rst_frame_num_w |
set_start_addr_w |
set_last_frame_w |
set_frame_size_w};
......@@ -321,9 +329,19 @@ module mcntrl_tiled_rw#(
else if (single_frame_r || repeat_frames) frame_en <= 1;
else if (frame_start) frame_en <= 0;
if (mrst) frame_number_cntr <= 0;
else if (rst_frame_num_r[0]) frame_number_cntr <= 0;
else if (frame_start_r[2]) frame_number_cntr <= is_last_frame?{LAST_FRAME_BITS{1'b0}}:(frame_number_cntr+1);
if (mrst ||master_set) frame_master_pend <= 0;
else if (set_copy_frame_num_w) frame_master_pend <= 1;
// will reset buffer page at next frame start
if (mrst ||frame_start_r[0]) buf_reset_pend <= 0;
else if (rst_frame_num_r) buf_reset_pend <= 1;
set_frame_from_master <= master_set && frame_master_pend;
if (mrst) frame_number_cntr <= 0;
else if (rst_frame_num_r[0]) frame_number_cntr <= 0;
else if (set_frame_from_master) frame_number_cntr <= master_frame;
else if (frame_start_r[2]) frame_number_cntr <= is_last_frame?{LAST_FRAME_BITS{1'b0}}:(frame_number_cntr+1);
if (mrst) frame_number_current <= 0;
else if (rst_frame_num_r[0]) frame_number_current <= 0;
......@@ -526,10 +544,10 @@ wire start_not_partial= xfer_start_r[0] && !xfer_limited_by_mem_page_r;
else if (!start_not_partial && next_page) page_cntr <= page_cntr + 1;
if (mrst) xfer_page_rst_r <= 1;
else xfer_page_rst_r <= chn_rst || (MCNTRL_TILED_FRAME_PAGE_RESET ? (frame_start_r[0] & cmd_wrmem):1'b0);
else xfer_page_rst_r <= chn_rst || (buf_reset_pend && (MCNTRL_TILED_FRAME_PAGE_RESET ? (frame_start_r[0] & cmd_wrmem):1'b0));
if (mrst) xfer_page_rst_pos <= 1;
else xfer_page_rst_pos <= chn_rst || (MCNTRL_TILED_FRAME_PAGE_RESET ? (frame_start_r[0] & ~cmd_wrmem):1'b0);
else xfer_page_rst_pos <= chn_rst || (buf_reset_pend && (MCNTRL_TILED_FRAME_PAGE_RESET ? (frame_start_r[0] & ~cmd_wrmem):1'b0));
// increment x,y (two cycles)
if (mrst) curr_x <= 0;
......
......@@ -7,4 +7,4 @@
-c setupSensorsPower "PAR12" all 0 0.0
-c measure_all "*DI"
-c setSensorClock 24.0 "2V5_LVDS"
-c set_rtc # maybe not needed as it can be set differently
-c set_rtc
......@@ -325,7 +325,7 @@ CMPRS_CBIT_CMODE_JP4DIFF__RAW = str
CMPRS_AFIMUX_MASK__TYPE = str
MCONTR_SENS_INC = int
CAMSYNC_TRIG_PERIOD__TYPE = str
CMPRS_STATUS_REG_BASE__RAW = str
SENSIO_STATUS = int
DFLT_DQS_PATTERN = int
SENS_GAMMA_ADDR_DATA__RAW = str
DLY_LANE1_IDELAY__RAW = str
......@@ -386,7 +386,6 @@ CMD_PAUSE_BITS__RAW = str
SENSI2C_TBL_DLY_BITS = int
IDELAY_VALUE__RAW = str
MULTICLK_PHASE_SYNC__TYPE = str
MCONTR_CMPRS_STATUS_BASE = int
BUFFER_DEPTH32 = int
SENS_CTRL_QUADRANTS__TYPE = str
SENS_LENS_BY_MASK__RAW = str
......@@ -428,6 +427,7 @@ MULTICLK_BUF_DLYREF__RAW = str
FCLK0_PERIOD = float
CMDFRAMESEQ_REL__TYPE = str
HISPI_DELAY_CLK0 = str
MCNTRL_SCANLINE_DLY_WIDTH = int
MAX_TILE_WIDTH__RAW = str
PICKLE = str
AFI_SIZE64__TYPE = str
......@@ -517,6 +517,7 @@ MCNTRL_TILED_FRAME_FULL_WIDTH = int
CMDFRAMESEQ_DEPTH = int
SENS_LENS_POST_SCALE__TYPE = str
RTC_MHZ__RAW = str
MCONTR_LINTILE_COPY_FRAME = int
SENSOR_PRIORITY__RAW = str
HIST_SAXI_ADDR_MASK__TYPE = str
SENS_CTRL_LD_DLY = int
......@@ -530,9 +531,11 @@ CMPRS_TABLES__TYPE = str
MCNTRL_PS_STATUS_CNTRL__TYPE = str
MCONTR_PHY_16BIT_ADDR = int
REF_JITTER1__TYPE = str
MCNTRL_TEST01_MASK = int
FFCLK1_DIFF_TERM = str
MULTICLK_PHASE_AXIHP__TYPE = str
FFCLK0_IOSTANDARD__TYPE = str
MCNTRL_SCANLINE_DLY_DEFAULT__TYPE = str
WOI_WIDTH__RAW = str
STATUS_MSB_RSHFT = int
CMPRS_CONTROL_REG__RAW = str
......@@ -546,7 +549,7 @@ MCONTR_BUF4_RD_ADDR__TYPE = str
NUM_CYCLES_16__RAW = str
LD_DLY_LANE0_ODELAY__TYPE = str
MCONTR_TOP_16BIT_ADDR__RAW = str
SENSIO_STATUS = int
MCNTRL_SCANLINE_DLY_WIDTH__RAW = str
HIST_SAXI_MODE_ADDR_REL = int
MCONTR_PHY_0BIT_SDRST_ACT__TYPE = str
BUFFER_DEPTH32__TYPE = str
......@@ -608,9 +611,10 @@ MCNTRL_TILED_MODE = int
MCNTRL_TILED_WINDOW_STARTXY__TYPE = str
CMPRS_COLOR20__TYPE = str
MCNTRL_TEST01_CHN2_STATUS_CNTRL__RAW = str
MCNTRL_SCANLINE_START_DELAY__TYPE = str
LOGGER_CONF_SYN = int
MCNTRL_TILED_CHN4_ADDR__RAW = str
CLK_DIV_PHASE__RAW = str
MCONTR_CMPRS_STATUS_BASE = int
MCONTR_PHY_16BIT_PATTERNS__TYPE = str