Commit 511172e8 authored by Andrey Filippov's avatar Andrey Filippov

added more export to c, added comments

parent 659e1009
This diff is collapsed.
......@@ -147,6 +147,7 @@ class X393ExportC(object):
txt += ' #define PARS_FRAMES 16 ///< Number of frames in a sequencer TODO:// move it here from <uapi/elphel/c313a.h>\n'
txt += ' #define PARS_FRAMES_MASK (PARS_FRAMES-1) ///< Maximal frame number (15 for NC393) TODO:// move it here from <uapi/elphel/c313a.h>\n'
txt += '#endif\n'
txt += 'typedef enum {TABLE_TYPE_QUANT,TABLE_TYPE_CORING,TABLE_TYPE_FOCUS,TABLE_TYPE_HUFFMAN} x393cmprs_tables_t; ///< compressor table type\n'
txt += 'typedef enum {DIRECT,ABSOLUTE,RELATIVE,ASAP} x393cmd_t; ///< How to apply command - directly or through the command sequencer\n'
txt += """// IRQ commands applicable to several targets
#define X393_IRQ_NOP 0
......
......@@ -1052,6 +1052,10 @@ cd /usr/local/verilog/; test_mcntrl.py @hargs-after
specify_phys_memory
specify_window
r
read_control_register 0x431
read_control_register 0x430
#reset
write_cmd_frame_sequencer 0 1 2 0x600 0x5 #stop compressor `
write_cmd_frame_sequencer 0 1 4 0x600 0x4 #reset reset compressor (+2)
......@@ -1059,7 +1063,7 @@ write_cmd_frame_sequencer 0 1 4 0x6c0 0x1c48 # reset reset compressor memo
write_cmd_frame_sequencer 0 1 8 0x6c0 0x3d4b # enable run compressor memory (+2)
write_cmd_frame_sequencer 0 1 8 0x600 0x7 # enable run compressor (+0)
set_qtables all 0 80
set_rtc # maybe not needed as it can be set differently
camsync_setup 0xf # sensor mask - use local timestamps)
......@@ -1087,7 +1091,7 @@ write_sensor_i2c 1 1 0 0x902d000d
#exposure 0x797 (default)
#write_sensor_i2c 1 1 0 0x90090797
#run compressors once (#1 - stop gracefully, 0 - reset, 2 - single, 3 - repetitive with sync to sensors)
set_qtables 1l 0 80
set_qtables 1 0 80
compressor_control 1 3
jpeg_write "img.jpeg" 1 80
......@@ -1791,6 +1795,102 @@ jpeg_sim_multi 4
#write_cmd_frame_sequencer 0 1 4 0x6c0 0x1c49 # stop compressor memory (+0)
#write_cmd_frame_sequencer 0 1 6 0x6c0 0x3d4b # enable run compressor memory (+2)
################## Simulate Parallel 8 ####################
./py393/test_mcntrl.py @py393/cocoargs --simulated=localhost:7777
measure_all "*DI"
setup_all_sensors True None 0xf
set_sensor_io_ctl all None None 1 # Set ARO low - check if it is still needed?
#just testing
set_gpio_ports 1 # enable software gpio pins - just for testing. Also needed for legacy i2c!
set_gpio_pins 0 1 # pin 0 low, pin 1 - high
set_sensor_histogram_window 0 0 4 4 25 21
set_sensor_histogram_window 1 0 4 4 41 21
set_sensor_histogram_window 2 0 4 4 25 41
set_sensor_histogram_window 3 0 4 4 41 41
r
read_control_register 0x430
read_control_register 0x431
write_cmd_frame_sequencer 0 1 2 0x600 0x48 # compressor q page = 1 // too late for frame 2
set_qtables 0 0 80
set_qtables 0 1 70
#irq coming, image not changing - yes
write_cmd_frame_sequencer 0 1 1 0x686 0x280005 #save 4 more lines than sensor has
write_cmd_frame_sequencer 0 1 1 0x680 0x5507 #enable abort
#write_cmd_frame_sequencer 0 1 1 0x6c6 0x300006 #save 4 more lines that compressor has
write_cmd_frame_sequencer 0 1 2 0x600 0x5 #stop compressor `
write_cmd_frame_sequencer 0 1 2 0x680 0x5405 # stop sensor memory (+0) // sensor memory should be controlled first, (9 commands
write_cmd_frame_sequencer 0 1 2 0x6c0 0x5c49 # stop compressor memory (+0)
write_cmd_frame_sequencer 0 1 3 0x686 0x240005 # correct lines
write_cmd_frame_sequencer 0 1 3 0x680 0x5507 # run sensor memory (+1) Can not be 0
write_cmd_frame_sequencer 0 1 4 0x686 0x280005 #save 4 more lines than sensor has
write_cmd_frame_sequencer 0 1 4 0x6c6 0x300006 #save more lines than compressor needs (sensor provides)
write_cmd_frame_sequencer 0 1 4 0x6c0 0x7d4b # run compressor memory (+2)
write_cmd_frame_sequencer 0 1 4 0x600 0x7 # run compressor (+0)
write_cmd_frame_sequencer 0 1 1 0x600 0x48 # compressor q page = 1
write_cmd_frame_sequencer 0 1 4 0x600 0x40 # compressor q page = 0
read_control_register 0x431
read_control_register 0x430
#testing histograms
write_control_register 0x409 0xc0
#sequencer test
#ctrl_cmd_frame_sequencer <num_sensor> <reset=False> <start=False> <stop=False>
ctrl_cmd_frame_sequencer 0 0 1 0
write_cmd_frame_sequencer 0 1 1 0x700 0x6
write_cmd_frame_sequencer 0 1 1 0x700 0x9
write_cmd_frame_sequencer 0 1 1 0x700 0xa0
write_cmd_frame_sequencer 0 1 1 0x700 0x50
write_cmd_frame_sequencer 0 0 3 0x700 0xa000
write_cmd_frame_sequencer 0 1 0 0x700 0x90
write_cmd_frame_sequencer 0 0 2 0x700 0xe00
write_cmd_frame_sequencer 0 0 3 0x700 0xa
write_cmd_frame_sequencer 0 0 2 0x700 0x6
write_cmd_frame_sequencer 0 0 2 0x700 0x9
write_cmd_frame_sequencer 0 0 2 0x700 0x60
write_cmd_frame_sequencer 0 0 2 0x700 0x90
write_cmd_frame_sequencer 0 0 2 0x700 0x600
write_cmd_frame_sequencer 0 0 2 0x700 0x900
r
read_status 0x21
r
#set_sensor_io_dly_hispi all 0x48 0x68 0x68 0x68 0x68
#set_sensor_io_ctl all None None None None None 1 None # load all delays?
compressor_control all None None None None None 2
compressor_interrupt_control all clr
compressor_interrupt_control all en
compressor_control all 3
r
read_status 0x21
r
jpeg_sim_multi 4
r
read_status 0x21
r
jpeg_sim_multi 3
r
read_status 0x21
r
write_cmd_frame_sequencer 0 1 1 0x686 0x240005 # correct lines
write_cmd_frame_sequencer 0 1 1 0x6c6 0x200006 # correct lines
write_cmd_frame_sequencer 0 1 1 0x680 0x5507 # run sensor memory, update frame#, reset buffers
write_cmd_frame_sequencer 0 1 1 0x6c0 0x7d4b # run compressor memory
write_cmd_frame_sequencer 0 1 1 0x600 0x7 # run compressor
jpeg_sim_multi 4
jpeg_sim_multi 4
jpeg_sim_multi 4
################## Serial ####################
......
......@@ -2256,7 +2256,12 @@ class X393SensCmprs(object):
for j in range (merge_num):
d |= data[2* i + j] << (j * (32 // merge_num))
data32.append(d)
t_addr = (t_num << 24) + index* len(data32)
'''
t_addr[23:0] is in BYTES (so *4)
'''
t_addr = (t_num << 24) + index* len(data32) * 4
print("name: %s, merge_num=%d, t_num=%d, len(data32)=%d, index=%d, t_addr=0x%x"%
(item['name'], merge_num, t_num, len(data32), index,t_addr))
self.x393_axi_tasks.write_control_register(reg_addr + 1, t_addr)
for d in data32:
self.x393_axi_tasks.write_control_register(reg_addr, d)
......
......@@ -37,7 +37,7 @@
* with at least one of the Free Software programs.
*/
`timescale 1ns/1ps
// Table address is BYTE address
module table_ad_receive #(
parameter MODE_16_BITS = 1,
parameter NUM_CHN = 1
......
......@@ -39,7 +39,7 @@
* with at least one of the Free Software programs.
*/
`timescale 1ns/1ps
// Table address is BYTE address
module table_ad_transmit#(
parameter NUM_CHANNELS = 1,
parameter ADDR_BITS=4
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment