Commit 4e9d0458 authored by Andrey Filippov's avatar Andrey Filippov
Browse files

merged with framepars branch

parents 59985501 af1e353e

.gitignore

+2 −1
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@@ -57,3 +57,4 @@ cocotb/Makefile 
cocotb/sim_build

cocotb/sim_build

cocotb/results.xml

cocotb/results.xml

*.directory

*.directory

/html.tar.gz

cocotb/x393_cocotb_02.sav

+10 −10
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[*]

[*]

[*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI

[*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI

[*] Wed Sep 14 19:28:33 2016

[*] Tue Sep 20 04:34:10 2016

[*]

[*]

[dumpfile] "/home/eyesis/git/x393-neon/simulation/x393_dut-20160914091637595.fst"

[dumpfile] "/home/eyesis/git/x393-neon/simulation/x393_dut-20160919202856605.fst"

[dumpfile_mtime] "Wed Sep 14 17:55:04 2016"

[dumpfile_mtime] "Tue Sep 20 04:31:39 2016"

[dumpfile_size] 377060747

[dumpfile_size] 93558968

[savefile] "/home/eyesis/git/x393-neon/cocotb/x393_cocotb_02.sav"

[savefile] "/home/eyesis/git/x393-neon/cocotb/x393_cocotb_02.sav"

[timestart] 43511100

[timestart] 42705000

[size] 1814 1171

[size] 1201 767

[pos] 1936 23

[pos] 2223 211

*-14.509074 43557388 77654500 77716800 80133500 86987400 89448000 91674200 91801500 95195280 96480090 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

*-19.051508 43557388 77654500 77716800 80133500 86987400 89448000 91674200 91801500 95195280 96480090 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

[treeopen] x393_dut.

[treeopen] x393_dut.

[treeopen] x393_dut.ddr3_i.ddr3_i.

[treeopen] x393_dut.ddr3_i.ddr3_i.

[treeopen] x393_dut.simul_axi_master_wdata_i.

[treeopen] x393_dut.simul_axi_master_wdata_i.
@@ -73,10 +73,10 @@ 
[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.genblk1.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.genblk1.

[treeopen] x393_dut.x393_i.timing393_i.

[treeopen] x393_dut.x393_i.timing393_i.

[sst_width] 435

[sst_width] 212

[signals_width] 312

[signals_width] 312

[sst_expanded] 1

[sst_expanded] 1

[sst_vpaned_height] 642

[sst_vpaned_height] 380

@820

@820

x393_dut.TEST_TITLE[639:0]

x393_dut.TEST_TITLE[639:0]

@800200

@800200

cocotb/x393_dut.v

+3 −3
Original line number Original line Diff line number Diff line
@@ -677,10 +677,10 @@ module x393_dut#( 












    wire [ 9:0] gpio_pins; // inout[9:0] ([6]-synco0,[7]-syncio0,[8]-synco1,[9]-syncio1)

    wire [ 9:0] gpio_pins; // inout[9:0] ([8]-synco0,[7]-syncio0,[6]-synco1,[9]-syncio1)

// Connect trigger outs to triggets in (#10 needed for Icarus)

// Connect trigger outs to triggets in (#10 needed for Icarus)

assign #10 gpio_pins[7] = gpio_pins[6];

assign #10 gpio_pins[7] = gpio_pins[8];

assign #10 gpio_pins[9] = gpio_pins[8];

assign #10 gpio_pins[9] = gpio_pins[6];





  // DDR3 signals

  // DDR3 signals

    wire        SDRST;

    wire        SDRST;

fpga_version.vh

+4 −2
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@@ -35,7 +35,9 @@ 
 * contains all the components and scripts required to completely simulate it

 * contains all the components and scripts required to completely simulate it

 * with at least one of the Free Software programs.

 * with at least one of the Free Software programs.

 */

 */

        parameter FPGA_VERSION =          32'h039300b7;      //parallel, matching histograms Bayer to gamma bayer -0.011/9, 79.92%

        parameter FPGA_VERSION =          32'h039300b9;      //parallel, correcting RTC (it was 25/24 faster) -0.038/29, 79.64%

//      parameter FPGA_VERSION =          32'h039300b8;      //parallel, working on camsync -0.330/99, 80.52% -> -0.143 /40, 79.88% 

//      parameter FPGA_VERSION =          32'h039300b7;      //parallel, matching histograms Bayer to gamma bayer -0.011/9, 79.92%

//      parameter FPGA_VERSION =          32'h039300b6;      //parallel, working on histograms odd colors bug -0.207 /58,  79.68%

//      parameter FPGA_VERSION =          32'h039300b6;      //parallel, working on histograms odd colors bug -0.207 /58,  79.68%

//      parameter FPGA_VERSION =          32'h039300b5;      //parallel, moving histograms earlier -0.123/30, 79.47 

//      parameter FPGA_VERSION =          32'h039300b5;      //parallel, moving histograms earlier -0.123/30, 79.47 

//      parameter FPGA_VERSION =          32'h039300b4;      //-a parallel, and more - -0.180/33, 80.68 %

//      parameter FPGA_VERSION =          32'h039300b4;      //-a parallel, and more - -0.180/33, 80.68 %

py393/hargs-after

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@@ -6,5 +6,4 @@ 
-c bitstream_set_path /usr/local/verilog/x393_parallel.bit

-c bitstream_set_path /usr/local/verilog/x393_parallel.bit

-c specify_phys_memory

-c specify_phys_memory

-c specify_window

-c specify_window

-c set_qtables all 0 80

-i
 
-i