Commit 49288bf2 authored by Andrey Filippov's avatar Andrey Filippov
Browse files

debugging hardware, added re filters for parameters and macros

parent 9326e242
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+32 −21
Original line number Diff line number Diff line
@@ -351,6 +351,7 @@ USAGE
        line =""
        while True:
            line=raw_input('x393%s--> '%('','(simulated)')[args.simulated]).strip()
            lineList=line.split()
            if not line:
                print ('Use "quit" to exit, "help" - for help')
            elif (line == 'quit') or (line == 'exit'):
@@ -363,8 +364,10 @@ USAGE
                print ('\n"parameters" and "defines" list known defined parameters and macros')
                print ("args.exception=%d, QUIET=%d"%(args.exceptions,QUIET))
                
            elif (len(line) > len("help")) and (line[:len("help")]=='help'):
                helpFilter=line[len('help'):].strip()
#            elif (len(line) > len("help")) and (line[:len("help")]=='help'):
            elif lineList[0] == 'help':
#                helpFilter=line[len('help'):].strip()
                helpFilter=lineList[1] # should not fail
                try:
                    re.match(helpFilter,"")
                except:
@@ -373,11 +376,9 @@ USAGE
                if helpFilter:
                    print
                    for name,val in sorted(callableTasks.items()):
#                       if re.findall(helpFilter,name):
                        if re.match(helpFilter,name):
                            print('=== %s ==='%name)
                            sFuncArgs=getFuncArgsString(name)
#                           print ("Usage: %s %s"%(name,sFuncArgs))
                            docs=callableTasks[name]['docs']
                            if docs:
                                docsl=docs.split("\n")
@@ -386,29 +387,39 @@ USAGE
                                    print ('%s'%l)
                                    #print(docs)
                            print ("     Usage: %s %s\n"%(name,sFuncArgs))
            elif line == 'parameters':
            elif lineList[0] == 'parameters':
                nameFilter = None
                if len(lineList)> 1:
                    nameFilter=lineList[1]
                    try:
                        re.match(nameFilter,"")
                    except:
                        print("Invalid search expression: %s"%nameFilter)
                        nameFilter=None    
                parameters=ivp.getParameters()
                for par,val in sorted(parameters.items()):
                    if (not nameFilter) or re.match(nameFilter,par):
                        try:
                            print (par+" = "+hex(val[0])+" (type = "+val[1]+" raw = "+val[2]+")")        
                        except:
                            print (par+" = "+str(val[0])+" (type = "+val[1]+" raw = "+val[2]+")")
                
                '''
                for par in parameters:
                if nameFilter is None:
                    print("    'parameters' command accepts regular expression as a second parameter to filter the list")        
            elif (lineList[0] == 'defines') or (lineList[0] == 'macros'):
                nameFilter = None
                if len(lineList)> 1:
                    nameFilter=lineList[1]
                    try:
                        print (par+" = "+hex(parameters[par][0])+" (type = "+parameters[par][1]+" raw = "+parameters[par][2]+")")        
                        re.match(nameFilter,"")
                    except:
                        print (par+" = "+str(parameters[par][0])+" (type = "+parameters[par][1]+" raw = "+parameters[par][2]+")")
                '''        

            elif (line == 'defines') or (line == 'macros'):
                        print("Invalid search expression: %s"%nameFilter)
                        nameFilter=None    
                defines= ivp.getDefines()
                for macro,val in sorted(defines.items()):
                    if (not nameFilter) or re.match(nameFilter,macro):
                        print ("`"+macro+": "+str(val))

#                for macro in defines:
#                    print ("`"+macro+": "+defines[macro])        
                if nameFilter is None:
                    print("    'defines' command accepts regular expression as a second parameter to filter the list")        
            else:
                cmdLine=line.split()
                rslt= execTask(cmdLine)
+1 −1
Original line number Diff line number Diff line
@@ -97,7 +97,7 @@ def getParWidthLo(bitRange):
                    
def getParWidth(bitRange):
    wl=getParWidthLo(bitRange)
    print("\n***wl=%s, bitRange=%s"%(str(wl),str(bitRange)))
#    print("\n***wl=%s, bitRange=%s"%(str(wl),str(bitRange)))
#    print("bitRange=%s wl=%s"%(bitRange,str(wl)))
    if not wl:
        return None
+13 −5
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@ from x393_mcntrl_buffers import X393McntrlBuffers
#from verilog_utils import hx, concat, bits, getParWidth 
from verilog_utils import concat #, getParWidth
#from x393_axi_control_status import concat, bits
#from time import sleep 
class X393McntrlTests(object):
    DRY_MODE= True # True
    DEBUG_MODE=1
@@ -55,9 +56,9 @@ class X393McntrlTests(object):
        self.DRY_MODE=    dry_mode
        self.x393_mem=            X393Mem(debug_mode,dry_mode)
        self.x393_axi_tasks=      X393AxiControlStatus(debug_mode,dry_mode)
        self.x393_pio_sequences=  X393PIOSequences(debug_mode,True)
        self.x393_mcntrl_timing=  X393McntrlTiming(debug_mode,True)
        self.x393_mcntrl_buffers= X393McntrlBuffers(debug_mode,True)
        self.x393_pio_sequences=  X393PIOSequences(debug_mode,dry_mode)
        self.x393_mcntrl_timing=  X393McntrlTiming(debug_mode,dry_mode)
        self.x393_mcntrl_buffers= X393McntrlBuffers(debug_mode,dry_mode)
        self.__dict__.update(VerilogParameters.__dict__["_VerilogParameters__shared_state"]) # Add verilog parameters to the class namespace
        try:
            self.verbose=self.VERBOSE
@@ -121,6 +122,7 @@ class X393McntrlTests(object):
            channel 0 buffer data
            I/O delays
            clock phase
            status generation
        <set_per_pin_delays> - 1 - set individual (per-pin) I/O delays, 0 - use common for the whole class         
        """

@@ -145,7 +147,13 @@ class X393McntrlTests(object):
                                                        self.DLY_DM_ODELAY,
                                                        self.DLY_CMDA_ODELAY)
# set clock phase relative to DDR clk
#        print("Debugging: sleeping for 1 second")
#        sleep(1)
        self.x393_mcntrl_timing.axi_set_phase(self.DLY_PHASE);
#        self.x393_axi_tasks.read_all_status()
        
#program status for all used modules to refresh at any bit change        
        self.x393_axi_tasks.program_status_all(3, 0)
        
    def set_all_sequences(self):
        """
+12 −10
Original line number Diff line number Diff line
@@ -52,7 +52,7 @@ class X393Mem(object):
        <data> - 32-bit data to write
        """
        if self.DRY_MODE:
            print ("write_mem(0x%x,0x%x)"%(addr,data))
            print ("simulated: write_mem(0x%x,0x%x)"%(addr,data))
            return
        with open("/dev/mem", "r+b") as f:
            page_addr=addr & (~(self.PAGE_SIZE-1))
@@ -65,7 +65,6 @@ class X393Mem(object):
            mm[page_offs:page_offs+4]=packedData
            if self.DEBUG_MODE > 2:
                print ("0x%08x <== 0x%08x (%d)"%(addr,d,d))
            mm.close()
        '''    
        if MONITOR_EMIO and VEBOSE:
            gpio0=read_mem (0xe000a068)
@@ -82,7 +81,7 @@ class X393Mem(object):
         <addr> - physical byte address
        '''    
        if self.DRY_MODE:
            print ("read_mem(0x%x)"%(addr))
            print ("simulated: read_mem(0x%x)"%(addr))
            return addr # just some data
        with open("/dev/mem", "r+b") as f:
            page_addr=addr & (~(self.PAGE_SIZE-1))
@@ -123,7 +122,10 @@ class X393Mem(object):
                    
        for addr in range (start_addr,end_addr+4,4):
            if (addr == start_addr) or ((addr & 0x3f) == 0):
                print ("\n0x%08x:"%addr,end=""),
                if self.DRY_MODE:
                    print ("\nsimulated: 0x%08x:"%addr,end="")
                else:     
                    print ("\n0x%08x:"%addr,end="")
            d=rslt[(addr-start_addr) >> 2]
            print ("%08x "%d,end=""),
        print("")