Added more code: Farme level scanline memory interface with window,... (0adb43af) · Commits · Elphel / x393

.editor_defines

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		@@ -6,18 +6,22 @@
		// chn 0 is read from memory
		`define def_enable_mem_chn0
		`define def_read_mem_chn0
		`undef def_scanline_chn0

		// chn 1 is write to memory
		`define def_enable_mem_chn1
		`undef def_read_mem_chn1
		`undef def_scanline_chn1

		// chn 2 is read from memory
		`define def_enable_mem_chn2
		`define def_read_mem_chn2
		`define def_scanline_chn2

		// chn 3 is write to memory
		`define def_enable_mem_chn3
		`undef def_read_mem_chn3
		`define def_scanline_chn3

		// chn 4 is disabled
		`undef def_enable_mem_chn4

address_map.txt

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		@@ -57,7 +57,7 @@
		parameter MCONTR_TOP_16BIT_REFRESH_ADDRESS= 'h2, // 10 bits refresh address in the sequencer (PL) memory
		parameter MCONTR_TOP_16BIT_STATUS_CNTRL= 'h3, // 8 bits - write to status control (and debug?)

		0x1100..11ff - 16-bit per-channel memory control
		0x1100..11ff - 32-bit per-channel memory control
		0x1100..110f - control of memory channels 0,1 - PS-controlled sequences
		parameter MCNTRL_PS_ADDR= 'h100,
		parameter MCNTRL_PS_MASK= 'h3e0, // both channels 0 and 1
		@@ -69,6 +69,30 @@
		parameter MCNTRL_PS_STATUS_CNTRL= 'h2,



		============= Add the following (addresses will vary for individual channels)
		parameter ADDRESS_NUMBER= 15,
		parameter COLADDR_NUMBER= 10,
		parameter NUM_XFER_BITS= 6, // number of bits to specify transfer length
		parameter FRAME_WIDTH_BITS= 13, // Maximal frame width - 8-word (16 bytes) bursts
		parameter FRAME_HEIGHT_BITS= 16, // Maximal frame height
		parameter MCNTRL_SCANLINE_ADDR= 'h120,
		parameter MCNTRL_SCANLINE_MASK= 'h3f0, // both channels 0 and 1
		parameter MCNTRL_SCANLINE_MODE= 'h0, // set mode register: {extra_pages[1:0],write_mode,enable,!reset}
		parameter MCNTRL_SCANLINE_STATUS_CNTRL= 'h1, // control status reporting
		parameter MCNTRL_SCANLINE_STARTADDR= 'h2, // 22-bit frame start address (3 CA LSBs==0. BA==0)
		parameter MCNTRL_SCANLINE_FRAME_FULL_WIDTH='h3, // Padded line length (8-row increment), in 8-bursts (16 bytes)
		parameter MCNTRL_SCANLINE_WINDOW_WH= 'h4, // low word - 13-bit window width (0->'n4000), high word - 16-bit frame height (0->'h10000)
		parameter MCNTRL_SCANLINE_WINDOW_X0Y0= 'h5, // low word - 13-bit window left, high word - 16-bit window top
		parameter MCNTRL_SCANLINE_WINDOW_STARTXY= 'h6, // low word - 13-bit start X (relative to window), high word - 16-bit start y
		// Start XY can be used when read command to start from the middle
		// TODO: Add number of blocks to R/W? (blocks can be different) - total length?
		// Read back current address (fro debugging)?
		parameter MCNTRL_SCANLINE_STATUS_REG_ADDR= 'h4,




		// Status read address
		parameter STATUS_ADDR = 'h1400, // AXI write address of status read registers
		parameter STATUS_ADDR_MASK = 'h1400, // AXI write address of status registers

memctrl/cmd_encod_linear_mux.v

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		/*******************************************************************************
		* Module: cmd_encod_linear_mux
		* Date:2015-01-31
		* Author: andrey
		* Description: Multiplex parameters from multiple channels sharing the same
		* linear command encoder (cmd_encod_linear_rd or cmd_encod_linear_wr)
		* Latency 1 clcok cycle
		*
		* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> .
		* cmd_encod_linear_mux.v is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License as published by
		* the Free Software Foundation, either version 3 of the License, or
		* (at your option) any later version.
		*
		* cmd_encod_linear_mux.v is distributed in the hope that it will be useful,
		* but WITHOUT ANY WARRANTY; without even the implied warranty of
		* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		* GNU General Public License for more details.
		*
		* You should have received a copy of the GNU General Public License
		* along with this program. If not, see <http://www.gnu.org/licenses/> .
		*******************************************************************************/
		`timescale 1ns/1ps

		module cmd_encod_linear_mux#(
		parameter ADDRESS_NUMBER= 15,
		parameter COLADDR_NUMBER= 10
		) (
		input clk,
		`ifdef def_scanline_chn0
		input [2:0] bank0, // bank address
		input [ADDRESS_NUMBER-1:0] row0, // memory row
		input [COLADDR_NUMBER-4:0] start_col0, // start memory column in 8-bursts
		input [5:0] num128_0, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start0, // start generating commands
		`endif
		`ifdef def_scanline_chn1
		input [2:0] bank1, // bank address
		input [ADDRESS_NUMBER-1:0] row1, // memory row
		input [COLADDR_NUMBER-4:0] start_col1, // start memory column in 8-bursts
		input [5:0] num128_1, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start1, // start generating commands
		`endif
		`ifdef def_scanline_chn2
		input [2:0] bank2, // bank address
		input [ADDRESS_NUMBER-1:0] row2, // memory row
		input [COLADDR_NUMBER-4:0] start_col2, // start memory column in 8-bursts
		input [5:0] num128_2, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start2, // start generating commands
		`endif
		`ifdef def_scanline_chn3
		input [2:0] bank3, // bank address
		input [ADDRESS_NUMBER-1:0] row3, // memory row
		input [COLADDR_NUMBER-4:0] start_col3, // start memory column in 8-bursts
		input [5:0] num128_3, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start3, // start generating commands
		`endif
		`ifdef def_scanline_chn4
		input [2:0] bank4, // bank address
		input [ADDRESS_NUMBER-1:0] row4, // memory row
		input [COLADDR_NUMBER-4:0] start_col4, // start memory column in 8-bursts
		input [5:0] num128_4, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start4, // start generating commands

		`endif
		`ifdef def_scanline_chn5
		input [2:0] bank5, // bank address
		input [ADDRESS_NUMBER-1:0] row5, // memory row
		input [COLADDR_NUMBER-4:0] start_col5, // start memory column in 8-bursts
		input [5:0] num128_5, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start5, // start generating commands

		`endif
		`ifdef def_scanline_chn6
		input [2:0] bank6, // bank address
		input [ADDRESS_NUMBER-1:0] row6, // memory row
		input [COLADDR_NUMBER-4:0] start_col6, // start memory column in 8-bursts
		input [5:0] num128_6, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start6, // start generating commands
		`endif
		`ifdef def_scanline_chn7
		input [2:0] bank7, // bank address
		input [ADDRESS_NUMBER-1:0] row7, // memory row
		input [COLADDR_NUMBER-4:0] start_col7, // start memory column in 8-bursts
		input [5:0] num128_7, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start7, // start generating commands
		`endif
		`ifdef def_scanline_chn8
		input [2:0] bank8, // bank address
		input [ADDRESS_NUMBER-1:0] row8, // memory row
		input [COLADDR_NUMBER-4:0] start_col8, // start memory column in 8-bursts
		input [5:0] num128_8, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start8, // start generating commands
		`endif
		`ifdef def_scanline_chn9
		input [2:0] bank9, // bank address
		input [ADDRESS_NUMBER-1:0] row9, // memory row
		input [COLADDR_NUMBER-4:0] start_col9, // start memory column in 8-bursts
		input [5:0] num128_9, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start9, // start generating commands
		`endif
		`ifdef def_scanline_chn10
		input [2:0] bank10, // bank address
		input [ADDRESS_NUMBER-1:0] row10, // memory row
		input [COLADDR_NUMBER-4:0] start_col10, // start memory column in 8-bursts
		input [5:0] num128_10, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start10, // start generating commands
		`endif
		`ifdef def_scanline_chn11
		input [2:0] bank11, // bank address
		input [ADDRESS_NUMBER-1:0] row11, // memory row
		input [COLADDR_NUMBER-4:0] start_col11, // start memory column in 8-bursts
		input [5:0] num128_11, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start11, // start generating commands
		`endif
		`ifdef def_scanline_chn12
		input [2:0] bank12, // bank address
		input [ADDRESS_NUMBER-1:0] row12, // memory row
		input [COLADDR_NUMBER-4:0] start_col12, // start memory column in 8-bursts
		input [5:0] num128_12, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start12, // start generating commands
		`endif
		`ifdef def_scanline_chn13
		input [2:0] bank13, // bank address
		input [ADDRESS_NUMBER-1:0] row13, // memory row
		input [COLADDR_NUMBER-4:0] start_col13, // start memory column in 8-bursts
		input [5:0] num128_13, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start13, // start generating commands
		`endif
		`ifdef def_scanline_chn14
		input [2:0] bank14, // bank address
		input [ADDRESS_NUMBER-1:0] row14, // memory row
		input [COLADDR_NUMBER-4:0] start_col14, // start memory column in 8-bursts
		input [5:0] num128_14, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start14, // start generating commands
		`endif
		`ifdef def_scanline_chn15
		input [2:0] bank15, // bank address
		input [ADDRESS_NUMBER-1:0] row15, // memory row
		input [COLADDR_NUMBER-4:0] start_col15, // start memory column in 8-bursts
		input [5:0] num128_15, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start15, // start generating commands
		`endif
		output [2:0] bank, // bank address
		output [ADDRESS_NUMBER-1:0] row, // memory row
		output [COLADDR_NUMBER-4:0] start_col, // start memory column in 8-bursts
		output [5:0] num128, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		output start // start generating commands
		);
		reg [2:0] bank_r; // bank address
		reg [ADDRESS_NUMBER-1:0] row_r; // memory row
		reg [COLADDR_NUMBER-4:0] start_col_r;// start memory column in 8-bursts
		reg [5:0] num128_r; // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		reg start_r; // start generating commands

		wire [2:0] bank_w; // bank address
		wire [ADDRESS_NUMBER-1:0] row_w; // memory row
		wire [COLADDR_NUMBER-4:0] start_col_w;// start memory column in 8-bursts
		wire [5:0] num128_w; // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		wire start_w; // start generating commands

		localparam PAR_WIDTH=3+ADDRESS_NUMBER+COLADDR_NUMBER-3+6+1;
		localparam [PAR_WIDTH-1:0] PAR_DEFAULT=0;
		assign bank = bank_r;
		assign row = row_r;
		assign start_col = start_col_r;
		assign num128 = num128_r;
		assign start = start_r;
		assign {bank_w, row_w, start_col_w, num128_w, start_w} = 0

		`ifdef def_scanline_chn0
		\| (start0?{bank0, row0, start_col0, num128_0,1'b1}:PAR_DEFAULT)
		`endif
		`ifdef def_scanline_chn1
		\| (start1?{bank1, row1, start_col1, num128_1,1'b1}:PAR_DEFAULT)
		`endif
		`ifdef def_scanline_chn2
		\| (start2?{bank2, row2, start_col2, num128_2,1'b1}:PAR_DEFAULT)
		`endif
		`ifdef def_scanline_chn3
		\| (start3?{bank3, row3, start_col3, num128_3,1'b1}:PAR_DEFAULT)
		`endif
		`ifdef def_scanline_chn4
		\| (start4?{bank4, row4, start_col4, num128_4,1'b1}:PAR_DEFAULT)
		`endif
		`ifdef def_scanline_chn5
		\| (start5?{bank5, row5, start_col5, num128_5,1'b1}:PAR_DEFAULT)
		`endif
		`ifdef def_scanline_chn6
		\| (start6?{bank6, row6, start_col6, num128_6,1'b1}:PAR_DEFAULT)
		`endif
		`ifdef def_scanline_chn7
		\| (start7?{bank7, row7, start_col7, num128_7,1'b1}:PAR_DEFAULT)
		`endif
		`ifdef def_scanline_chn8
		\| (start8?{bank8, row8, start_col8, num128_8,1'b1}:PAR_DEFAULT)
		`endif
		`ifdef def_scanline_chn9
		\| (start9?{bank9, row9, start_col9, num128_9,1'b1}:PAR_DEFAULT)
		`endif
		`ifdef def_scanline_chn10
		\| (start10?{bank10, row10, start_col10, num128_10,1'b1}:PAR_DEFAULT)
		`endif
		`ifdef def_scanline_chn11
		\| (start11?{bank11, row11, start_col11, num128_11,1'b1}:PAR_DEFAULT)
		`endif
		`ifdef def_scanline_chn12
		\| (start12?{bank12, row12, start_col12, num128_12,1'b1}:PAR_DEFAULT)
		`endif
		`ifdef def_scanline_chn13
		\| (start13?{bank13, row13, start_col13, num128_13,1'b1}:PAR_DEFAULT)
		`endif
		`ifdef def_scanline_chn14
		\| (start14?{bank14, row14, start_col14, num128_14,1'b1}:PAR_DEFAULT)
		`endif
		`ifdef def_scanline_chn15
		\| (start15?{bank15, row15, start_col15, num128_15,1'b1}:PAR_DEFAULT)
		`endif
		;
		always @ (posedge clk) begin
		if (start_w) begin
		bank_r <= bank_w;
		row_r <= row_w;
		start_col_r <= start_col_w;
		num128_r <= num128_w;
		end
		start_r <= start_w;
		end


		endmodule

memctrl/cmd_encod_linear_rd.v

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		@@ -45,7 +45,7 @@ module cmd_encod_linear_rd #(
		input [2:0] bank_in, // bank address
		input [ADDRESS_NUMBER-1:0] row_in, // memory row
		input [COLADDR_NUMBER-4:0] start_col, // start memory column in 8-bursts
		input [5:0] num128_in, // number of 128-bit words to transfer (8*16 bits) - full burst of 8
		input [5:0] num128_in, // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
		input start, // start generating commands
		output reg [31:0] enc_cmd, // encoded commnad
		output reg enc_wr, // write encoded command

memctrl/mcntrl_linear_rw.v

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