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Elphel
eddr3
Commits
52b99362
Commit
52b99362
authored
Jun 15, 2014
by
Andrey Filippov
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added glbl.v
parent
e00b15e3
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View file @
52b99362
unisims
glbl.v
vivado_*
syntax_*
simulation/*
...
...
glbl.v
0 → 100644
View file @
52b99362
`timescale
1
ps
/
1
ps
module
glbl
()
;
parameter
ROC_WIDTH
=
100000
;
parameter
TOC_WIDTH
=
0
;
//SuppressWarnings VEditor - this value is used in other modules through global reference
wire
GSR
;
//SuppressWarnings VEditor - this value is used in other modules through global reference
wire
GTS
;
//SuppressWarnings VEditor - this value is used in other modules through global reference
wire
PRLD
;
//SuppressWarnings VEditor - this value is used in other modules through global reference
wire
PLL_LOCKG
;
reg
GSR_int
;
reg
GTS_int
;
reg
PRLD_int
;
assign
(
weak1
,
weak0
)
GSR
=
GSR_int
;
assign
(
weak1
,
weak0
)
GTS
=
GTS_int
;
assign
(
weak1
,
weak0
)
PRLD
=
PRLD_int
;
initial
begin
GSR_int
=
1'b1
;
PRLD_int
=
1'b1
;
#(
ROC_WIDTH
)
GSR_int
=
1'b0
;
PRLD_int
=
1'b0
;
end
initial
begin
GTS_int
=
1'b1
;
#(
TOC_WIDTH
)
GTS_int
=
1'b0
;
end
endmodule
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