-
Andrey Filippov authored1563de24
Name |
Last commit
|
Last update |
---|---|---|
.settings | Loading commit data... | |
axi | Loading commit data... | |
ddr3 | Loading commit data... | |
hardware_tests | Loading commit data... | |
memctrl | Loading commit data... | |
phy | Loading commit data... | |
python | Loading commit data... | |
simulation_modules | Loading commit data... | |
unisims_patches | Loading commit data... | |
util_modules | Loading commit data... | |
wrap | Loading commit data... | |
.editor_defines | Loading commit data... | |
.gitignore | Loading commit data... | |
.project | Loading commit data... | |
.pydevproject | Loading commit data... | |
OSERDESE1.diff | Loading commit data... | |
README.md | Loading commit data... | |
ddrc_test01.v | Loading commit data... | |
ddrc_test01.xcf | Loading commit data... | |
ddrc_test01.xdc | Loading commit data... | |
ddrc_test01_testbench.sav | Loading commit data... | |
ddrc_test01_testbench.tf | Loading commit data... | |
ddrc_test01_timing.xdc | Loading commit data... | |
glbl.v | Loading commit data... |