Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Submit feedback
Contribute to GitLab
Sign in
Toggle navigation
X
x393
Project
Project
Details
Activity
Releases
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Commits
Open sidebar
Elphel
x393
Commits
ae33ff53b75893cc97136030a58076a2beedd103
Switch branch/tag
x393
py393
.project
05 Apr, 2019
1 commit
set to parallel
· cc525170
Andrey Filippov
authored
5 years ago
cc525170
03 Mar, 2015
1 commit
creating Python program to pass Verilog parameters to Python FPGA tests
· 4c3995d6
Andrey Filippov
authored
9 years ago
4c3995d6