merged with lwir, fixed wide raw images

fpga_version.vh

@@ -36,7 +36,8 @@
  * with at least one of the Free Software programs.
  */
  
-        parameter FPGA_VERSION =          32'h03930104;      // serial - 17.4 - added RAW mode (for tiff files) timing met
+        parameter FPGA_VERSION =          32'h03930105;      // parallel - 17.4 - fixing wide raw frames
+//      parameter FPGA_VERSION =          32'h03930104;      // parallel - 17.4 - added RAW mode (for tiff files) timing met
 //      parameter FPGA_VERSION =          32'h03930103;      // serial - 17.4 - trigger polarity on GP1 inverted
 //      parameter FPGA_VERSION =          32'h03930102;      // serial - 17.4 - disabling SOF when setting interface, bug fix
 //      parameter FPGA_VERSION =          32'h03930101;      // serial - 17.4 - disabling SOF when setting interface - met

includes/x393_simulation_parameters.vh

@@ -79,10 +79,10 @@
 //    parameter SENSOR_IMAGE_TYPE2 =       "NORM11", // 4",
 //    parameter SENSOR_IMAGE_TYPE3 =       "NORM12",
     
-    parameter SENSOR_IMAGE_TYPE0 =       "NORM13",
-    parameter SENSOR_IMAGE_TYPE1 =       "NORM13",
-    parameter SENSOR_IMAGE_TYPE2 =       "NORM14", // 4",
-    parameter SENSOR_IMAGE_TYPE3 =       "NORM15",
+    parameter SENSOR_IMAGE_TYPE0 =       "TEST01-1044X36", // "NORM13",
+    parameter SENSOR_IMAGE_TYPE1 =       "TEST01-1044X36", // "NORM13",
+    parameter SENSOR_IMAGE_TYPE2 =       "TEST01-1044X36", // "NORM14", // 4",
+    parameter SENSOR_IMAGE_TYPE3 =       "TEST01-1044X36", // "NORM15",
     
 
 
@@ -134,7 +134,7 @@
     parameter HISTOGRAM_START_PAGE =    20'h12345,
     parameter FRAME_WIDTH_ROUND_BITS =   9,  // multiple of 512 pixels (32 16-byte bursts) (11 - ful SDRAM page)
     
-    parameter WOI_WIDTH=                 64,
+    parameter WOI_WIDTH=                 1040, // 64,
     parameter WOI_HEIGHT=                32,
          
     parameter QUADRANTS_PXD_HACT_VACT =  6'h01, // 2 bits each: data-0, hact - 1, vact - 2 

memctrl/mcntrl393.v

@@ -1167,6 +1167,7 @@ module  mcntrl393 #(
                mcntrl_tiled_linear_rw #(
                 .ADDRESS_NUMBER                (ADDRESS_NUMBER),
                 .COLADDR_NUMBER                (COLADDR_NUMBER),
+                .NUM_XFER_BITS                 (NUM_XFER_BITS),
                 .FRAME_WIDTH_BITS              (FRAME_WIDTH_BITS),
                 .FRAME_HEIGHT_BITS             (FRAME_HEIGHT_BITS),
                 .MAX_TILE_WIDTH                (MAX_TILE_WIDTH),

memctrl/mcntrl_tiled_linear_rw.v

@@ -45,6 +45,7 @@
 module  mcntrl_tiled_linear_rw#(
     parameter ADDRESS_NUMBER=                   15,
     parameter COLADDR_NUMBER=                   10,
+    parameter NUM_XFER_BITS=                     6,    // number of bits to specify transfer length - linear mode
     parameter FRAME_WIDTH_BITS=                 13,    // Maximal frame width - 8-word (16 bytes) bursts 
     parameter FRAME_HEIGHT_BITS=                16,    // Maximal frame height 
     parameter MAX_TILE_WIDTH=                   6,     // number of bits to specify maximal tile (width-1) (6 -> 64). Used as NUM_XFER_BITS in LINEAR mode
@@ -594,11 +595,8 @@ module  mcntrl_tiled_linear_rw#(
                 row_left[NUM_XFER_BITS:0]; // 7 bits, max 'h40
 */
             lim_by_tile_width <= (|row_left[FRAME_WIDTH_BITS:MAX_TILE_WIDTH] || (!linear_mode && (row_left[MAX_TILE_WIDTH:0] >= tile_cols)))?
-                                    (linear_mode ? {(MAX_TILE_WIDTH + 1){1'b1}}  : tile_cols):
+                                    (linear_mode ? (1<< NUM_XFER_BITS)  : tile_cols):
                                     row_left[MAX_TILE_WIDTH:0]; // 7 bits, max 'h40
-
-
-                                    
         end
 
 
@@ -722,9 +720,9 @@ wire    start_not_partial= xfer_start_r[0] && !xfer_limited_by_mem_page_r;
         else if (chn_rst || frame_start_r[0])     curr_x <= start_x;
         else if (xfer_start_r[0])                 curr_x <= last_in_row?0: curr_x + num_cols_r; // LINEAR:  xfer_num128_r;
         
-        if (mrst)                                 curr_y <= 0;
+        if (mrst)                                 curr_y <= 0;   
         else if (chn_rst || frame_start_r[0])     curr_y <= start_y;
-        else if (xfer_start_r[0] && last_in_row)  curr_y <= next_y[FRAME_HEIGHT_BITS-1:0];
+        else if (xfer_start_r[0] && last_in_row)  curr_y <= next_y[FRAME_HEIGHT_BITS-1:0];  //FIXME: never happens last_in_row
                
         if      (mrst)                            last_block <= 0;
         else if (chn_rst || !busy_r)              last_block <= 0;

py393/x393_tiff_verilog.py

+from __future__ import division
+from __future__ import print_function
+
+'''
+# Copyright (C) 2015, Elphel.inc.
+# Class to export hardware definitions from Verilog parameters  
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http:#www.gnu.org/licenses/>.
+
+@author:     Andrey Filippov
+@copyright:  2015 Elphel, Inc.
+@license:    GPLv3.0+
+@contact:    andrey@elphel.com
+@deffield    updated: Updated
+'''
+__author__ = "Andrey Filippov"
+__copyright__ = "Copyright 2015, Elphel, Inc."
+__license__ = "GPL"
+__version__ = "3.0+"
+__maintainer__ = "Andrey Filippov"
+__email__ = "andrey@elphel.com"
+__status__ = "Development"
+ 
+from PIL import Image
+import sys
+import numpy as np
+
+try:
+  fname = sys.argv[1]
+except IndexError:
+  fname = "/data_ssd/nc393/elphel393/fpga-elphel/x393/attic/hor-pairs-12b-1044x36.tiff"
+
+try:
+  digits = int(sys.argv[2])
+except:
+  digits = 3
+try:
+  outname = sys.argv[3]
+except IndexError:
+  outname = fname.replace(".tiff",".vh")  
+
+tif = Image.open(fname)
+
+image_array = np.array(tif)
+
+f="%%0%dx"%(digits)
+with open(outname,"w") as outfile:
+    print("//",file=outfile)
+    print("// autogenerated from %s"%(fname),file=outfile)
+    print("//",file=outfile)
+    for image_line in image_array:
+        for pixel in image_line:
+            print(f%(pixel), file=outfile, end = " ")
+        print(file=outfile)
+tif.close()
+
+print ("All done!")
+

simulation_modules/simul_sensor12bits.v

@@ -91,7 +91,8 @@ module   simul_sensor12bits # (
     localparam   t_afterHACT=lline-nbpf-ngp1-ncols;   // 352
     localparam   t_lastline=   nrowa*lline+1;   // 1664
 
-reg   [15:0]   sensor_data[0:4095]; // up to 64 x 64 pixels // SuppressThisWarning VEditor - Will be assigned by $readmem
+//reg   [15:0]   sensor_data[0:4095]; // up to 64 x 64 pixels // SuppressThisWarning VEditor - Will be assigned by $readmem
+reg   [15:0]   sensor_data[0:65535]; // up to 1024 x 64 pixels // SuppressThisWarning VEditor - Will be assigned by $readmem
 //    $readmemh("sensor.dat",sensor_data);
 
 
@@ -114,8 +115,11 @@ wire   [15:0]   cntrd;
 wire         NMRST=!MRST;
 
 
-wire   [5:0] row_index=row[5:0]-new_bayer;
-wire   [5:0] col_index=col[5:0]-new_bayer;
+//wire   [5:0] row_index=row[5:0]-new_bayer;
+//wire   [5:0] col_index=col[5:0]-new_bayer;
+
+wire   [11:0] row_index=row-new_bayer;
+wire   [11:0] col_index=col-new_bayer;
 
 
 // random
@@ -133,13 +137,11 @@ assign      #1   cntrd=   cntr;
 
 
 
-//assign   #tDDO   D   =  OE?   {10{1'bz}}:   ((ihact || ibpf)?   ((ramp)?(col[9:0] + row[9:0]):(d_rand)): 10'b0); // just test pattern
-//assign   #tDDO   D   =  OE?   {10{1'bz}}:   ((ihact || ibpf)?   ((ramp)?(col[9:0] + row[9:0]):(sensor_data[{row_index[5:0],col_index[5:0]}])): 10'b0); // just test pattern
-//assign   #tDDO   D   =  OE?   {12{1'bz}}:   ((ihact || ibpf)?   ((ramp)?(col[11:0] + row[11:0]):(sensor_data[{row_index[5:0],col_index[5:0]}])): 12'b0); // just test pattern
-assign   #tDDO   D   =  OE?   {12{1'bz}}:   ((ihact || ibpf)?   ((ramp)?({row[11:8],8'h0} + col[11:0]):(sensor_data[{row_index[5:0],col_index[5:0]}])): 12'b0); // just test pattern
-//assign   #tDDO   BPF   = ibpf;
-//assign   #tDDO   HACT= ihact;
-//assign   #tDDO   VACT= ivact;
+//assign   #tDDO   D   =  OE?   {12{1'bz}}:   ((ihact || ibpf)?   ((ramp)?({row[11:8],8'h0} + col[11:0]):(sensor_data[{row_index[5:0],col_index[5:0]}])): 12'b0); // just test pattern
+assign   #tDDO   D   =  OE?   {12{1'bz}}:   ((ihact || ibpf)?   ((ramp)?({row[11:8],8'h0} + col[11:0]):(sensor_data[ncols * row_index + col_index])): 12'b0); // just test pattern
+
+
+
 assign   #tDDO1   BPF   = ibpf;
 assign   #tDDO1   HACT= ihact;
 assign   #tDDO1   VACT= ivact;
@@ -189,6 +191,7 @@ initial begin
     else if (SENSOR_IMAGE_TYPE == "NORM14")    $readmemh({`ROOTPATH,"/input_data/sensor_14.dat"},sensor_data);
     else if (SENSOR_IMAGE_TYPE == "NORM15")    $readmemh({`ROOTPATH,"/input_data/sensor_15.dat"},sensor_data);
     else if (SENSOR_IMAGE_TYPE == "NORM16")    $readmemh({`ROOTPATH,"/input_data/sensor_16.dat"},sensor_data);
+    else if (SENSOR_IMAGE_TYPE == "TEST01-1044X36") $readmemh({`ROOTPATH,"/input_data/test01-1044x36.dat"},sensor_data);
     else begin
        $display ("WARNING: Unrecognized sensor image :'%s', using default 'NORM': input_data/sensor.dat",SENSOR_IMAGE_TYPE);
        $readmemh({`ROOTPATH,"/input_data/sensor.dat"},sensor_data);