working on histograms

sensor/sens_gamma.v

@@ -26,9 +26,14 @@ module  sens_gamma #(
     parameter SENS_GAMMA_CTRL =        'h0,
 //    parameter SENS_GAMMA_STATUS =      'h1,
     parameter SENS_GAMMA_TADDR =       'h2,
-    parameter SENS_GAMMA_TDATA =       'h3 // 1.. 2^16, 0 - use HACT
+    parameter SENS_GAMMA_TDATA =       'h3, // 1.. 2^16, 0 - use HACT
 //    parameter SENS_GAMMA_STATUS_REG =  'h32
-    
+    parameter    SENS_GAMMA_MODE_WIDTH = 5, // does not include trig
+    parameter    SENS_GAMMA_MODE_BAYER = 0,
+    parameter    SENS_GAMMA_MODE_PAGE =  2,
+    parameter    SENS_GAMMA_MODE_EN =    3,
+    parameter    SENS_GAMMA_MODE_REPET = 4,
+    parameter    SENS_GAMMA_MODE_TRIG =  5
 ) (
     input         rst,
     input         pclk,   // global clock input, pixel rate (96MHz for MT9P006)
@@ -46,7 +51,8 @@ module  sens_gamma #(
     input         hact_in,
     input         sof_in,    // start of frame, single pclk, input
     input         eof_in,   // end of frame
-    input         trig,
+    input         trig_in,  // external trigger to process a single frame. May be unused (grounded) as there
+                            // is a software trigger option implemented
     output [7:0]  pxd_out,
     output        hact_out,
     output        sof_out,    // start of frame, single pclk, output
@@ -62,7 +68,6 @@ module  sens_gamma #(
     input         status_start // Acknowledge of the first status packet byte (address)
 */    
 );
-    localparam    SENS_GAMMA_MODE_WIDTH=10;
     wire    [1:0] cmd_a;
     wire   [31:0] cmd_data;
     wire          cmd_we;
@@ -110,7 +115,8 @@ module  sens_gamma #(
     reg           pend_trig; // pending trigger (if trig came outside of vblank 
     wire          sof_masked;
     reg           frame_run;
-    
+    wire          trig_soft;
+    wire          trig;
 
     assign        pxd_out = cdata;
     assign        hact_out = hact_d[3];
@@ -120,17 +126,30 @@ module  sens_gamma #(
     assign set_taddr_w =  cmd_we && (cmd_a == SENS_GAMMA_TADDR );
     assign set_tdata_w =  cmd_we && (cmd_a == SENS_GAMMA_TDATA );
     
+/*
     assign bayer =        mode[1:0];
     assign table_page =   mode[2]; // TODO: re-assign?
     assign en_input =     mode[3]; 
     assign repet_mode =   mode[4]; // TODO: re-assign?
+    parameter    SENS_GAMMA_MODE_WIDTH = 5, // does not include trig
+    parameter    SENS_GAMMA_MODE_BAYER = 0,
+    parameter    SENS_GAMMA_MODE_PAGE =  2,
+    parameter    SENS_GAMMA_MODE_EN =    3,
+    parameter    SENS_GAMMA_MODE_REPET = 4,
+    parameter    SENS_GAMMA_MODE_TRIG =  5
+
+*/    
+    assign bayer =        mode[SENS_GAMMA_MODE_BAYER +: 2];
+    assign table_page =   mode[SENS_GAMMA_MODE_PAGE]; // TODO: re-assign?
+    assign en_input =     mode[SENS_GAMMA_MODE_EN]; 
+    assign repet_mode =   mode[SENS_GAMMA_MODE_REPET]; // TODO: re-assign?
     
     assign sync_bayer=hact_d[1] && ~hact_d[2];
     assign interp_data[9:0] = table_base_r[9:0]+table_mult_r[17:8]+table_mult_r[7]; //round
     assign table_mult=table_diff*{1'b0,pxd_in_r3[7:0]}; // 11 bits, signed* 9 bits, positive
     
     assign sof_masked= sof_in && (pend_trig || repet_mode) && en_input;
-    
+    assign trig = trig_in || trig_soft;
     always @ (posedge rst or posedge mclk) begin
         if      (rst)         taddr <= 0;
         else if (set_taddr_w) taddr <= cmd_data[10:0];
@@ -140,7 +159,7 @@ module  sens_gamma #(
     end 
 //    reg           vblank;    // from sof to first hact
 //    reg           pend_trig; // pending trigger (if trig came outside of vblank 
-    
+//SENS_GAMMA_MODE_TRIG    
     always @ (posedge rst or posedge pclk) begin
         if (rst) begin
             mode <= 0;
@@ -233,6 +252,14 @@ module  sens_gamma #(
         .din ({eof_in, sof_masked}), // input[0:0] 
         .dout({eof_out,sof_out})    // output[0:0] 
     );
+    pulse_cross_clock trig_soft_i (
+        .rst       (rst),
+        .src_clk   (mclk),
+        .dst_clk   (pclk),
+        .in_pulse  (cmd_data[SENS_GAMMA_MODE_TRIG] && set_ctrl_w),
+        .out_pulse (trig_soft),
+        .busy      ());
+    
 
 //sof_masked
     ramp_var_w_var_r #(

sensor/sensor_channel.v

@@ -61,6 +61,20 @@ module  sensor_channel#(
     parameter SENSOR_FIFO_2DEPTH = 4,
     parameter SENSOR_FIFO_DELAY =  7,
     
+    parameter SENS_GAMMA_ADDR =        'h338,
+    parameter SENS_GAMMA_ADDR_MASK =   'h3fc,
+    parameter SENS_GAMMA_CTRL =        'h0,
+//    parameter SENS_GAMMA_STATUS =      'h1,
+    parameter SENS_GAMMA_TADDR =       'h2,
+    parameter SENS_GAMMA_TDATA =       'h3, // 1.. 2^16, 0 - use HACT
+//    parameter SENS_GAMMA_STATUS_REG =  'h32
+    parameter SENS_GAMMA_MODE_WIDTH =  5, // does not include trig
+    parameter SENS_GAMMA_MODE_BAYER =  0,
+    parameter SENS_GAMMA_MODE_PAGE =   2,
+    parameter SENS_GAMMA_MODE_EN =     3,
+    parameter SENS_GAMMA_MODE_REPET =  4,
+    parameter SENS_GAMMA_MODE_TRIG =   5,
+    
     parameter IODELAY_GRP ="IODELAY_SENSOR", // may need different for different channels?
     parameter integer IDELAY_VALUE = 0,
     parameter integer PXD_DRIVE = 12,
@@ -101,14 +115,18 @@ module  sensor_channel#(
     inout        sns_pg,
     // programming interface
     input        mclk,     // global clock, half DDR3 clock, synchronizes all I/O through the command port
-    input  [7:0] cmd_ad,      // byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3 
-    input        cmd_stb,     // strobe (with first byte) for the command a/d
+    input  [7:0] cmd_ad_in,      // byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3 
+    input        cmd_stb_in,     // strobe (with first byte) for the command a/d
     output [7:0] status_ad,   // status address/data - up to 5 bytes: A - {seq,status[1:0]} - status[2:9] - status[10:17] - status[18:25]
     output       status_rq,   // input request to send status downstream
     input        status_start // Acknowledge of the first status packet byte (address)
 // (much) more will be added later    
     
 );
+    reg    [7:0] cmd_ad;      // byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3 
+    reg          cmd_stb;     // strobe (with first byte) for the command a/d
+
+
     wire   [7:0] sens_i2c_status_ad;
     wire         sens_i2c_status_rq;
     wire         sens_i2c_status_start;
@@ -127,6 +145,23 @@ module  sensor_channel#(
     wire         hact;    // line active @posedge  ipclk
     wire         sof; // start of frame
     wire         eof; // end of frame
+    
+    wire  [15:0] gamma_pxd_in; 
+    wire         gamma_hact_in;
+    wire         gamma_sof_in;
+    wire         gamma_eof_in;
+    
+    // TODO: insert vignetting and/or flat field, pixel defects before gamma_*_in
+    assign gamma_pxd_in = {pxd[11:0],4'b0};
+    assign gamma_hact_in = hact;
+    assign gamma_sof_in =  sof;
+    assign gamma_eof_in =  eof;
+     
+    
+    always @ (posedge mclk) begin
+        cmd_ad  <= cmd_ad_in; 
+        cmd_stb <= cmd_stb_in;
+    end
 
     status_router2 status_router2_sensori (
         .rst       (rst),                     // input
@@ -252,6 +287,34 @@ module  sensor_channel#(
         .eof         (eof) // output
     );
 
+    sens_gamma #(
+        .SENS_GAMMA_ADDR       (SENS_GAMMA_ADDR),
+        .SENS_GAMMA_ADDR_MASK  (SENS_GAMMA_ADDR_MASK),
+        .SENS_GAMMA_CTRL       (SENS_GAMMA_CTRL),
+        .SENS_GAMMA_TADDR      (SENS_GAMMA_TADDR),
+        .SENS_GAMMA_TDATA      (SENS_GAMMA_TDATA),
+        .SENS_GAMMA_MODE_WIDTH (SENS_GAMMA_MODE_WIDTH),
+        .SENS_GAMMA_MODE_BAYER (SENS_GAMMA_MODE_BAYER),
+        .SENS_GAMMA_MODE_PAGE  (SENS_GAMMA_MODE_PAGE),
+        .SENS_GAMMA_MODE_EN    (SENS_GAMMA_MODE_EN),
+        .SENS_GAMMA_MODE_REPET (SENS_GAMMA_MODE_REPET),
+        .SENS_GAMMA_MODE_TRIG  (SENS_GAMMA_MODE_TRIG)
+    ) sens_gamma_i (
+        .rst         (rst), // input
+        .pclk        (pclk), // input
+        .pxd_in      (gamma_pxd_in), // input[15:0] 
+        .hact_in     (gamma_hact_in), // input
+        .sof_in      (gamma_sof_in), // input
+        .eof_in      (gamma_eof_in), // input
+        .trig_in     (1'b0), // input (use trig_soft)
+        .pxd_out     (gamma_pxd_out), // output[7:0] 
+        .hact_out    (gamma_hact_out), // output
+        .sof_out     (gamma_sof_out), // output
+        .eof_out     (gamma_eof_out), // output
+        .mclk        (mclk), // input
+        .cmd_ad      (cmd_ad), // input[7:0] 
+        .cmd_stb     (cmd_stb) // input
+    );
 
 
 

wrap/ramp_var_w_var_r.v

@@ -243,7 +243,8 @@ module  ramp_64w_64r
 
 endmodule
 
-// Both ports with less than 64 bit widths
+// Both ports with less than 64 bit widths - TODO: see if it is still possible to use SDP
+
 module  ramp_lt64w_lt64r
 #(
   parameter integer REGISTERS    = 0, // 1 - registered output
@@ -292,7 +293,7 @@ module  ramp_lt64w_lt64r
     .READ_WIDTH_B              (0),              // Valid: 0,1,2,4,9,18,36 and in SDP mode - 72 (should be 0 if port is not used)
     .WRITE_WIDTH_A             (0),              // Valid: 0,1,2,4,9,18,36 and in SDP mode - 72 (should be 0 if port is not used)
     .WRITE_WIDTH_B             (PWIDTH_WR),      // Valid: 0,1,2,4,9,18,36 and in SDP mode - 72 (should be 0 if port is not used)
-    .RAM_MODE                  ("SDP"),          // Valid "TDP" (true dual-port) and "SDP" - simple dual-port
+    .RAM_MODE                  ("TDP"),          // Valid "TDP" (true dual-port) and "SDP" - simple dual-port
     .WRITE_MODE_A              ("WRITE_FIRST"),  // Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE"
     .WRITE_MODE_B              ("WRITE_FIRST"),  // Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE"
     .RDADDR_COLLISION_HWCONFIG ("DELAYED_WRITE"),// Valid: "DELAYED_WRITE","PERFORMANCE" (no access to the same page)

wrap/ramt_var_w_var_r.v

@@ -82,7 +82,9 @@ module  ramt_var_w_var_r
   parameter integer REGISTERS_A = 0, // 1 - registered output
   parameter integer REGISTERS_B = 0, // 1 - registered output
   parameter integer LOG2WIDTH_A = 5,  // WIDTH= 9  << (LOG2WIDTH - 3)
-  parameter integer LOG2WIDTH_B = 5   // WIDTH= 9  << (LOG2WIDTH - 3)
+  parameter integer LOG2WIDTH_B = 5,  // WIDTH= 9  << (LOG2WIDTH - 3)
+  parameter WRITE_MODE_A =        "NO_CHANGE", //Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE"
+  parameter WRITE_MODE_B =        "NO_CHANGE"  //Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE"
  )(
       input                               clk_a,     // clock for port A
       input            [14-LOG2WIDTH_A:0] addr_a,    // address port A
@@ -132,8 +134,8 @@ module  ramt_var_w_var_r
     .WRITE_WIDTH_A             (PWIDTH_A),              // Valid: 0,1,2,4,9,18,36 and in SDP mode - 72 (should be 0 if port is not used)
     .WRITE_WIDTH_B             (PWIDTH_B),       // Valid: 0,1,2,4,9,18,36 and in SDP mode - 72 (should be 0 if port is not used)
     .RAM_MODE                  ("TDP"),          // Valid "TDP" (true dual-port) and "SDP" - simple dual-port
-    .WRITE_MODE_A              ("WRITE_FIRST"),  // Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE"
-    .WRITE_MODE_B              ("WRITE_FIRST"),  // Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE"
+    .WRITE_MODE_A              (WRITE_MODE_A),   // Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE"
+    .WRITE_MODE_B              (WRITE_MODE_B),   // Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE"
     .RDADDR_COLLISION_HWCONFIG ("DELAYED_WRITE"),// Valid: "DELAYED_WRITE","PERFORMANCE" (no access to the same page)
     .SIM_COLLISION_CHECK       ("ALL"),          // Valid: "ALL", "GENERATE_X_ONLY", "NONE", and "WARNING_ONLY"
     .INIT_FILE                 ("NONE"),         // "NONE" or filename with initialization data

wrap/ramtp_var_w_var_r.v

@@ -82,7 +82,9 @@ module  ramtp_var_w_var_r
   parameter integer REGISTERS_A = 0, // 1 - registered output
   parameter integer REGISTERS_B = 0, // 1 - registered output
   parameter integer LOG2WIDTH_A = 5,  // WIDTH= 9  << (LOG2WIDTH - 3)
-  parameter integer LOG2WIDTH_B = 5   // WIDTH= 9  << (LOG2WIDTH - 3)
+  parameter integer LOG2WIDTH_B = 5,  // WIDTH= 9  << (LOG2WIDTH - 3)
+  parameter WRITE_MODE_A =        "NO_CHANGE", //Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE"
+  parameter WRITE_MODE_B =        "NO_CHANGE"  //Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE"
  )(
       input                               clk_a,     // clock for port A
       input            [14-LOG2WIDTH_A:0] addr_a,    // address port A
@@ -140,8 +142,8 @@ module  ramtp_var_w_var_r
     .WRITE_WIDTH_A             (PWIDTH_A),              // Valid: 0,1,2,4,9,18,36 and in SDP mode - 72 (should be 0 if port is not used)
     .WRITE_WIDTH_B             (PWIDTH_B),       // Valid: 0,1,2,4,9,18,36 and in SDP mode - 72 (should be 0 if port is not used)
     .RAM_MODE                  ("TDP"),          // Valid "TDP" (true dual-port) and "SDP" - simple dual-port
-    .WRITE_MODE_A              ("WRITE_FIRST"),  // Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE"
-    .WRITE_MODE_B              ("WRITE_FIRST"),  // Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE"
+    .WRITE_MODE_A              (WRITE_MODE_A),   // Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE"
+    .WRITE_MODE_B              (WRITE_MODE_B),   // Valid: "WRITE_FIRST", "READ_FIRST", "NO_CHANGE"
     .RDADDR_COLLISION_HWCONFIG ("DELAYED_WRITE"),// Valid: "DELAYED_WRITE","PERFORMANCE" (no access to the same page)
     .SIM_COLLISION_CHECK       ("ALL"),          // Valid: "ALL", "GENERATE_X_ONLY", "NONE", and "WARNING_ONLY"
     .INIT_FILE                 ("NONE"),         // "NONE" or filename with initialization data