Commit ed8c5ddb authored by Andrey Filippov's avatar Andrey Filippov

fixed SFE detection in vospi mode - added pullup. v. 03930139

parent b0a25b6a
...@@ -35,7 +35,8 @@ ...@@ -35,7 +35,8 @@
* contains all the components and scripts required to completely simulate it * contains all the components and scripts required to completely simulate it
* with at least one of the Free Software programs. * with at least one of the Free Software programs.
*/ */
parameter FPGA_VERSION = 32'h03930138; // Fixing output trigger in free running mode parameter FPGA_VERSION = 32'h03930139; // Adding pullup on senspgm
// parameter FPGA_VERSION = 32'h03930138; // Fixing output trigger in free running mode
// parameter FPGA_VERSION = 32'h03930137; // longer reset, sync output // parameter FPGA_VERSION = 32'h03930137; // longer reset, sync output
// parameter FPGA_VERSION = 32'h03930136; // Fiixing spi_seq // parameter FPGA_VERSION = 32'h03930136; // Fiixing spi_seq
// parameter FPGA_VERSION = 32'h03930135; // Adding multi-cam reset // parameter FPGA_VERSION = 32'h03930135; // Adding multi-cam reset
......
...@@ -645,7 +645,8 @@ module sens_lepton3 #( ...@@ -645,7 +645,8 @@ module sens_lepton3 #(
.O(mipi_clkn_int), // output - currently not used .O(mipi_clkn_int), // output - currently not used
.I(mipi_clkn) // inout I/O pad .I(mipi_clkn) // inout I/O pad
); );
mpullup i_senspgm_pullup(senspgm);
iobuf #( // senspgm iobuf #( // senspgm
.DRIVE (VOSPI_DRIVE), .DRIVE (VOSPI_DRIVE),
.IBUF_LOW_PWR (VOSPI_IBUF_LOW_PWR), .IBUF_LOW_PWR (VOSPI_IBUF_LOW_PWR),
......
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Copyright 1986-2017 Xilinx, Inc. All Rights Reserved. Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.
------------------------------------------------------------------------------------ ------------------------------------------------------------------------------------
| Tool Version : Vivado v.2017.4 (lin64) Build 2086221 Fri Dec 15 20:54:30 MST 2017 | Tool Version : Vivado v.2017.4 (lin64) Build 2086221 Fri Dec 15 20:54:30 MST 2017
| Date : Mon May 6 22:52:34 2019 | Date : Mon May 20 11:20:49 2019
| Host : elphel-desktop running 64-bit Ubuntu 14.04.5 LTS | Host : elphel-desktop running 64-bit Ubuntu 14.04.5 LTS
| Command : report_timing_summary -file vivado_build/x393.timing_summary_impl | Command : report_timing_summary -file vivado_build/x393.timing_summary_impl
| Design : x393 | Design : x393
......
Copyright 1986-2017 Xilinx, Inc. All Rights Reserved. Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.
------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------
| Tool Version : Vivado v.2017.4 (lin64) Build 2086221 Fri Dec 15 20:54:30 MST 2017 | Tool Version : Vivado v.2017.4 (lin64) Build 2086221 Fri Dec 15 20:54:30 MST 2017
| Date : Mon May 6 22:52:43 2019 | Date : Mon May 20 11:20:59 2019
| Host : elphel-desktop running 64-bit Ubuntu 14.04.5 LTS | Host : elphel-desktop running 64-bit Ubuntu 14.04.5 LTS
| Command : report_utilization -file vivado_build/x393_vospi_utilization.report | Command : report_utilization -file vivado_build/x393_vospi_utilization.report
| Design : x393 | Design : x393
...@@ -222,8 +222,8 @@ Table of Contents ...@@ -222,8 +222,8 @@ Table of Contents
| IDELAYE2_FINEDELAY | 18 | IO | | IDELAYE2_FINEDELAY | 18 | IO |
| IBUF_IBUFDISABLE | 18 | IO | | IBUF_IBUFDISABLE | 18 | IO |
| ISERDESE2 | 16 | IO | | ISERDESE2 | 16 | IO |
| PULLUP | 12 | I/O |
| BUFG | 11 | Clock | | BUFG | 11 | Clock |
| PULLUP | 8 | I/O |
| FDPE | 8 | Flop & Latch | | FDPE | 8 | Flop & Latch |
| ODDR | 5 | IO | | ODDR | 5 | IO |
| OBUFTDS_DCIEN | 4 | IO | | OBUFTDS_DCIEN | 4 | IO |
......
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