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x393
Commit e5eb5f5e authored by Andrey Filippov's avatar Andrey Filippov
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Merge branch 'master' of github.com:Elphel/x393

parents 54b2c930 06f0bf49
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install.sh
View file @ e5eb5f5e
...@@ -16,7 +16,10 @@ install -v -m 0644 $SCRIPTPATH/*.bit $1/usr/local/verilog/ ...@@ -16,7 +16,10 @@ install -v -m 0644 $SCRIPTPATH/*.bit $1/usr/local/verilog/
install -v -m 0644 $SCRIPTPATH/system_defines.vh $1/usr/local/verilog/ install -v -m 0644 $SCRIPTPATH/system_defines.vh $1/usr/local/verilog/
install -v -m 0644 $SCRIPTPATH/includes/x393_parameters.vh $1/usr/local/verilog/ install -v -m 0644 $SCRIPTPATH/includes/x393_parameters.vh $1/usr/local/verilog/
install -v -m 0644 $SCRIPTPATH/includes/x393_localparams.vh $1/usr/local/verilog/ install -v -m 0644 $SCRIPTPATH/includes/x393_localparams.vh $1/usr/local/verilog/
install -v -m 0644 $SCRIPTPATH/py393/hargs $1/usr/local/verilog/ install -v -m 0644 $SCRIPTPATH/py393/hargs $1/usr/local/verilog/
install -v -m 0644 $SCRIPTPATH/py393/hargs-auto $1/usr/local/verilog/ install -v -m 0644 $SCRIPTPATH/py393/hargs-auto $1/usr/local/verilog/
install -v -m 0644 $SCRIPTPATH/py393/includes $1/usr/local/verilog/
install -v -m 0644 $SCRIPTPATH/py393/startup5 $1/usr/local/verilog/
install -v -m 0644 $SCRIPTPATH/py393/startup14 $1/usr/local/verilog/
exit 0 exit 0
py393/includes 0 → 100644
View file @ e5eb5f5e
-d TARGET_MODE=1
-f /usr/local/verilog/system_defines.vh
-f /usr/local/verilog/x393_parameters.vh /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh
-l /usr/local/verilog/x393_cur_params_target.vh
-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle
py393/startup14 0 → 100644
View file @ e5eb5f5e
-d TARGET_MODE=1
-f /usr/local/verilog/system_defines.vh
-f /usr/local/verilog/x393_parameters.vh /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh
-l /usr/local/verilog/x393_cur_params_target.vh
-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle
-c copy /usr/local/bin/imgsrv.py /www/pages
-c bitstream_set_path /usr/local/verilog/x393_hispi.bit
-c setupSensorsPower "PAR12"
-c measure_all "*DI"
-c setup_all_sensors True None 0xf
-c compressor_control all None None None None None 3
-c program_gamma all 0 0.57 0.04
-c set_qtables all 0 80
-c write_sensor_i2c all 1 0 0x030600b4
-c write_sensor_i2c all 1 0 0x31c68400
-c write_sensor_i2c all 1 0 0x306e9280
-c write_sensor_i2c all 1 0 0x301a001c
-c write_sensor_i2c all 1 0 0x3028000a
-c write_sensor_i2c all 1 0 0x302c000d
-c write_sensor_i2c all 1 0 0x302e0010
-c write_sensor_i2c all 1 0 0x30120060
-P 8888
-c compressor_control all 2 None None None None None
-x
-i
py393/startup5 0 → 100644
View file @ e5eb5f5e
-d TARGET_MODE=1
-f /usr/local/verilog/system_defines.vh
-f /usr/local/verilog/x393_parameters.vh /usr/local/verilog/x393_cur_params_target.vh /usr/local/verilog/x393_localparams.vh
-l /usr/local/verilog/x393_cur_params_target.vh
-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle
-c copy /usr/local/bin/imgsrv.py /www/pages
-c bitstream_set_path /usr/local/verilog/x393_parallel.bit
-c setupSensorsPower "PAR12"
-c measure_all "*DI"
-c setup_all_sensors True None 0xf
-c set_sensor_io_ctl 0 None None None None None 0 0xe
-c set_sensor_io_ctl 1 None None None None None 0 0xe
-c set_sensor_io_ctl 2 None None None None None 0 0xe
-c set_sensor_io_ctl 3 None None None None None 0 0xe
-c compressor_control all None None None None None 3
-c write_sensor_i2c all 1 0 0x90040a23
-c axi_write_single_w 0x696 0x079800a3
-c axi_write_single_w 0x686 0x079800a3
-c axi_write_single_w 0x6a6 0x079800a3
-c axi_write_single_w 0x6b6 0x079800a3
-c program_gamma all 0 0.57 0.04
-c set_qtables all 0 80
-c write_sensor_i2c all 1 0 0x9035000a
-c write_sensor_i2c all 1 0 0x902c000e
-c write_sensor_i2c all 1 0 0x902d000d
-c write_sensor_i2c all 1 0 0x90090100
-P 8888
-c compressor_control all 2 None None None None None
-x
-i
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