adding trigger decimation

fpga_version.vh

@@ -35,7 +35,8 @@
  * contains all the components and scripts required to completely simulate it
  * with at least one of the Free Software programs.
  */
-   parameter FPGA_VERSION = 32'h03931001; // parallel, fixing delays  
+   parameter FPGA_VERSION = 32'h03931002; // parallel, adding camsync trigger decimation  
+// parameter FPGA_VERSION = 32'h03931001; // parallel, fixing delays  // git commit
 // parameter FPGA_VERSION = 32'h03930220; // pull down ot serial in to detect sensor presense NOT created 
 // parameter FPGA_VERSION = 32'h0393021f; // (ext resistor) low_pwr, DIFF_SSTL18_I pclk phase 0.0 mmcm phase -22.5 (multiple of 1.5) 
 // parameter FPGA_VERSION = 32'h0393021e; // internal 100ohm,  low_pwr, LVDS_25 pclk phase 0.0 mmcm phase -22.5 (multiple of 1.5) 

includes/x393_parameters.vh

@@ -958,6 +958,9 @@
     parameter RTC_SEC_USEC_ADDR =          'h32,  // ..'h33 address where seconds of the snapshot can be read (microseconds - next address)
     parameter RTC_MASK =                   'h7fc,
     parameter CAMSYNC_MASK =               'h7f8,
+    parameter CAMSYNC_DECIMATE_ADDR =      'h714,
+    parameter CAMSYNC_DECIMATE_MASK =      'h7fc,
+    parameter CAMSYNC_DECIMATE_BITS =      16,
     parameter CAMSYNC_MODE =               'h0,
     parameter CAMSYNC_TRIG_SRC =           'h1, // setup trigger source
     parameter CAMSYNC_TRIG_DST =           'h2, // setup trigger destination line(s)

py393/vrlg.py

@@ -217,6 +217,15 @@ CAMSYNC_ADDR__TYPE = str
 CAMSYNC_CHN_EN_BIT = int
 CAMSYNC_CHN_EN_BIT__RAW = str
 CAMSYNC_CHN_EN_BIT__TYPE = str
+CAMSYNC_DECIMATE_ADDR = int
+CAMSYNC_DECIMATE_ADDR__RAW = str
+CAMSYNC_DECIMATE_ADDR__TYPE = str
+CAMSYNC_DECIMATE_BITS = int
+CAMSYNC_DECIMATE_BITS__RAW = str
+CAMSYNC_DECIMATE_BITS__TYPE = str
+CAMSYNC_DECIMATE_MASK = int
+CAMSYNC_DECIMATE_MASK__RAW = str
+CAMSYNC_DECIMATE_MASK__TYPE = str
 CAMSYNC_DELAY = int
 CAMSYNC_DELAY__RAW = str
 CAMSYNC_DELAY__TYPE = str

py393/x393_export_c.py

@@ -1113,6 +1113,13 @@ class X393ExportC(object):
             (("X393_CAMSYNC_TRIG_PERIOD",                 c,  vrlg.CAMSYNC_TRIG_PERIOD +             ba, 0, z3,   "u32*", "rw",                     "CAMSYNC trigger period")),
             (("X393_CAMSYNC_TRIG_DELAY",                  c,  vrlg.CAMSYNC_TRIG_DELAY0 +             ba, 1, z3,   "u32*", "rw",                     "CAMSYNC trigger delay"))]
         
+        ba = vrlg.CAMSYNC_DECIMATE_ADDR
+        ia = 0
+        c =  "sens_chn"
+        sdefines +=[
+            (('CAMSYNC trigger decimation',)),
+            (("X393_CAMSYNC_TRIG_DECIMATION",             c,  0 +                                    ba, 1, z3,   "u32*", "rw",                     "CAMSYNC trigger decimation"))]
+        
         ba = vrlg.CMDFRAMESEQ_ADDR_BASE
         ia = vrlg.CMDFRAMESEQ_ADDR_INC
         c =  "sens_chn"
@@ -2590,7 +2597,7 @@ class X393ExportC(object):
         return dw
     def _enc_camsync_mode(self):
         dw=[]
-        dw.append(("en",             vrlg.CAMSYNC_EN_BIT-1,             1,   1, "Enable CAMSYNC module"))
+        dw.append(("en",             vrlg.CAMSYNC_EN_BIT-1,           1,   1, "Enable CAMSYNC module"))
         dw.append(("en_set",         vrlg.CAMSYNC_EN_BIT,             1,   1, "Set 'en' bit"))
         dw.append(("en_snd",         vrlg.CAMSYNC_SNDEN_BIT-1,        1,   1, "Enable sending timestamps (valid with 'en_snd_set')"))
         dw.append(("en_snd_set",     vrlg.CAMSYNC_SNDEN_BIT,          1,   0, "Set 'en_snd'"))

timing/timing393.v

@@ -45,6 +45,9 @@ module  timing393       #(
     parameter RTC_SEC_USEC_ADDR =               'h32,  // ..'h33 address where seconds of the snapshot can be read (microseconds - next address)
     parameter RTC_MASK =                        'h7fc,
     parameter CAMSYNC_MASK =                    'h7f8,
+    parameter CAMSYNC_DECIMATE_ADDR =           'h714,
+    parameter CAMSYNC_DECIMATE_MASK =           'h7fc,
+    parameter CAMSYNC_DECIMATE_BITS =           16,
     parameter CAMSYNC_MODE =                    'h0,
     parameter CAMSYNC_TRIG_SRC =                'h1, // setup trigger source
     parameter CAMSYNC_TRIG_DST =                'h2, // setup trigger destination line(s)
@@ -261,6 +264,9 @@ module  timing393       #(
     camsync393 #(
         .CAMSYNC_ADDR           (CAMSYNC_ADDR),
         .CAMSYNC_MASK           (CAMSYNC_MASK),
+        .CAMSYNC_DECIMATE_ADDR  (CAMSYNC_DECIMATE_ADDR),
+        .CAMSYNC_DECIMATE_MASK  (CAMSYNC_DECIMATE_MASK),
+        .CAMSYNC_DECIMATE_BITS  (CAMSYNC_DECIMATE_BITS),
         .CAMSYNC_MODE           (CAMSYNC_MODE),
         .CAMSYNC_TRIG_SRC       (CAMSYNC_TRIG_SRC),
         .CAMSYNC_TRIG_DST       (CAMSYNC_TRIG_DST),

x393.v

@@ -2512,6 +2512,9 @@ assign axi_grst = axi_rst_pre;
         .RTC_SEC_USEC_ADDR     (RTC_SEC_USEC_ADDR),
         .RTC_MASK              (RTC_MASK),
         .CAMSYNC_MASK          (CAMSYNC_MASK),
+        .CAMSYNC_DECIMATE_ADDR (CAMSYNC_DECIMATE_ADDR),
+        .CAMSYNC_DECIMATE_MASK (CAMSYNC_DECIMATE_MASK),
+        .CAMSYNC_DECIMATE_BITS (CAMSYNC_DECIMATE_BITS),
         .CAMSYNC_MODE          (CAMSYNC_MODE),
         .CAMSYNC_TRIG_SRC      (CAMSYNC_TRIG_SRC),
         .CAMSYNC_TRIG_DST      (CAMSYNC_TRIG_DST),