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Commit d30c9b6a authored by Andrey Filippov's avatar Andrey Filippov
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Introducing new parameters and other changes to implement raw data out.

parent b482a8ea
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compressor_jp/cmprs_cmd_decode.v
View file @ d30c9b6a
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compressor_jp/cmprs_frame_sync.v
View file @ d30c9b6a
......@@ -45,7 +45,6 @@ module cmprs_frame_sync#(
parameter CMPRS_TIMEOUT= 1000 // mclk cycles
)(
// input rst,
input xclk, // global clock input, compressor single clock rate
input mclk, // global system/memory clock
input mrst, // @posedge mclk, sync reset
......@@ -88,7 +87,7 @@ module cmprs_frame_sync#(
output reg force_flush_long, // force flush (abort frame), can be any clock and may last until stuffer_done_mclk
// stuffer will re-clock and extract 0->1 transition
output stuffer_running_mclk,
output reading_frame,
output reading_frame, // @mclk
output frame_started_mclk // use to store frame number
);
/*
......@@ -101,8 +100,6 @@ module cmprs_frame_sync#(
TODO: Simplify logic: instead of frame_start_pend_r - copy frame_number_srtc @ vsync_late, and start frame if it is not reading,
in "run" mode, and frame_number_differ (in multi-frame mode)
*/
// wire vsync_late_mclk; // single mclk cycle, reclocked from vsync_late
// wire frame_started_mclk;
reg bonded_mode;
reg [5:0] frame_start_dst_r;
reg frame_start_pend_r; // postpone frame_start_dst if previous frame was still being read during vsync_late
......@@ -111,14 +108,12 @@ module cmprs_frame_sync#(
reg line_numbers_sync; // src unfinished line number is > this unfinished line number
reg reading_frame_r; // compressor is reading frame data (make sure input is done before starting next frame, otherwise make it a broken frame
// reg broken_frame;
reg aborted_frame;
reg stuffer_running_mclk_r;
reg [CMPRS_TIMEOUT_BITS-1:0] timeout;
reg cmprs_en_extend_r=0;
reg cmprs_en_d;
reg suspend_end; // suspend at the end of the current frame until frame number changes
// reg cmprs_en_xclk;
wire last_mb_started_mclk;
assign frame_start_dst = frame_start_dst_r[0];
assign cmprs_en_extend = cmprs_en_extend_r;
......@@ -126,9 +121,6 @@ module cmprs_frame_sync#(
assign stuffer_running_mclk = stuffer_running_mclk_r;
assign reading_frame = reading_frame_r;
// always @ (posedge xclk) begin
// cmprs_en_xclk <=cmprs_en;
// end
always @ (posedge mclk) begin
if (mrst) cmprs_en_extend_r <= 0;
else if (cmprs_en) cmprs_en_extend_r <= 1;
......@@ -145,28 +137,18 @@ module cmprs_frame_sync#(
cmprs_en_d <= cmprs_en;
// broken_frame <= cmprs_en && cmprs_run && vsync_late && reading_frame_r; // single xclk pulse
aborted_frame <= cmprs_en_d && !cmprs_en && stuffer_running_mclk_r;
if (!stuffer_running_mclk_r ||!cmprs_en_extend_r) force_flush_long <= 0;
// else if (broken_frame || aborted_frame) force_flush_long <= 1;
else if (aborted_frame) force_flush_long <= 1;
// if (!cmprs_en || frame_done || (cmprs_run && vsync_late)) reading_frame_r <= 0;
// last_mb_start[2] is used as emergency turn off reading_frame if memory channel did not generate frame_done (i.e. wrong frame height)
// TODO: Consider the opposite - frame_done, but not got the last MB?
if (!cmprs_en || frame_done || last_mb_started_mclk) reading_frame_r <= 0;
else if (frame_started_mclk) reading_frame_r <= 1;
// if (!cmprs_run || frame_start_dst_r[0]) frame_start_pend_r <= 0;
if (!cmprs_run || frame_start_conf) frame_start_pend_r <= 0;
if (!cmprs_run || frame_start_conf) frame_start_pend_r <= 0;
else if ((cmprs_run && vsync_late && reading_frame_r) ||
(frame_start_dst_r[5] && bonded_mode && frames_numbers_differ)) frame_start_pend_r <= 1;
// else if (frame_start_dst_r[0]) frame_start_pend_r <= 0;
// If started frame differs from tghe source one, needs to comrfess next frame after this is done, without vsync_late
// else if (frame_start_dst_r[5] ) frame_start_pend_r <= bonded_mode && frames_numbers_differ;
// if (!cmprs_en) suspend_end <= 0;
if (!cmprs_run) suspend_end <= 0;
else if (frame_done) suspend_end <= 1;
else if (frame_start_dst_r[3]) suspend_end <= 0;
......@@ -176,7 +158,6 @@ module cmprs_frame_sync#(
cmprs_standalone);
// modified - now bit 0 is disconnected from 1..5, 1 gets from memory channel controller, may be delayed
if (!cmprs_en) frame_start_dst_r[5:1] <=0;
// else frame_start_dst_r[5:1] <= frame_start_dst_r[4:0];
else frame_start_dst_r[5:1] <= {frame_start_dst_r[4:1],frame_start_conf};
if (!cmprs_en) bonded_mode <= 0;
......@@ -188,14 +169,12 @@ module cmprs_frame_sync#(
frames_numbers_differ <= !suspend_end && (frame_number_src != frame_number); // during end of frame, before frame number is incremented
/// line_numbers_sync <= (line_unfinished_src > line_unfinished);
line_numbers_sync <= (line_unfinished_src >= line_unfinished);
suspend <= bonded_mode && (!frames_in_sync || !((sigle_frame_buf ? frames_differ : frames_numbers_differ) || line_numbers_sync));
end
// pulse_cross_clock vsync_late_mclk_i (.rst(xrst), .src_clk(xclk), .dst_clk(mclk), .in_pulse(cmprs_en_xclk && vsync_late), .out_pulse(vsync_late_mclk),.busy());
pulse_cross_clock frame_started_i (.rst(xrst), .src_clk(xclk), .dst_clk(mclk), .in_pulse(frame_started), .out_pulse(frame_started_mclk),.busy());
pulse_cross_clock last_mb_started_i (.rst(xrst), .src_clk(xclk), .dst_clk(mclk), .in_pulse(last_mb_started), .out_pulse(last_mb_started_mclk),.busy());
......
compressor_jp/cmprs_pixel_buf_iface.v
View file @ d30c9b6a
......@@ -117,7 +117,6 @@ module cmprs_pixel_buf_iface #(
reg [ 2:0] mb_col_number; // number of tile column where macrobloc starts - valid 2 cycles before mb_pre_start
wire [ 9:0] extra_start_addr_w = mb_col_number * mb_h_m1; //added to mb_start_addr when non-zero column
reg [ 5:0] extra_start_addr_r;
// reg [ 5:0] mb_h; // macroblock height (lost MSB - OK)
reg [ 9:0] mb_start_addr; // was macroblock_x, noccrected for multi-column. valid with mb_pre_start
assign buf_ra = bufa_r;
......@@ -130,7 +129,6 @@ module cmprs_pixel_buf_iface #(
assign mb_pre_end = mb_pre_end_r;
assign mb_release_buf = mb_release_buf_r;
assign buf_rd = buf_re[1:0];
// assign data_out = do_r;
assign pre_first_out = pre_first_out_r[0];
assign pre2_first_out = pre_first_out_r[1];
`ifdef DEBUG_COMPRESSOR_SCRAMBLE
......@@ -147,7 +145,6 @@ module cmprs_pixel_buf_iface #(
`endif
always @(posedge xclk) begin
// mb_h <= mb_h_m1+1; // macroblock height
mb_col_number <= {macroblock_x[6:5],tile_col_width?1'b0:macroblock_x[4]};
extra_start_addr_r <= extra_start_addr_w[5:0];
mb_start_addr <= {3'b0,macroblock_x} + {extra_start_addr_r,4'b0};
......@@ -164,10 +161,6 @@ module cmprs_pixel_buf_iface #(
//mb_pre_start
if (!frame_en) pre_first_out_r <= 0;
else pre_first_out_r <= {mb_pre_start, pre_first_out_r[CMPRS_BUF_EXTRA_LATENCY + 2 : 1]};
// else pre_first_out_r <= buf_re[CMPRS_BUF_EXTRA_LATENCY+1] && ! buf_re[CMPRS_BUF_EXTRA_LATENCY+2];
// if (!frame_en) pre2_first_out <= 0;
// else pre2_first_out <= buf_re[CMPRS_BUF_EXTRA_LATENCY + 0] && ! buf_re[CMPRS_BUF_EXTRA_LATENCY + 1];
if (mb_pre_start) rows_left <= mb_h_m1;
else if (last_col) rows_left <= rows_left - 1;
......@@ -177,17 +170,14 @@ module cmprs_pixel_buf_iface #(
if (!frame_en) buf_re[CMPRS_BUF_EXTRA_LATENCY+2:1] <= 0;
// if (buf_re[0]) last_col <= 0; // ????
if (!buf_re[0]) last_col <= 0;
else last_col <= (cols_left == 1);
// if (buf_re[0]) last_row <= 0;
if (!buf_re[0]) last_row <= 0;
else if (last_col) last_row <= (rows_left == 1);
first_col <= (mb_pre_start || (last_col && !last_row));
// if (mb_pre_start) row_sa <= {start_page,3'b0,mb_start_addr}; // macroblock_x};
if (mb_pre_start) row_sa <= {start_page,mb_start_addr}; // macroblock_x};
else if (first_col) row_sa <= row_sa + (tile_col_width ? 12'h20:12'h10);
......@@ -207,7 +197,6 @@ module cmprs_pixel_buf_iface #(
else if (last_in_tile) bufa_r[11:10] <= bufa_r[11:10] + 1;
// Most time critical - calculation of the buffer address
// if (mb_pre_start) bufa_r[9:0] <= {3'b0,mb_start_addr}; // macroblock_x};
if (mb_pre_start) bufa_r[9:0] <= {mb_start_addr}; // macroblock_x};
else if (last_col) bufa_r[9:0] <= row_sa[9:0]; // 'bx next cycle after AFTER mb_pre_start
else if (last_in_tile) bufa_r[9:0] <= tile_sa;
......
compressor_jp/compressor393.v
View file @ d30c9b6a
......@@ -78,6 +78,8 @@ module compressor393 # (
parameter CMPRS_CBIT_CMODE_BITS = 4, // number of bits to control compressor color modes
parameter CMPRS_CBIT_FRAMES = 15, // bit # to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_FRAMES_BITS = 1, // number of bits to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BE16 = 17, // bit # to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BE16_BITS = 1, // number of bits to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BAYER = 20, // bit # to control compressor Bayer shift mode
parameter CMPRS_CBIT_BAYER_BITS = 2, // number of bits to control compressor Bayer shift mode
parameter CMPRS_CBIT_FOCUS = 23, // bit # to control compressor focus display mode
......@@ -100,6 +102,7 @@ module compressor393 # (
parameter CMPRS_CBIT_CMODE_JP4DIFFHDRDIV2 = 4'ha, // jp4, 4 blocks, differential, hdr,divide by 2
parameter CMPRS_CBIT_CMODE_MONO1 = 4'hb, // mono JPEG (not yet implemented)
parameter CMPRS_CBIT_CMODE_MONO4 = 4'he, // mono 4 blocks
parameter CMPRS_CBIT_CMODE_RAW = 4'hf, // uncompressed
parameter CMPRS_CBIT_FRAMES_SINGLE = 0, //1, // use a single-frame buffer for images
parameter CMPRS_COLOR18 = 0, // JPEG 4:2:0 with 18x18 overlapping tiles for de-bayer
......@@ -107,7 +110,8 @@ module compressor393 # (
parameter CMPRS_MONO16 = 2, // JPEG 4:2:0 with 16x16 non-overlapping tiles, color components zeroed
parameter CMPRS_JP4 = 3, // JP4 mode with 16x16 macroblocks
parameter CMPRS_JP4DIFF = 4, // JP4DIFF mode TODO: see if correct
parameter CMPRS_MONO8 = 7, // Regular JPEG monochrome with 8x8 macroblocks (not yet implemented)
parameter CMPRS_RAW = 6, // Not comressed, raw data
parameter CMPRS_MONO8 = 7, // Regular JPEG monochrome with 8x8 macroblocks (not yet implemented)
parameter CMPRS_FRMT_MBCM1 = 0, // bit # of number of macroblock columns minus 1 field in format word
parameter CMPRS_FRMT_MBCM1_BITS = 13, // number of bits in number of macroblock columns minus 1 field in format word
......@@ -372,6 +376,8 @@ module compressor393 # (
.CMPRS_CBIT_CMODE_BITS (CMPRS_CBIT_CMODE_BITS),
.CMPRS_CBIT_FRAMES (CMPRS_CBIT_FRAMES),
.CMPRS_CBIT_FRAMES_BITS (CMPRS_CBIT_FRAMES_BITS),
.CMPRS_CBIT_BE16 (CMPRS_CBIT_BE16),
.CMPRS_CBIT_BE16_BITS (CMPRS_CBIT_BE16_BITS),
.CMPRS_CBIT_BAYER (CMPRS_CBIT_BAYER),
.CMPRS_CBIT_BAYER_BITS (CMPRS_CBIT_BAYER_BITS),
.CMPRS_CBIT_FOCUS (CMPRS_CBIT_FOCUS),
......@@ -392,12 +398,14 @@ module compressor393 # (
.CMPRS_CBIT_CMODE_JP4DIFFHDRDIV2 (CMPRS_CBIT_CMODE_JP4DIFFHDRDIV2),
.CMPRS_CBIT_CMODE_MONO1 (CMPRS_CBIT_CMODE_MONO1),
.CMPRS_CBIT_CMODE_MONO4 (CMPRS_CBIT_CMODE_MONO4),
.CMPRS_CBIT_CMODE_RAW (CMPRS_CBIT_CMODE_RAW),
.CMPRS_CBIT_FRAMES_SINGLE (CMPRS_CBIT_FRAMES_SINGLE),
.CMPRS_COLOR18 (CMPRS_COLOR18),
.CMPRS_COLOR20 (CMPRS_COLOR20),
.CMPRS_MONO16 (CMPRS_MONO16),
.CMPRS_JP4 (CMPRS_JP4),
.CMPRS_JP4DIFF (CMPRS_JP4DIFF),
.CMPRS_RAW (CMPRS_RAW),
.CMPRS_MONO8 (CMPRS_MONO8),
.CMPRS_FRMT_MBCM1 (CMPRS_FRMT_MBCM1),
.CMPRS_FRMT_MBCM1_BITS (CMPRS_FRMT_MBCM1_BITS),
......
compressor_jp/huffman_stuffer_meta.v
View file @ d30c9b6a
......@@ -4,7 +4,7 @@
* @date 2015-10-26
* @author Andrey Filippov
*
* @brief Wrapper fior several JPEG/JP4 compression modules. It includes
* @brief Wrapper for several JPEG/JP4 compression modules. It includes
* - Huffman encoder (huffman_snglclk),
* - bit stuffer (bit_stuffer_27_32),
* - escapes 0xff with 0x00 (bit_stuffer_escape)
......@@ -66,7 +66,8 @@ module huffman_stuffer_meta(
// and before the data is needed for output
input ts_pre_stb, // @mclk - 1 cycle before receiving 8 bytes of timestamp data
input [7:0] ts_data, // timestamp data (s0,s1,s2,s3,us0,us1,us2,us3==0)
input color_first, // @fradv_clk only used for timestamp
//TODO: Should be generated fro raw also
input color_first, // @fradv_clk only used for timestamp
// outputs @ negedge clk
output [31:0] data_out, // [31:0] output data
output data_out_valid,// output data valid
......@@ -154,7 +155,8 @@ module huffman_stuffer_meta(
.flush_out (escape_flush_out) // output reg
);
bit_stuffer_metadata bit_stuffer_metadata_i (
// TODO: Insert raw data here, always 4x bytes (actually 16*16*(1..2))
bit_stuffer_raw_metadata bit_stuffer_metadata_i (
.mclk (mclk), // input
.mrst (mrst), // input
.xclk (xclk), // input
......
compressor_jp/jp_channel.v
View file @ d30c9b6a
This diff is collapsed.
includes/x393_parameters.vh
View file @ d30c9b6a
......@@ -713,6 +713,8 @@
parameter CMPRS_CBIT_CMODE_BITS = 4, // number of bits to control compressor color modes
parameter CMPRS_CBIT_FRAMES = 15, // bit # to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_FRAMES_BITS = 1, // number of bits to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BE16 = 17, // bit # to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BE16_BITS = 1, // number of bits to control compressor multi/single frame buffer modes
parameter CMPRS_CBIT_BAYER = 20, // bit # to control compressor Bayer shift mode
parameter CMPRS_CBIT_BAYER_BITS = 2, // number of bits to control compressor Bayer shift mode
parameter CMPRS_CBIT_FOCUS = 23, // bit # to control compressor focus display mode
......@@ -735,6 +737,7 @@
parameter CMPRS_CBIT_CMODE_JP4DIFFHDRDIV2 = 4'ha, // jp4, 4 blocks, differential, hdr,divide by 2
parameter CMPRS_CBIT_CMODE_MONO1 = 4'hb, // mono JPEG (not yet implemented)
parameter CMPRS_CBIT_CMODE_MONO4 = 4'he, // mono, 4 blocks (but still not actual monochrome JPEG as the blocks are scanned in 2x2 macroblocks)
parameter CMPRS_CBIT_CMODE_RAW = 4'hf, // uncompressed
parameter CMPRS_CBIT_FRAMES_SINGLE = 0, //1, // use a single-frame buffer for images
......@@ -743,6 +746,7 @@
parameter CMPRS_MONO16 = 2, // JPEG 4:2:0 with 16x16 non-overlapping tiles, color components zeroed
parameter CMPRS_JP4 = 3, // JP4 mode with 16x16 macroblocks
parameter CMPRS_JP4DIFF = 4, // JP4DIFF mode TODO: see if correct
parameter CMPRS_RAW = 6, // Not comressed, raw data
parameter CMPRS_MONO8 = 7, // Regular JPEG monochrome with 8x8 macroblocks (not yet implemented)
parameter CMPRS_FRMT_MBCM1 = 0, // bit # of number of macroblock columns minus 1 field in format word
......
memctrl/mcntrl393.v
View file @ d30c9b6a
......@@ -588,6 +588,7 @@ module mcntrl393 #(
wire [3:0] cmprs_channel_pgm_en;
wire [3:0] cmprs_reject = 4'h0;
wire [3:0] cmprs_start_rdlin;
wire [3:0] cmprs_start_rd16;
wire [3:0] cmprs_start_rd32;
wire [11:0] cmprs_bank; // output[2:0]
......@@ -597,6 +598,7 @@ module mcntrl393 #(
wire [4*MAX_TILE_WIDTH-1:0] cmprs_num_rows_m1; // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
wire [4*MAX_TILE_HEIGHT-1:0] cmprs_num_cols_m1; // number of 128-bit words to transfer (8*16 bits) - full bursts of 8 ( 0 - maximal length, 64)
wire [3:0] cmprs_keep_open; // start generating commands
wire [4*6-1:0] cmprs_num128; // output[5:0]
wire [3:0] cmprs_partial; // output
wire [3:0] cmprs_seq_done; // input : sequence over
// assign cmprs_page_ready = cmprs_seq_done;// mcntrl_tiled_rw does not generate page_ready pulse as it is the same as xfer_done input
......@@ -1161,7 +1163,8 @@ module mcntrl393 #(
`endif
);
mcntrl_tiled_rw #(
mcntrl_tiled_linear_rw #(
.ADDRESS_NUMBER (ADDRESS_NUMBER),
.COLADDR_NUMBER (COLADDR_NUMBER),
.FRAME_WIDTH_BITS (FRAME_WIDTH_BITS),
......@@ -1198,7 +1201,6 @@ module mcntrl393 #(
.MCONTR_LINTILE_DIS_NEED (MCONTR_LINTILE_DIS_NEED),
.MCONTR_LINTILE_COPY_FRAME (MCONTR_LINTILE_COPY_FRAME),
.MCONTR_LINTILE_ABORT_LATE (MCONTR_LINTILE_ABORT_LATE)
) mcntrl_tiled_rd_compressor_i (
.mrst (mrst), // input
.mclk (mclk), // input
......@@ -1221,6 +1223,8 @@ module mcntrl393 #(
.xfer_want (cmprs_want[i]), // output
.xfer_need (cmprs_need[i]), // output
.xfer_grant (cmprs_channel_pgm_en[i]), // input
.xfer_start_lin_rd (cmprs_start_rdlin[i]), // output
.xfer_start_lin_wr (), // output
.xfer_start_rd (cmprs_start_rd16[i]), // output // TODO: start rd (wr too?) linear
.xfer_start_wr (), // output
.xfer_start32_rd (cmprs_start_rd32[i]), // output
......@@ -1233,34 +1237,12 @@ module mcntrl393 #(
.num_rows_m1 (cmprs_num_rows_m1[i * MAX_TILE_WIDTH +: MAX_TILE_WIDTH]), // output[5:0]
.num_cols_m1 (cmprs_num_cols_m1[i * MAX_TILE_HEIGHT +: MAX_TILE_HEIGHT]), // output[5:0]
.keep_open (cmprs_keep_open[i]), // output
.xfer_num128 (cmprs_num128[i * 6 +: 6]), // output[5:0] //** new**
.xfer_partial (cmprs_partial[i]), // output
.xfer_page_done (cmprs_seq_done[i]), // input
.xfer_page_rst_wr (), // output
.xfer_page_rst_rd (cmprs_xfer_reset_page_rd[i]) // output @negedge
);
/*
.xfer_num128 (sens_num128[i * 6 +: 6]), // output[5:0]
.xfer_partial (sens_partial[i]), // output
.xfer_done (sens_seq_done[i]), // input : page sequence over
.xfer_page_rst_wr (sens_rpage_set[i]), // output @ posedge mclk
.xfer_page_rst_rd (), // output @ negedge mclk
.xfer_skipped (sens_xfer_skipped[i]), // output reg
.cmd_wrmem () // output
.xfer_num128 (lin_rw_chn3_num128), // output[5:0]
.xfer_partial (lin_rw_chn3_partial), // output
.xfer_done (seq_done3), // input : sequence over
.xfer_page_rst_wr (xfer_reset_page3_wr), // output
.xfer_page_rst_rd (xfer_reset_page3_rd), // output
.xfer_skipped (), // output reg
.cmd_wrmem () // output
// assign cmd_wrmem = mode_reg[MCONTR_LINTILE_WRITE];// 0: read from memory, 1:write to memory
*/
end
endgenerate
......@@ -1663,6 +1645,32 @@ module mcntrl393 #(
.partial11 (sens_partial[3]), // input
.start11_wr (sens_start_wr[3]), // input
.bank12 (cmprs_bank[0 * 3 +: 3]), // input[2:0]
.row12 (cmprs_row[0 * ADDRESS_NUMBER +: ADDRESS_NUMBER]), // input[14:0]
.start_col12 (cmprs_col[0 * COL_WDTH +: COL_WDTH]), // input[6:0]
.num128_12 (cmprs_num128[0 * 6 +: 6]), // input[5:0]
.partial12 (cmprs_partial[0]), // input
.start12_rd (cmprs_start_rdlin[0]), // input
.bank13 (cmprs_bank[1 * 3 +: 3]), // input[2:0]
.row13 (cmprs_row[1 * ADDRESS_NUMBER +: ADDRESS_NUMBER]), // input[14:0]
.start_col13 (cmprs_col[1 * COL_WDTH +: COL_WDTH]), // input[6:0]
.num128_13 (cmprs_num128[1 * 6 +: 6]), // input[5:0]
.partial13 (cmprs_partial[1]), // input
.start13_rd (cmprs_start_rdlin[1]), // input
.bank14 (cmprs_bank[2 * 3 +: 3]), // input[2:0]
.row14 (cmprs_row[2 * ADDRESS_NUMBER +: ADDRESS_NUMBER]), // input[14:0]
.start_col14 (cmprs_col[2 * COL_WDTH +: COL_WDTH]), // input[6:0]
.num128_10 (cmprs_num128[2 * 6 +: 6]), // input[5:0]
.partial14 (cmprs_partial[2]), // input
.start14_rd (cmprs_start_rdlin[2]), // input
.bank15 (cmprs_bank[3 * 3 +: 3]), // input[2:0]
.row15 (cmprs_row[3 * ADDRESS_NUMBER +: ADDRESS_NUMBER]), // input[14:0]
.start_col15 (cmprs_col[3 * COL_WDTH +: COL_WDTH]), // input[6:0]
.num128_15 (cmprs_num128[3 * 6 +: 6]), // input[5:0]
.partial15 (cmprs_partial[3]), // input
.start15_rd (cmprs_start_rdlin[3]), // input
.bank (lin_rw_bank), // output[2:0]
.row (lin_rw_row), // output[14:0]
.start_col (lin_rw_col), // output[6:0]
......
system_defines.vh
View file @ d30c9b6a
......@@ -46,7 +46,7 @@
// https://forums.xilinx.com/t5/Embedded-Processor-System-Design/AXI4-Bursts-4KB-Address-Boundary-Limitation/td-p/216413
// Interconnect does not have 4K limit, and compressed data can only go to interconnect (memory), so it is OK to violate AXI specs here
`define AXI_4K_LIMIT_DISABLE // Current x393 code (only simulation modules) does not have it implemented, defining it causes mismatch synth/sim
`define DEBUG_COMPRESSOR_SCRAMBLE
`define DEBUG_COMPRESSOR_SCRAMBLE // ======== WTF? ======== is undefined in synthesis mode
`define DEBUG_DCT1D // undefine after debugging is over
// `define USE_OLD_DCT
......@@ -188,32 +188,32 @@
`define def_scanline_chn11
`undef def_tiled_chn11
// chn 12 is tiled read (compressor channel 0)
// chn 12 is tiled read + scanline read (for Tiff) (compressor channel 0)
`define def_enable_mem_chn12
`define def_read_mem_chn12
`undef def_write_mem_chn12
`undef def_scanline_chn12
`define def_scanline_chn12
`define def_tiled_chn12
// chn 12 is tiled read (compressor channel 1)
// chn 13 is tiled read + scanline read (for Tiff) (compressor channel 1)
`define def_enable_mem_chn13
`define def_read_mem_chn13
`undef def_write_mem_chn13
`undef def_scanline_chn13
`define def_scanline_chn13
`define def_tiled_chn13
// chn 12 is tiled read (compressor channel 2)
// chn 14 is tiled read + scanline read (for Tiff) (compressor channel 2)
`define def_enable_mem_chn14
`define def_read_mem_chn14
`undef def_write_mem_chn14
`undef def_scanline_chn14
`define def_scanline_chn14
`define def_tiled_chn14
// chn 12 is tiled read (compressor channel 3)
// chn 15 is tiled read + scanline read (for Tiff) (compressor channel 3)
`define def_enable_mem_chn15
`define def_read_mem_chn15
`undef def_write_mem_chn15
`undef def_scanline_chn15
`define def_scanline_chn15
`define def_tiled_chn15
`endif
\ No newline at end of file
x393.v
View file @ d30c9b6a
......@@ -2043,6 +2043,8 @@ assign axi_grst = axi_rst_pre;
.CMPRS_CBIT_CMODE_BITS (CMPRS_CBIT_CMODE_BITS),
.CMPRS_CBIT_FRAMES (CMPRS_CBIT_FRAMES),
.CMPRS_CBIT_FRAMES_BITS (CMPRS_CBIT_FRAMES_BITS),
.CMPRS_CBIT_BE16 (CMPRS_CBIT_BE16),
.CMPRS_CBIT_BE16_BITS (CMPRS_CBIT_BE16_BITS),
.CMPRS_CBIT_BAYER (CMPRS_CBIT_BAYER),
.CMPRS_CBIT_BAYER_BITS (CMPRS_CBIT_BAYER_BITS),
.CMPRS_CBIT_FOCUS (CMPRS_CBIT_FOCUS),
......
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