Document Icarus smoke test for x393

Add a repeatable Icarus/VVP/FST smoke-test guide for x393 and link it from the project README. Ignore local VDT-generated tool logs.
Co-authored-by: Codex <codex@elphel.com>

.gitignore

@@ -67,3 +67,5 @@ html.tar.gz
 /image
 /scripts
 
+# Local VDT-generated logs
+/tool_logs

README.md

@@ -9,6 +9,9 @@ FPGA code for Elphel 393 camera, created with [VDT plugin](https://git.elphel.co
 
 Run ./INIT_PROJECT in the top directory to copy initial .project and .pydevproject files for Eclipse
 
+For a quick local Icarus/VVP/GTKWave verification, see
+[docs/iverilog-smoke-test.md](docs/iverilog-smoke-test.md).
+
 Simulation of this project requires some files from the Xilinx proprietary _unisims_ library (list of dependencies
 is in this [blog post](https://blog.elphel.com/2016/03/free-fpga-reimplement-the-primitives-models/)).
 [VDT plugin](https://git.elphel.com/Elphel/vdt-plugin) README file describes steps needed after installation of Xilinx software

docs/iverilog-smoke-test.md

+# Icarus Verilog Smoke Test
+
+This test verifies that the local Icarus toolchain works on real x393 Verilog.
+It does not replace full x393 simulation, Vivado synthesis, or Cocotb. It is a
+fast confidence check for:
+
+- `iverilog` compile
+- Xilinx unisim model parsing
+- `vvp` runtime execution
+- FST waveform generation with `vvp -fst`
+- GTKWave availability
+
+## Expected Tool Paths
+
+On the current workstation:
+
+```bash
+command -v iverilog
+command -v vvp
+command -v gtkwave
+```
+
+Expected:
+
+```text
+/home/elphel/.local/bin/iverilog
+/home/elphel/.local/bin/vvp
+/usr/bin/gtkwave
+```
+
+The installed Icarus version checked on 2026-05-07 was:
+
+```text
+Icarus Verilog version 14.0 (devel) (s20251012-145-g9b0d46b4b)
+```
+
+## Why This Testbench
+
+`dsp/dct_tests_01.tf` is small enough to run quickly but still compiles real
+x393 DSP RTL and the Xilinx `DSP48E1` unisim model. That makes it a useful
+first test before attempting larger top-level simulations.
+
+## Run From The Workspace
+
+```bash
+cd /home/elphel/wksp2/imagej-elphel
+mkdir -p /tmp/iverilog-verify
+
+iverilog \
+  -g2012 \
+  -gno-specify \
+  -DIVERILOG \
+  -DTRACE \
+  -DNON_VDT_ENVIROMENT \
+  -s dct_tests_01 \
+  -I attic/FPGA-VDT/x393 \
+  -I attic/FPGA-VDT/x393/includes \
+  -I attic/FPGA-VDT/x393/dsp \
+  -I attic/FPGA-VDT/x393/unisims \
+  -o /tmp/iverilog-verify/dct_tests_01.vvp \
+  attic/FPGA-VDT/x393/dsp/dct_tests_01.tf \
+  attic/FPGA-VDT/x393/dsp/dct_iv8_1d.v \
+  attic/FPGA-VDT/x393/dsp/dct_iv_8x8.v \
+  attic/FPGA-VDT/x393/dsp/dsp_ma_preadd_c.v \
+  attic/FPGA-VDT/x393/unisims/DSP48E1.v
+```
+
+`NON_VDT_ENVIROMENT` is the historical spelling used by the existing Verilog
+test fixtures; keep that spelling when running this test.
+
+Expected compile result:
+
+- Exit status `0`
+- Warnings from `unisims/DSP48E1.v` around lines 1842-1846:
+  `Choosing typ expression.`
+
+Those warnings are from the Xilinx simulation model and are expected for this
+smoke test.
+
+## Run The Simulation
+
+Run `vvp` from the output directory so the testbench writes the FST waveform
+there:
+
+```bash
+cd /tmp/iverilog-verify
+vvp -v dct_tests_01.vvp -fst
+ls -lh dct_tests_01.fst
+```
+
+Expected runtime result:
+
+- Output contains `FST info: dumpfile dct_tests_01.fst opened for output.`
+- Output ends with `$finish called at 5455000 (1ps)`
+- `dct_tests_01.fst` exists
+
+Optional waveform view:
+
+```bash
+gtkwave /tmp/iverilog-verify/dct_tests_01.fst \
+  /home/elphel/wksp2/imagej-elphel/attic/FPGA-VDT/x393/dct_tests_01.sav
+```
+
+## Relation To VDT
+
+VDT's Icarus tool definition is in:
+
+```text
+attic/FPGA-VDT/vdt/tools/Verilog/IVerilog.xml
+```
+
+That flow also calls `iverilog`, then `vvp -fst`, then optionally `gtkwave`.
+The manual command above is deliberately explicit so failures can be separated
+into compiler, runtime, waveform, and Eclipse-integration problems.