Skip to content
Projects
Groups
Snippets
Help
Loading...
Help
Submit feedback
Contribute to GitLab
Sign in
Toggle navigation
X
x393
Project
Project
Details
Activity
Releases
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Commits
Open sidebar
Elphel
x393
Commits
cef8f530
Commit
cef8f530
authored
May 21, 2016
by
Andrey Filippov
Browse files
Options
Browse Files
Download
Plain Diff
Merge branch 'master' of github.com:Elphel/x393
parents
02f89609
116dbe29
Changes
3
Hide whitespace changes
Inline
Side-by-side
Showing
3 changed files
with
15 additions
and
2 deletions
+15
-2
x393_cur_params_target.vh
includes/x393_cur_params_target.vh
+8
-0
install.sh
install.sh
+1
-0
startup14
py393/startup14
+6
-2
No files found.
includes/x393_cur_params_target.vh
View file @
cef8f530
...
...
@@ -31,11 +31,19 @@
* contains all the components and scripts required to completely simulate it
* with at least one of the Free Software programs.
*******************************************************************************/
/*
localparam DLY_LANE0_ODELAY = 80'hd85c1014141814181218;
localparam DLY_LANE0_IDELAY = 72'h2c7a8380897c807b88;
localparam DLY_LANE1_ODELAY = 80'hd8581812181418181814;
localparam DLY_LANE1_IDELAY = 72'h108078807a887c8280;
localparam DLY_CMDA = 256'hd3d3d3d4dcd1d8cc494949494949494949d4d3ccd3d3dbd4ccd4d2d3d1d2d8cc;
localparam DLY_PHASE = 8'h33;
*/
localparam DLY_LANE0_ODELAY = 80'hd8e4141a191c1c1c181c;
localparam DLY_LANE0_IDELAY = 72'h187074747878787072;
localparam DLY_LANE1_ODELAY = 80'hd8dc191418141a141818;
localparam DLY_LANE1_IDELAY = 72'h186c6c726c746a7173;
localparam DLY_CMDA = 256'hd3d3dad2d1cccad2505050505050505050d4d1d1d2d2dbcad2cad3d4d2cacbd1;
localparam DLY_PHASE = 8'h34;
// localparam DFLT_WBUF_DELAY = 4'h9;
\ No newline at end of file
install.sh
View file @
cef8f530
...
...
@@ -16,6 +16,7 @@ install -v -m 0644 $SCRIPTPATH/*.bit $1/usr/local/verilog/
install
-v
-m
0644
$SCRIPTPATH
/system_defines.vh
$1
/usr/local/verilog/
install
-v
-m
0644
$SCRIPTPATH
/includes/x393_parameters.vh
$1
/usr/local/verilog/
install
-v
-m
0644
$SCRIPTPATH
/includes/x393_localparams.vh
$1
/usr/local/verilog/
install
-v
-m
0644
$SCRIPTPATH
/includes/x393_cur_params_target.vh
$1
/usr/local/verilog/
install
-v
-m
0644
$SCRIPTPATH
/py393/hargs
$1
/usr/local/verilog/
install
-v
-m
0644
$SCRIPTPATH
/py393/hargs-auto
$1
/usr/local/verilog/
install
-v
-m
0644
$SCRIPTPATH
/py393/includes
$1
/usr/local/verilog/
...
...
py393/startup14
View file @
cef8f530
...
...
@@ -5,12 +5,16 @@
-p PICKLE="/usr/local/verilog/x393_mcntrl.pickle
-c copy /usr/local/bin/imgsrv.py /www/pages
-c bitstream_set_path /usr/local/verilog/x393_hispi.bit
-c setupSensorsPower "
PAR12
"
-c setupSensorsPower "
HISPI
"
-c measure_all "*DI"
-c setup_all_sensors True None 0xf
-c compressor_control all None None None None None
3
-c compressor_control all None None None None None
2
-c program_gamma all 0 0.57 0.04
-c set_qtables all 0 80
-c write_sensor_i2c 0 1 0 0x31c08db6
-c write_sensor_i2c 1 1 0 0x31c08000
-c write_sensor_i2c 2 1 0 0x31c08fff
-c write_sensor_i2c 3 1 0 0x31c08db6
-c write_sensor_i2c all 1 0 0x030600b4
-c write_sensor_i2c all 1 0 0x31c68400
-c write_sensor_i2c all 1 0 0x306e9280
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment