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Elphel
x393
Commits
cbd5dc78
Commit
cbd5dc78
authored
Sep 24, 2015
by
Andrey Filippov
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Plain Diff
More debugging, fixed file length calculation and embedded timestamp
parent
5641399a
Changes
10
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Showing
10 changed files
with
65827 additions
and
65791 deletions
+65827
-65791
.project
.project
+8
-8
cmprs_frame_sync.v
compressor_jp/cmprs_frame_sync.v
+3
-1
jp_channel.v
compressor_jp/jp_channel.v
+35
-15
stuffer393.v
compressor_jp/stuffer393.v
+19
-6
fpga_version.vh
fpga_version.vh
+1
-1
x393_mcntrl.pickle
py393/dbg/x393_mcntrl.pickle
+65653
-65736
x393_cmprs_afi.py
py393/x393_cmprs_afi.py
+23
-1
x393_jpeg.py
py393/x393_jpeg.py
+63
-14
x393_sens_cmprs.py
py393/x393_sens_cmprs.py
+21
-8
system_defines.vh
system_defines.vh
+1
-1
No files found.
.project
View file @
cbd5dc78
...
...
@@ -62,42 +62,42 @@
<link>
<name>
vivado_logs/VivadoBitstream.log
</name>
<type>
1
</type>
<location>
/home/andrey/git/x393/vivado_logs/VivadoBitstream-201509
1917201738
5.log
</location>
<location>
/home/andrey/git/x393/vivado_logs/VivadoBitstream-201509
2317365829
5.log
</location>
</link>
<link>
<name>
vivado_logs/VivadoOpt.log
</name>
<type>
1
</type>
<location>
/home/andrey/git/x393/vivado_logs/VivadoOpt-201509
1917201738
5.log
</location>
<location>
/home/andrey/git/x393/vivado_logs/VivadoOpt-201509
2317365829
5.log
</location>
</link>
<link>
<name>
vivado_logs/VivadoOptPhys.log
</name>
<type>
1
</type>
<location>
/home/andrey/git/x393/vivado_logs/VivadoOptPhys-201509
1917201738
5.log
</location>
<location>
/home/andrey/git/x393/vivado_logs/VivadoOptPhys-201509
2317365829
5.log
</location>
</link>
<link>
<name>
vivado_logs/VivadoOptPower.log
</name>
<type>
1
</type>
<location>
/home/andrey/git/x393/vivado_logs/VivadoOptPower-201509
1917201738
5.log
</location>
<location>
/home/andrey/git/x393/vivado_logs/VivadoOptPower-201509
2317365829
5.log
</location>
</link>
<link>
<name>
vivado_logs/VivadoPlace.log
</name>
<type>
1
</type>
<location>
/home/andrey/git/x393/vivado_logs/VivadoPlace-201509
1917201738
5.log
</location>
<location>
/home/andrey/git/x393/vivado_logs/VivadoPlace-201509
2317365829
5.log
</location>
</link>
<link>
<name>
vivado_logs/VivadoRoute.log
</name>
<type>
1
</type>
<location>
/home/andrey/git/x393/vivado_logs/VivadoRoute-201509
1917201738
5.log
</location>
<location>
/home/andrey/git/x393/vivado_logs/VivadoRoute-201509
2317365829
5.log
</location>
</link>
<link>
<name>
vivado_logs/VivadoSynthesis.log
</name>
<type>
1
</type>
<location>
/home/andrey/git/x393/vivado_logs/VivadoSynthesis-201509
19164827543
.log
</location>
<location>
/home/andrey/git/x393/vivado_logs/VivadoSynthesis-201509
23170916067
.log
</location>
</link>
<link>
<name>
vivado_logs/VivadoTimimgSummaryReportImplemented.log
</name>
<type>
1
</type>
<location>
/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-201509
1917201738
5.log
</location>
<location>
/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-201509
2317365829
5.log
</location>
</link>
<link>
<name>
vivado_logs/VivadoTimimgSummaryReportSynthesis.log
</name>
...
...
compressor_jp/cmprs_frame_sync.v
View file @
cbd5dc78
...
...
@@ -36,6 +36,8 @@ module cmprs_frame_sync#(
input
cmprs_en
,
// @mclk 0 resets immediately
output
cmprs_en_extend
,
// @mclk keep compressor enabled for graceful shutdown
// TODO: delay vsync_late if still compressing previous frame in multi-frame buffer mode
input
cmprs_run
,
// @mclk enable propagation of vsync_late to frame_start_dst in bonded(sync to src) mode
input
cmprs_standalone
,
// @mclk single-cycle: generate a single frame_start_dst in unbonded (not synchronized) mode.
// cmprs_run should be off
...
...
compressor_jp/jp_channel.v
View file @
cbd5dc78
...
...
@@ -311,7 +311,7 @@ module jp_channel#(
wire
[
3
:
0
]
huff_dl
;
// output[3:0] reg
wire
huff_dv
;
// output reg
wire
flush
;
// output reg @ negedge xclk2x
wire
last_block
;
// @negedge xxlk2x - used to copy timestamp in stuffer
wire
[
31
:
0
]
cmd_data
;
// 32-bit data to write to tables and registers(LSB first) - from cmd_deser
...
...
@@ -362,11 +362,15 @@ module jp_channel#(
reg
dbg_stuffer_ext_running
;
reg
dbg_reset_fifo
;
wire
[
3
:
0
]
etrax_dma
;
wire
dbg_ts_rstb
;
// output
wire
[
7
:
0
]
dbg_ts_dout
;
//output [7:0]
wire
[
31
:
0
]
dbg_sec
;
wire
[
31
:
0
]
dbg_usec
;
wire
dbg_flushing
;
reg
dbg_flush_hclk
;
reg
dbg_en_hclk
;
wire
dbg_last_block
;
reg
dbg_en_n2x
;
reg
dbg_last_block_persist
;
wire
dbg_test_lbw
;
...
...
@@ -383,6 +387,14 @@ module jp_channel#(
wire
[
2
:
0
]
dbg_block_mem_wa
;
wire
[
2
:
0
]
dbg_block_mem_wa_save
;
timestamp_to_parallel
dbg_timestamp_to_parallel_i
(
.
clk
(
~
xclk2x
)
,
// input
.
pre_stb
(
dbg_ts_rstb
)
,
// input
.
tdata
(
dbg_ts_dout
)
,
// input[7:0]
.
sec
(
dbg_sec
)
,
// output[31:0] reg
.
usec
(
dbg_usec
)
,
// output[19:0] reg
.
done
()
// output
)
;
// cmprs_standalone - use to reset flush
...
...
@@ -394,7 +406,7 @@ module jp_channel#(
dbg_en_n2x
<=
stuffer_en
;
if
(
!
dbg_en_n2x
)
dbg_last_block_persist
<=
0
;
else
if
(
dbg_last_block
)
dbg_last_block_persist
<=
1
;
else
if
(
last_block
)
dbg_last_block_persist
<=
1
;
if
(
!
dbg_en_n2x
)
dbg_gotLastBlock_persist
<=
0
;
else
if
(
dbg_gotLastBlock
)
dbg_gotLastBlock_persist
<=
1
;
...
...
@@ -454,8 +466,8 @@ module jp_channel#(
//frame_start_dst
debug_slave
#(
.
SHIFT_WIDTH
(
3
20
)
,
.
READ_WIDTH
(
3
20
)
,
.
SHIFT_WIDTH
(
3
84
)
,
.
READ_WIDTH
(
3
84
)
,
.
WRITE_WIDTH
(
32
)
,
.
DEBUG_CMD_LATENCY
(
DEBUG_CMD_LATENCY
)
)
debug_slave_i
(
...
...
@@ -465,6 +477,8 @@ module jp_channel#(
.
debug_sl
(
debug_sl
)
,
// input
.
debug_do
(
debug_do
)
,
// output
.
rd_data
(
{
dbg_usec
,
dbg_sec
,
26'h0
,
dbg_block_mem_wa_save
[
2
:
0
]
,
dbg_block_mem_wa
[
2
:
0
]
,
dbg_zds_cntr
[
15
:
0
]
,
dbg_stb_cntr
[
15
:
0
]
,
...
...
@@ -476,7 +490,7 @@ module jp_channel#(
pages_requested
[
15
:
0
]
,
dbg_comp_lastinmbo
,
dbg_block_mem_ra
[
2
:
0
]
,
debug_fifo_out
[
27
:
0
]
,
debug_fifo_in
[
31
:
0
]
,
color_last
,
dbg_last_block_persist
,
dbg_gotLastBlock
,
dbg_test_lbw
,
dbg_
last_block
,
color_last
,
dbg_last_block_persist
,
dbg_gotLastBlock
,
dbg_test_lbw
,
last_block
,
dbg_flush_hclk
,
dbg_flushing
,
stuffer_rdy
,
etrax_dma
[
3
:
0
]
,
dbg_stuffer_ext_running
,
stuffer_running_mclk
,
debug_frame_done
,
reading_frame
,
fifo_count
[
7
:
0
]
,
2'b0
,
dbg_fifo_or_full
,
dbg_gotLastBlock_persist
,
dbg_lastBlock_sent
,
dbg_last_DCAC
,
sigle_frame_buf
,
suspend
,
...
...
@@ -1054,12 +1068,11 @@ module jp_channel#(
.
dl
(
huff_dl
[
3
:
0
])
,
// output[3:0] reg
.
dv
(
huff_dv
)
,
// output reg
.
flush
(
flush
)
,
// output reg
.
last_block
(
last_block
)
,
// output reg
`ifdef
DEBUG_RING
.
last_block
(
dbg_last_block
)
,
// output reg unused does not get out
.
test_lbw
(
dbg_test_lbw
)
,
// output reg ??
.
gotLastBlock
(
dbg_gotLastBlock
)
,
// output ?? - unused (was for debug)
`else
.
last_block
()
,
// output reg unused
.
test_lbw
()
,
// output reg ??
.
gotLastBlock
()
,
// output ?? - unused (was for debug)
`endif
...
...
@@ -1078,7 +1091,7 @@ module jp_channel#(
.
mclk
(
mclk
)
,
// input
.
mrst
(
mrst
)
,
// input
.
xrst
(
xrst
)
,
// input
.
last_block
(
last_block
)
,
// input @negedge xclk2x - use it to copy timestamp from fifo
.
ts_pre_stb
(
ts_pre_stb
)
,
// input 1 cycle before timestamp data, @mclk
.
ts_data
(
ts_data
)
,
// input[7:0] 8-byte timestamp data (s0,s1,s2,s3,us0,us1,us2,us3==0)
.
color_first
(
color_first
)
,
// input valid @xclk - only for sec/usec
...
...
@@ -1102,7 +1115,10 @@ module jp_channel#(
`endif
.
running
(
stuffer_running
)
// from registering timestamp until done
`ifdef
DEBUG_RING
,
.
dbg_etrax_dma
(
etrax_dma
)
,
.
dbg_etrax_dma
(
etrax_dma
)
,.
dbg_ts_rstb
(
dbg_ts_rstb
)
// output
,.
dbg_ts_dout
(
dbg_ts_dout
)
//output [7:0]
`endif
`ifdef
debug_stuffer
,.
etrax_dma_r
(
tst_stuf_etrax
[
3
:
0
])
// [3:0] just for testing
...
...
@@ -1110,7 +1126,11 @@ module jp_channel#(
,.
test_cntr1
(
test_cntr1
[
7
:
0
])
`endif
)
;
/*
,output dbg_ts_rstb
,output [7:0] dbg_ts_dout
*/
pulse_cross_clock
stuffer_done_mclk_i
(
.
rst
(
xrst2xn
)
,
.
src_clk
(
~
xclk2x
)
,
.
dst_clk
(
mclk
)
,
.
in_pulse
(
stuffer_done
)
,
.
out_pulse
(
stuffer_done_mclk
)
,.
busy
())
;
cmprs_out_fifo
cmprs_out_fifo_i
(
// .rst (rst), // input mostly for simulation
...
...
compressor_jp/stuffer393.v
View file @
cbd5dc78
...
...
@@ -46,6 +46,8 @@ module stuffer393 (
input
mclk
,
input
mrst
,
// @posedge mclk, sync reset
input
xrst
,
// @posedge xclk, sync reset
input
last_block
,
// use it to copy timestamp from fifo
// time stamping - will copy time at the end of color_first (later than the first hact after vact in the current frame, but before the next one
// and before the data is needed for output
...
...
@@ -73,14 +75,24 @@ module stuffer393 (
output
reg
running
// from registering timestamp until done
`ifdef
DEBUG_RING
,
output
reg
[
3
:
0
]
dbg_etrax_dma
,
output
dbg_ts_rstb
,
output
[
7
:
0
]
dbg_ts_dout
`endif
`ifdef
debug_stuffer
,
output
reg
[
3
:
0
]
etrax_dma_r
// [3:0] just for testing
,
output
reg
[
3
:
0
]
test_cntr
,
output
reg
[
7
:
0
]
test_cntr1
`endif
)
;
`ifdef
DEBUG_RING
assign
dbg_ts_rstb
=
ts_rstb
;
assign
dbg_ts_dout
=
ts_dout
;
`endif
//etrax_dma[3:0]
`ifdef
debug_stuffer
reg
en_d
;
...
...
@@ -120,7 +132,7 @@ module stuffer393 (
reg
busy_eob
;
// flushing and sending length
reg
trailer
;
// sending out data length and 32 bytes for ETRAX
reg
was_trailer
;
// sending out data length and 32 bytes for ETRAX
reg
last_block_d
;
// last_block delayed by one clock
reg
[
3
:
0
]
etrax_dma
;
// count words to make total size multiple of 32 bytes.
// Last 4 bytes of data will have actual length in bytes
// There will always be at least 4 more bytes (0-es) before length - needed for software
...
...
@@ -157,9 +169,10 @@ module stuffer393 (
wire
stb_start
;
// re-clocked color_first
assign
ts_rstb
=
trailer
&&
!
was_trailer
;
// enough time to have timestamp data
// assign ts_rstb = trailer && !was_trailer; // enough time to have timestamp data
assign
ts_rstb
=
last_block
&&
!
last_block_d
;
// enough time to have timestamp data
always
@
(
negedge
clk
)
begin
// ts_cycles <= {ts_cycles[6:0],ts_rstb}
;
last_block_d
<=
last_block
;
ts_cycles
<=
{
ts_cycles
[
5
:
0
]
,
ts_rstb
};
if
(
ts_cycles
[
0
])
sec_r
[
7
:
0
]
<=
ts_dout
;
else
if
(
start_sizeout
)
sec_r
[
7
:
0
]
<=
size_count
[
7
:
0
]
;
...
...
fpga_version.vh
View file @
cbd5dc78
parameter FPGA_VERSION = 32'h03930035;
\ No newline at end of file
parameter FPGA_VERSION = 32'h03930038;
\ No newline at end of file
py393/dbg/x393_mcntrl.pickle
View file @
cbd5dc78
This source diff could not be displayed because it is too large. You can
view the blob
instead.
py393/x393_cmprs_afi.py
View file @
cbd5dc78
...
...
@@ -109,6 +109,7 @@ class X393CmprsAfi(object):
@param channel - AFI input channel (0..3) - with 2 AFIs - 0..1 only
@return - memory segments (1 or two) with image data, timestamp in numeric and string format
"""
print
(
"
\n
------------ channel
%
d --------------"
%
(
channel
))
print
(
"x393_sens_cmprs.GLBL_WINDOW = "
,
x393_sens_cmprs
.
GLBL_WINDOW
)
if
(
self
.
DRY_MODE
):
return
None
...
...
@@ -130,10 +131,31 @@ class X393CmprsAfi(object):
print
(
"Failed to get 0xff marker at offset 0x
%08
x - length word = 0x
%08
x)"
%
(
cirbuf_start
+
last_image_chunk
+
(
0x20
-
CCAM_MMAP_META_LENGTH
)
+
3
,
len32
))
return
None
len32
&=
0xffffff
inserted_bytes
=
(
32
-
(((
len32
%
32
)
+
CCAM_MMAP_META
)
%
32
))
%
32
# inserted_bytes = (32 - (((len32 % 32) + CCAM_MMAP_META) % 32)) % 32
#adjusting to actual...
# ADJUSTMENT = 2
ADJUSTMENT
=
4
# ???
inserted_bytes
=
((
32
-
(((
len32
%
32
)
+
CCAM_MMAP_META
)
%
32
)
-
ADJUSTMENT
)
%
32
)
+
ADJUSTMENT
img_start
=
last_image_chunk
+
32
-
CCAM_MMAP_META
-
inserted_bytes
-
len32
if
img_start
<
0
:
img_start
+=
circbuf_len
if
verbose
>
0
:
for
a
in
range
(
img_start
,
img_start
+
0x10
,
4
):
d
=
self
.
x393_mem
.
read_mem
(
cirbuf_start
+
a
)
if
(
a
%
16
)
==
0
:
print
(
"
\n
%08
x: "
%
(
a
),
end
=
""
)
print
(
"
%02
x
%02
x
%02
x
%02
x "
%
(
d
&
0xff
,
(
d
>>
8
)
&
0xff
,
(
d
>>
16
)
&
0xff
,
(
d
>>
24
)
&
0xff
),
end
=
""
)
print
(
"
\n
..."
,
end
=
""
)
for
a0
in
range
(
last_image_chunk
-
0x10
,
last_image_chunk
+
0x20
,
4
):
a
=
a0
if
(
a
<
0
):
a
-=
circbuf_len
d
=
self
.
x393_mem
.
read_mem
(
cirbuf_start
+
a
)
if
(
a
%
16
)
==
0
:
print
(
"
\n
%08
x: "
%
(
a
),
end
=
""
)
print
(
"
%02
x
%02
x
%02
x
%02
x "
%
(
d
&
0xff
,
(
d
>>
8
)
&
0xff
,
(
d
>>
16
)
&
0xff
,
(
d
>>
24
)
&
0xff
),
end
=
""
)
print
()
sec
=
self
.
x393_mem
.
read_mem
(
cirbuf_start
+
last_image_chunk
+
(
0x20
-
CCAM_MMAP_META_SEC
))
usec
=
self
.
x393_mem
.
read_mem
(
cirbuf_start
+
last_image_chunk
+
(
0x20
-
CCAM_MMAP_META_USEC
))
fsec
=
sec
+
usec
/
1000000.0
...
...
py393/x393_jpeg.py
View file @
cbd5dc78
...
...
@@ -628,29 +628,63 @@ class X393Jpeg(object):
"quantization"
:
qtables
[
"fpga"
],
"huffman"
:
self
.
huff_tables
[
FPGA_HUFFMAN_TABLE
]}
def
jpeg_write
(
self
,
file_path
=
"
/www/pages/
img.jpeg"
,
file_path
=
"img.jpeg"
,
channel
=
0
,
y_quality
=
100
,
#80,
c_quality
=
None
,
portrait
=
False
,
color_mode
=
0
,
byrshift
=
0
,
server_root
=
"/www/pages/"
,
verbose
=
1
):
"""
Create JPEG image from the latest acquired in the camera
@param file_path - camera file system path
@param file_path - camera file system path
(starts with "/") or relative to web server root
@param channel - compressor channel
@param y_quality - 1..100 - quantization quality for Y component
@param c_quality - 1..100 - quantization quality for color components (None - use y_quality)
@param portrait - False - use normal order, True - transpose for portrait mode images
@param color_mode - one of the image formats (jpeg, jp4,)
@param byrshift - Bayer shift
@param server_root - files ystem path to the web server root directory
@param verbose - verbose level
"""
allFiles
=
False
if
file_path
[
0
]
==
"/"
:
server_root
=
""
# just do not add anything
try
:
if
(
channel
==
all
)
or
(
channel
[
0
]
.
upper
()
==
"A"
):
#all is a built-in function
for
channel
in
range
(
4
):
self
.
jpeg_write
(
file_path
=
file_path
.
replace
(
"."
,
"_
%
d."
%
channel
),
allFiles
=
True
except
:
pass
if
allFiles
:
html_text
=
"""
<html>
<head>
<title></title>
<meta content="">
<style>
table { border-collapse: collapse;}
table td, table th {padding: 0;}
</style>
</head>
<body>
<table>
<tr>"""
html_text_td
=
"""
<td><a href="
%
s"><img src="
%
s" style="image-orientation: 270deg; width:100
%%
; height:auto;" /></a></td>"""
html_text_finish
=
"""
</tr>
</table>
</body>
</html>"""
for
channel
in
(
3
,
2
,
0
,
1
):
#range(4):
file_path_mod
=
file_path
.
replace
(
"."
,
"_
%
d."
%
channel
)
if
verbose
>
1
:
print
(
html_text_td
)
html_text
+=
html_text_td
%
(
file_path_mod
,
file_path_mod
)
self
.
jpeg_write
(
file_path
=
file_path_mod
,
channel
=
channel
,
y_quality
=
y_quality
,
#80,
c_quality
=
c_quality
,
...
...
@@ -658,9 +692,19 @@ class X393Jpeg(object):
color_mode
=
color_mode
,
byrshift
=
byrshift
,
verbose
=
verbose
)
html_text
+=
html_text_finish
if
server_root
:
dotpos
=
file_path
.
rfind
(
"."
)
if
dotpos
<
0
:
html_name
=
file_path
+
".html"
else
:
html_name
=
file_path
[:
dotpos
]
+
".html"
if
verbose
>
1
:
print
(
"path = "
,
server_root
+
html_name
)
print
(
"text = "
,
html_text
)
with
open
(
server_root
+
html_name
,
"w+b"
)
as
bf
:
bf
.
write
(
html_text
)
return
except
:
pass
jpeg_data
=
self
.
jpegheader_create
(
y_quality
=
y_quality
,
...
...
@@ -680,7 +724,7 @@ class X393Jpeg(object):
print
(
"meta = "
,
meta
)
for
s
in
meta
[
"segments"
]:
print
(
"start_address = 0x
%
x, length = 0x
%
x"
%
(
s
[
0
],
s
[
1
]))
with
open
(
file_path
,
"w+b"
)
as
bf
:
with
open
(
server_root
+
file_path
,
"w+b"
)
as
bf
:
bf
.
write
(
jpeg_data
[
"header"
])
for
s
in
meta
[
"segments"
]:
print
(
"start_address = 0x
%
x, length = 0x
%
x"
%
(
s
[
0
],
s
[
1
]))
...
...
@@ -885,12 +929,14 @@ compressor_control all 2
#jpeg_write "/www/pages/img2.jpeg" 2
#jpeg_write "/www/pages/img3.jpeg" 3
jpeg_write "img.jpeg" all
jpeg_write "/www/pages/img.jpeg" all
#changing quality (example 85
%
):
set_qtables all 0 85
compressor_control all 2
jpeg_write "
/www/pages/
img.jpeg" all 85
jpeg_write "img.jpeg" all 85
-----
...
...
@@ -924,9 +970,12 @@ write_sensor_i2c 3 1 0 0x90350008
write_sensor_i2c 3 1 0 0x902c0008
write_sensor_i2c 3 1 0 0x902d001f
print_debug 0x35 ox66
set_qtables all 0 90
jpeg_write "/www/pages/img.jpeg" all
compressor_control all None 1
compressor_control all None 0
mem_save "/usr/local/verilog/memdump_chn0" 0x27a00000 0x01001000
"""
py393/x393_sens_cmprs.py
View file @
cbd5dc78
...
...
@@ -968,7 +968,7 @@ class X393SensCmprs(object):
def
print_debug
(
self
,
first
=
None
,
last
=
None
,
num32
=
1
00
):
num32
=
2
00
):
"""
Read and print serial debug ring as a sequence of 32-bit numbers
@parame first - index of the first 32-bit debug word to decode
...
...
@@ -1097,7 +1097,9 @@ class X393SensCmprs(object):
(
"dbg_zds_cntr"
,
16
),
(
"dbg_block_mem_wa"
,
3
),
(
"dbg_block_mem_wa_save"
,
3
),
(
None
,
26
)
(
None
,
26
),
(
"dbg_sec"
,
32
),
(
"dbg_usec"
,
32
)
),
"cmprs_afi_mux"
:
((
"fifo_count0"
,
8
),
(
None
,
24
),
...
...
@@ -1124,7 +1126,13 @@ class X393SensCmprs(object):
flat
=
flatten_debug
(
None
,
"x393"
)
maximal_name_length
=
max
([
len
(
f
[
0
])
for
f
in
flat
if
f
[
0
]
is
not
None
])
if
first
==
"list"
:
num_bits
=
0
;
for
p
in
flat
:
num_bits
+=
p
[
1
]
num_words
=
num_bits
//
32
if
num_bits
%
32
:
num_words
+=
1
if
(
first
==
list
)
or
(
first
==
"list"
):
l
=
0
;
for
p
in
flat
:
print
((
"
%03
x.
%02
x:
%
"
+
str
(
maximal_name_length
)
+
"s"
)
%
(
l
//
32
,
l
%
32
,
p
[
0
]))
...
...
@@ -1156,13 +1164,18 @@ class X393SensCmprs(object):
if
(
last
is
None
)
or
(
last
>
(
num32
-
1
)):
last
=
(
num32
-
1
)
for
i
,
d
in
enumerate
(
status
):
if
d
==
0xffffffff
:
if
i
<=
last
:
last
=
i
-
1
break
if
(
last
is
None
)
or
(
last
>
(
num_words
-
1
)):
last
=
(
num_words
-
1
)
# if (num_words)
# for i,d in enumerate (status):
# if d == 0xffffffff:
# if i <= last:
# last = i - 1
# break
# print("first = ",first)
# print ("last = ",last)
# print("total bits: ", l)
# print("total words32: ", l // 32)
l
=
0
;
long_status
=
0
;
for
i
,
s
in
enumerate
(
status
):
...
...
system_defines.vh
View file @
cbd5dc78
...
...
@@ -2,7 +2,7 @@
`ifndef SYSTEM_DEFINES
`define SYSTEM_DEFINES
`define PRELOAD_BRAMS
//
`define DEBUG_RING 1
`define DEBUG_RING 1
`define MEMBRIDGE_DEBUG_WRITE 1
// Enviroment-dependent options
`ifdef IVERILOG
...
...
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