Commit cb6ad792 authored by Andrey Filippov's avatar Andrey Filippov


parent 993b922d
......@@ -5,12 +5,12 @@ x393
FPGA code for Elphel 393 camera, created with [VDT plugin]( It runs on Xilinx Zynq 7030 SoC (FPGA plus dual ARM).
[Documentation]( is generated with Doxygen-based Doxverilog.
[Documentation]( is generated with Doxygen-based Doxverilog.
Run ./INIT_PROJECT in the top directory to copy initial .project and .pydevproject files for Eclipse
Simulation of this project requires some files from the Xilinx proprietary _unisims_ library (list of dependencies
is in this [blog post](
is in this [blog post](
[VDT plugin]( README file describes steps needed after installation of Xilinx software
(unisims library is not distributed separately).
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