Commit c96dad8c authored by Andrey Filippov's avatar Andrey Filippov

Added top module for compressor chain, finished porting color space converter

parent 454a65b4
This diff is collapsed.
......@@ -49,7 +49,9 @@ module cmprs_macroblock_buf_iface #(
// controller this can just be the same as mb_pre_end_in
output mb_pre_start_out, // 1 clock cycle before stream of addresses to the buffer
output [ 1:0] start_page, // page to read next tile from (or first of several pages)
output [ 6:0] macroblock_x // macroblock left pixel x relative to a tile (page) Maximal page - 128 bytes wide
output [ 6:0] macroblock_x, // macroblock left pixel x relative to a tile (page) Maximal page - 128 bytes wide
output reg first_mb, // during first macroblock (valid @mb_pre_start_out)
output last_mb // during last macroblock (valid @mb_pre_start_out)
);
......@@ -79,12 +81,14 @@ module cmprs_macroblock_buf_iface #(
reg mb_first_in_row;
reg mb_last_in_row;
reg mb_last_row;
wire mb_last;
// wire last_mb;
reg [ 2:0] next_valid; // number of next valid page (only 2 LSB are actual page number)
reg [ 2:0] next_invalid; // oldest valid page
reg [ 1:0] add_invalid; // advance next_invalid pointer by this value, send next_page pulses
reg [ 2:0] used_pages; // number of pages simultaneously used for the last macroblock
reg [ 2:0] needed_page; // calculate at MB start
reg pre_first_mb; // from frame start to mb_pre_start[2]
// reg first_mb; // from mb_pre_start[2] to mb_pre_start[1]
wire starting;
reg frame_pre_run;
......@@ -97,11 +101,11 @@ module cmprs_macroblock_buf_iface #(
assign mb_pre_start_out=mb_pre_start[5]; // first after wait?
assign macroblock_x = mbl_x;
assign mb_last = mb_last_row && mb_last_in_row;
assign last_mb = mb_last_row && mb_last_in_row;
assign starting = |mb_pre_start;
assign mb_pre_start_w = (mb_pre_end_in && (!mb_last || frame_en_w)) || (!frame_pre_run && frame_en_w && !frame_en_r && !starting);
assign frame_pre_start_w = frame_en_w && ((mb_pre_end_in && mb_last) || (!frame_pre_run && !frame_en_r && !starting));
assign mb_pre_start_w = (mb_pre_end_in && (!last_mb || frame_en_w)) || (!frame_pre_run && frame_en_w && !frame_en_r && !starting);
assign frame_pre_start_w = frame_en_w && ((mb_pre_end_in && last_mb) || (!frame_pre_run && !frame_en_r && !starting));
assign start_page = next_invalid[1:0]; // oldest page needed for this macroblock
always @ (posedge xclk) begin
......@@ -117,7 +121,7 @@ module cmprs_macroblock_buf_iface #(
if (!frame_en) frame_pre_run <= 0;
else if (mb_pre_start_w) frame_pre_run <= 1;
else if (mb_pre_end_in && mb_last) frame_pre_run <= 0;
else if (mb_pre_end_in && last_mb) frame_pre_run <= 0;
if (frame_pre_start_r) mb_rows_left <= n_block_rows_m1;
else if (mb_pre_start[0] && mb_last_in_row) mb_rows_left <= mb_rows_left - 1;
......@@ -129,6 +133,11 @@ module cmprs_macroblock_buf_iface #(
if (mb_pre_start[1]) mb_last_in_row <= (mb_cols_left == 0);
if (!frame_en || mb_pre_start[1]) pre_first_mb <= 0;
else if (frame_pre_start_r) pre_first_mb <= 1;
if (mb_pre_start[1]) first_mb <= pre_first_mb;
// pages read from the external memory, previous one is the last in the buffer
if (reset_page_rd) next_valid <= 0;
else if (page_ready) next_valid <= next_valid + 1;
......
/*******************************************************************************
* Module: cmprs_tile_mode2_decode
* Date:2015-06-14
* Author: andrey
* Description: Decode mode parameters, registered at pre-start of the macroblock
* data to color conversion module
*
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> .
* cmprs_tile_mode2_decode.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* cmprs_tile_mode2_decode.v is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/> .
*******************************************************************************/
`timescale 1ns/1ps
module cmprs_tile_mode2_decode #(
parameter CMPRS_COLOR18 = 0, // JPEG 4:2:0 with 18x18 overlapping tiles for de-bayer
parameter CMPRS_COLOR20 = 1, // JPEG 4:2:0 with 18x18 overlapping tiles for de-bayer (not implemented)
parameter CMPRS_MONO16 = 2, // JPEG 4:2:0 with 16x16 non-overlapping tiles, color components zeroed
parameter CMPRS_JP4 = 3, // JP4 mode with 16x16 macroblocks
parameter CMPRS_JP4DIFF = 4, // JP4DIFF mode TODO: see if correct
parameter CMPRS_MONO8 = 7 // Regular JPEG monochrome with 8x8 macroblocks (not yet implemented)
)(
input xclk,
input pre_first_in, // marks the first input pixel
input [2:0] converter_type,
input [ 1:0] bayer_phase,
input jp4_dc_improved,
input hdr,
input subtract_dc_in,
input first_mb_in, // valid @ pre_first_in - reading first macroblock
input last_mb_in, // valid @ pre_first_in - reading last macroblock
output reg four_blocks, // 1 - 4 blocks, 0 - 6 blocks
output reg subtract_dc, // enable subtracting DC components
output reg first_mb, // valid @ pre_first_in - reading first macroblock
output reg last_mb, // valid @ pre_first_in - reading last macroblock
output reg color_enable, // prevent JPEG random colors
output reg [5:0] component_numsL, // component_num [0]
output reg [5:0] component_numsM, // component_num [1]
output reg [5:0] component_numsH, // component_num [2]
output reg [5:0] component_colors, // use color quantization table (YCbCR, jp4diff)
output reg [5:0] component_first // first_r this component in a frame (DC absolute, otherwise - difference to previous)
);
reg [2:0] converter_type_r;
reg jp4_dc_improved_r;
reg hdr_r;
reg [3:0] bayer_phase_onehot;
always @ (posedge xclk) if (pre_first_in)begin
converter_type_r [2:0] <= converter_type[2:0];
jp4_dc_improved_r <= jp4_dc_improved;
hdr_r <= hdr;
subtract_dc <= subtract_dc_in;
first_mb <= first_mb_in;
last_mb <= last_mb_in;
bayer_phase_onehot[3:0]<={(bayer_phase[1:0]==2'h3)?1'b1:1'b0,
(bayer_phase[1:0]==2'h2)?1'b1:1'b0,
(bayer_phase[1:0]==2'h1)?1'b1:1'b0,
(bayer_phase[1:0]==2'h0)?1'b1:1'b0};
case (converter_type_r)
CMPRS_COLOR18: begin
component_numsL <= 6'h10; // component_num [0]
component_numsM <= 6'h20; // component_num [1]
component_numsH <= 6'h00; // component_num [2]
component_colors <= 6'h30; // use color quantization table (YCbCR, jp4diff)
component_first <= 6'h31; // first_r this component in a frame (DC absolute, otherwise - difference to previous)
four_blocks <= 0; // 6 blocks/maceoblock mode
color_enable <= 1'b1;
end
CMPRS_COLOR20: begin
component_numsL <= 6'h10; // component_num [0]
component_numsM <= 6'h20; // component_num [1]
component_numsH <= 6'h3f; // component_num [2]
component_colors <= 6'h30; // use color quantization table (YCbCR, jp4diff)
component_first <= 6'h31; // first_r this component in a frame (DC absolute, otherwise - difference to previous)
four_blocks <= 0; // 6 blocks/maceoblock mode
color_enable <= 1'b1;
end
CMPRS_MONO16: begin
component_numsL <= 6'h10; // component_num [0]
component_numsM <= 6'h20; // component_num [1]
component_numsH <= 6'h30; // component_num [2]
component_colors <= 6'h30; // use color quantization table (YCbCR, jp4diff)
component_first <= 6'h31; // first_r this component in a frame (DC absolute, otherwise - difference to previous)
four_blocks <= 0; // 6 blocks/maceoblock mode
color_enable <= 1'b0;
end
CMPRS_JP4: begin
component_numsL <= jp4_dc_improved_r?6'h0a:6'h10; // LSb of component_num
component_numsM <= jp4_dc_improved_r?6'h0c:6'h20; // MSb of component_num
component_numsH <= 6'h30; // component_num [2]
component_colors <= 6'h30; // use color quantization table (YCbCR, jp4diff)
component_first <= jp4_dc_improved_r?6'h3f:6'h31; // first_r this component in a frame (DC absolute, otherwise - difference to previous)
four_blocks <= 1; // 4 blocks/maceoblock mode
color_enable <= 1'b0;
end
CMPRS_JP4DIFF: begin
component_numsL <= 6'h0a; // LSb of component_num
component_numsM <= 6'h0c; // MSb of component_num
component_numsH <= 6'h30; // component_num [2]
component_colors <= {2'h3,~bayer_phase_onehot[3:0] | (hdr_r? {~bayer_phase_onehot[1:0],~bayer_phase_onehot[3:2]} : 4'h0)}; // use color quantization table (YCbCR, jp4diff)
component_first <= 6'h3f; // first_r this component in a frame (DC absolute, otherwise - difference to previous)
four_blocks <= 1; // 4 blocks/maceoblock mode
color_enable <= 1'b0;
end
CMPRS_MONO8: begin
/*
component_numsL <= 6'h00; // TODO: Implement, put actuqal data in this and other fields
component_numsM <= 6'h00;
component_numsH <= 6'h30;
component_colors <= 6'h30;
component_first <= 6'h31;
color_enable <= 1'b0;
*/
end
default: begin
component_numsL <= 'bx;
component_numsM <= 'bx;
component_numsH <= 'bx;
component_colors <= 'bx;
component_first <= 'bx;
four_blocks <= 'bx;
color_enable <= 'bx;
end
endcase
end
endmodule
/*******************************************************************************
* Module: cmprs_tile_mode_decode
* Date:2015-06-14
* Author: andrey
* Description: Decode tile/macroblocks parameters from compressor type
*
* Copyright (c) 2015 <set up in Preferences-Verilog/VHDL Editor-Templates> .
* cmprs_tile_mode_decode.v is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* cmprs_tile_mode_decode.v is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/> .
*******************************************************************************/
`timescale 1ns/1ps
module cmprs_tile_mode_decode #(
parameter CMPRS_COLOR18 = 0, // JPEG 4:2:0 with 18x18 overlapping tiles for de-bayer
parameter CMPRS_COLOR20 = 1, // JPEG 4:2:0 with 18x18 overlapping tiles for de-bayer (not implemented)
parameter CMPRS_MONO16 = 2, // JPEG 4:2:0 with 16x16 non-overlapping tiles, color components zeroed
parameter CMPRS_JP4 = 3, // JP4 mode with 16x16 macroblocks
parameter CMPRS_JP4DIFF = 4, // JP4DIFF mode TODO: see if correct
parameter CMPRS_MONO8 = 7 // Regular JPEG monochrome with 8x8 macroblocks (not yet implemented)
)(
input [2:0] converter_type,
output reg [ 5:0] mb_w_m1, // macroblock width minus 1 // 3 LSB not used, SHOULD BE SET to 3'b111
output reg [ 5:0] mb_h_m1, // macroblock horizontal period (8/16) // 3 LSB not used SHOULD BE SET to 3'b111
output reg [ 4:0] mb_hper, // macroblock horizontal period (8/16) // 3 LSB not used TODO: assign from converter_type[2:0]
output reg [ 1:0] tile_width, // memory tile width (can be 128 for monochrome JPEG) Can be 32/64/128: 0 - 16, 1 - 32, 2 - 64, 3 - 128
output reg tile_col_width // 0 - 16 pixels, 1 -32 pixels
);
// wire [ 2:0] converter_type; // 0 - color18, 1 - color20, 2 - mono, 3 - jp4, 4 - jp4-diff, 7 - mono8 (not yet implemented)
always @(converter_type) begin
case (converter_type)
CMPRS_COLOR18: begin
mb_w_m1 <= 17; // macroblock width minus 1 // 3 LSB not used, SHOULD BE SET to 3'b111
mb_h_m1 <= 17; // macroblock horizontal period (8/16) // 3 LSB not used SHOULD BE SET to 3'b111
mb_hper <= 16; // macroblock horizontal period (8/16) // 3 LSB not used TODO: assign from converter_type[2:0]
tile_width <= 1; // memory tile width (can be 128 for monochrome JPEG) Can be 32/64/128: 0 - 16, 1 - 32, 2 - 64, 3 - 128
tile_col_width <= 1; // 0 - 16 pixels, 1 -32 pixels
end
CMPRS_COLOR20: begin
mb_w_m1 <= 19; // macroblock width minus 1 // 3 LSB not used, SHOULD BE SET to 3'b111
mb_h_m1 <= 19; // macroblock horizontal period (8/16) // 3 LSB not used SHOULD BE SET to 3'b111
mb_hper <= 16; // macroblock horizontal period (8/16) // 3 LSB not used TODO: assign from converter_type[2:0]
tile_width <= 1; // memory tile width (can be 128 for monochrome JPEG) Can be 32/64/128: 0 - 16, 1 - 32, 2 - 64, 3 - 128
tile_col_width <= 1; // 0 - 16 pixels, 1 -32 pixels
end
CMPRS_MONO16: begin
mb_w_m1 <= 15; // macroblock width minus 1 // 3 LSB not used, SHOULD BE SET to 3'b111
mb_h_m1 <= 15; // macroblock horizontal period (8/16) // 3 LSB not used SHOULD BE SET to 3'b111
mb_hper <= 16; // macroblock horizontal period (8/16) // 3 LSB not used TODO: assign from converter_type[2:0]
tile_width <= 2; // memory tile width (can be 128 for monochrome JPEG) Can be 32/64/128: 0 - 16, 1 - 32, 2 - 64, 3 - 128
tile_col_width <= 1; // 0 - 16 pixels, 1 -32 pixels
end
CMPRS_JP4: begin
mb_w_m1 <= 15; // macroblock width minus 1 // 3 LSB not used, SHOULD BE SET to 3'b111
mb_h_m1 <= 15; // macroblock horizontal period (8/16) // 3 LSB not used SHOULD BE SET to 3'b111
mb_hper <= 16; // macroblock horizontal period (8/16) // 3 LSB not used TODO: assign from converter_type[2:0]
tile_width <= 2; // memory tile width (can be 128 for monochrome JPEG) Can be 32/64/128: 0 - 16, 1 - 32, 2 - 64, 3 - 128
tile_col_width <= 1; // 0 - 16 pixels, 1 -32 pixels
end
CMPRS_JP4DIFF: begin
mb_w_m1 <= 15; // macroblock width minus 1 // 3 LSB not used, SHOULD BE SET to 3'b111
mb_h_m1 <= 15; // macroblock horizontal period (8/16) // 3 LSB not used SHOULD BE SET to 3'b111
mb_hper <= 16; // macroblock horizontal period (8/16) // 3 LSB not used TODO: assign from converter_type[2:0]
tile_width <= 2; // memory tile width (can be 128 for monochrome JPEG) Can be 32/64/128: 0 - 16, 1 - 32, 2 - 64, 3 - 128
tile_col_width <= 1; // 0 - 16 pixels, 1 -32 pixels
end
CMPRS_MONO8: begin
mb_w_m1 <= 7; // macroblock width minus 1 // 3 LSB not used, SHOULD BE SET to 3'b111
mb_h_m1 <= 7; // macroblock horizontal period (8/16) // 3 LSB not used SHOULD BE SET to 3'b111
mb_hper <= 8; // macroblock horizontal period (8/16) // 3 LSB not used TODO: assign from converter_type[2:0]
tile_width <= 3; // memory tile width (can be 128 for monochrome JPEG) Can be 32/64/128: 0 - 16, 1 - 32, 2 - 64, 3 - 128
tile_col_width <= 1; // 0 - 16 pixels, 1 -32 pixels
end
default: begin
mb_w_m1 <= 'bx; // macroblock width minus 1 // 3 LSB not used, SHOULD BE SET to 3'b111
mb_h_m1 <= 'bx; // macroblock horizontal period (8/16) // 3 LSB not used SHOULD BE SET to 3'b111
mb_hper <= 'bx; // macroblock horizontal period (8/16) // 3 LSB not used TODO: assign from converter_type[2:0]
tile_width <= 'bx; // memory tile width (can be 128 for monochrome JPEG) Can be 32/64/128: 0 - 16, 1 - 32, 2 - 64, 3 - 128
tile_col_width <= 'bx; // 0 - 16 pixels, 1 -32 pixels
end
endcase
end
endmodule
......@@ -48,7 +48,7 @@ module color_proc393 (
output dv_raw, // data valid for di (for testing to bypass color conversion - use di[7:0])
input ignore_color, //zero Cb/Cr components
input four_blocks, // use only 6 blocks for the output, not 6
input four_blocks, // use only 4 blocks for the output, not 6
input jp4_dc_improved, // in JP4 mode, compare DC coefficients to the same color ones
input [ 1:0] tile_margin, // margins around 16x16 tiles (0/1/2)
input [ 2:0] tile_shift, // tile shift from top left corner
......@@ -56,7 +56,7 @@ module color_proc393 (
input scale_diff, // divide differences by 2 (to fit in 8-bit range)
input hdr, // second green absolute, not difference
output [ 9:0] do, // [9:0] data out (4:2:0) (signed, average=0)
output [ 8:0] avr, // [8:0] DC (average value) - RAM output, no register. For Y components 9'h080..9'h07f, for C - 9'h100..9'h0ff!
output [ 8:0] avr, // [8:0] DC (average value) - RAM output, no register. For Y components 9'h080..9'h07f, for C - 9'h100..9'h0ff!
output dv, // out data valid (will go high for at least 64 cycles)
output ds, // single-cycle mark of the first_r pixel in a 64 (8x8) - pixel block
output [ 2:0] tn, // [2:0] tile number 0..3 - Y, 4 - Cb, 5 - Cr (valid with start)
......@@ -273,50 +273,56 @@ module color_proc393 (
wire [8:0] avrY_di= avrY_wa[1] ? (avrY_wa[0]?accY3[14:6]:accY2[14:6]):(avrY_wa[0]?accY1[14:6]:accY0[14:6]);
wire [8:0] avrC_di= avrC_wa ?accC1[14:6]:accC0[14:6];
assign avr = avermem[avr_ra[3:0]];
assign pre_accYdone[3:0] = {(accCntrY3[5:0]==6'h3e)?1'b1:1'b0,(accCntrY2[5:0]==6'h3e)?1'b1:1'b0,(accCntrY1[5:0]==6'h3e)?1'b1:1'b0,(accCntrY0[5:0]==6'h3e)?1'b1:1'b0} & accYen[3:0];
assign pre_accCdone[1:0] = { (accCntrC1[5:0]==6'h3e)?1'b1:1'b0,(accCntrC0[5:0]==6'h3e)?1'b1:1'b0} & accCen[1:0];
assign pre_accYdone[3:0] = {(accCntrY3[5:0]==6'h3e)?1'b1:1'b0,
(accCntrY2[5:0]==6'h3e)?1'b1:1'b0,
(accCntrY1[5:0]==6'h3e)?1'b1:1'b0,
(accCntrY0[5:0]==6'h3e)?1'b1:1'b0} & accYen[3:0];
assign pre_accCdone[1:0] = {(accCntrC1[5:0]==6'h3e)?1'b1:1'b0,
(accCntrC0[5:0]==6'h3e)?1'b1:1'b0} & accCen[1:0];
always @ (posedge clk) begin
cs_first_out<=cs_pre_first_out;
if (ywe) preAccY[8:0] <= y_in[8:0];
if (cwe) preAccC[8:0] <= c_in[8:0];
accYen[3:0] <= {4{en & ywe}} & {yaddrw[7] & yaddrw[6], yaddrw[7] & ~yaddrw[6],~ yaddrw[7] & yaddrw[6], ~yaddrw[7] & ~yaddrw[6]};
accCen[1:0] <= {2{en & cwe}} & {caddrw[6], ~caddrw[6]};
accYfirst[3:0] <= {4{cs_first_out}} | (accYfirst[3:0] & ~accYen[3:0]);
accCfirst[1:0] <= {2{cs_first_out}} | (accCfirst[1:0] & ~accCen[1:0]);
if (accYen[0]) accY0[14:0]<= (accYfirst[0]?15'h0:accY0[14:0]) + {{6{preAccY[8]}},preAccY[8:0]};
if (accYen[1]) accY1[14:0]<= (accYfirst[1]?15'h0:accY1[14:0]) + {{6{preAccY[8]}},preAccY[8:0]};
if (accYen[2]) accY2[14:0]<= (accYfirst[2]?15'h0:accY2[14:0]) + {{6{preAccY[8]}},preAccY[8:0]};
if (accYen[3]) accY3[14:0]<= (accYfirst[3]?15'h0:accY3[14:0]) + {{6{preAccY[8]}},preAccY[8:0]};
if (accCen[0]) accC0[14:0]<= (accCfirst[0]?15'h0:accC0[14:0]) + {{6{preAccC[8]}},preAccC[8:0]};
if (accCen[1]) accC1[14:0]<= (accCfirst[1]?15'h0:accC1[14:0]) + {{6{preAccC[8]}},preAccC[8:0]};
if (!en) accCntrY0[5:0]<= 6'h0; else if (accYen[0]) accCntrY0[5:0]<= (accYfirst[0]?6'h0:(accCntrY0[5:0]+1));
if (!en) accCntrY1[5:0]<= 6'h0; else if (accYen[1]) accCntrY1[5:0]<= (accYfirst[1]?6'h0:(accCntrY1[5:0]+1));
if (!en) accCntrY2[5:0]<= 6'h0; else if (accYen[2]) accCntrY2[5:0]<= (accYfirst[2]?6'h0:(accCntrY2[5:0]+1));
if (!en) accCntrY3[5:0]<= 6'h0; else if (accYen[3]) accCntrY3[5:0]<= (accYfirst[3]?6'h0:(accCntrY3[5:0]+1));
if (!en) accCntrC0[5:0]<= 6'h0; else if (accCen[0]) accCntrC0[5:0]<= (accCfirst[0]?6'h0:(accCntrC0[5:0]+1));
if (!en) accCntrC1[5:0]<= 6'h0; else if (accCen[1]) accCntrC1[5:0]<= (accCfirst[1]?6'h0:(accCntrC1[5:0]+1));
accYrun[3:0] <= {4{en}} & ((accYfirst[3:0] & accYen[3:0]) | (accYrun[3:0] & ~pre_accYdone[3:0]));
accCrun[1:0] <= {2{en}} & ((accCfirst[1:0] & accCen[1:0]) | (accCrun[1:0] & ~pre_accCdone[1:0]));
accYdone[3:0] <= pre_accYdone[3:0] & accYrun[3:0];
accYdoneAny <= |(pre_accYdone[3:0] & accYrun[3:0]);
avr_we <= |(pre_accYdone[3:0] & accYrun[3:0]) || |(pre_accCdone[1:0] & accCrun[1:0]);
pre_avrY_wa[1:0] <= yaddrw[7:6];
avrY_wa[1:0] <= pre_avrY_wa[1:0];
pre_avrC_wa <= caddrw[ 6];
avrC_wa <= pre_avrC_wa;
pre_avrPage_wa <= wpage[0];
avrPage_wa <= pre_avrPage_wa;
if (avr_we) avermem[avr_wa[3:0]] <= en_sdc?(accYdoneAny?avrY_di[8:0]:avrC_di[8:0]):9'h0;
avr_ra[3:0] <= {rpage[0],raddr[8:6]};
raddr8_d <= raddr[8];
cs_first_out<=cs_pre_first_out;
if (ywe) preAccY[8:0] <= y_in[8:0];
if (cwe) preAccC[8:0] <= c_in[8:0];
accYen[3:0] <= {4{en & ywe}} & {yaddrw[7] & yaddrw[6],
yaddrw[7] & ~yaddrw[6],
~yaddrw[7] & yaddrw[6],
~yaddrw[7] & ~yaddrw[6]};
accCen[1:0] <= {2{en & cwe}} & { caddrw[6],
~caddrw[6]};
accYfirst[3:0] <= {4{cs_first_out}} | (accYfirst[3:0] & ~accYen[3:0]);
accCfirst[1:0] <= {2{cs_first_out}} | (accCfirst[1:0] & ~accCen[1:0]);
if (accYen[0]) accY0[14:0]<= (accYfirst[0]?15'h0:accY0[14:0]) + {{6{preAccY[8]}},preAccY[8:0]};
if (accYen[1]) accY1[14:0]<= (accYfirst[1]?15'h0:accY1[14:0]) + {{6{preAccY[8]}},preAccY[8:0]};
if (accYen[2]) accY2[14:0]<= (accYfirst[2]?15'h0:accY2[14:0]) + {{6{preAccY[8]}},preAccY[8:0]};
if (accYen[3]) accY3[14:0]<= (accYfirst[3]?15'h0:accY3[14:0]) + {{6{preAccY[8]}},preAccY[8:0]};
if (accCen[0]) accC0[14:0]<= (accCfirst[0]?15'h0:accC0[14:0]) + {{6{preAccC[8]}},preAccC[8:0]};
if (accCen[1]) accC1[14:0]<= (accCfirst[1]?15'h0:accC1[14:0]) + {{6{preAccC[8]}},preAccC[8:0]};
if (!en) accCntrY0[5:0]<= 6'h0; else if (accYen[0]) accCntrY0[5:0]<= (accYfirst[0]?6'h0:(accCntrY0[5:0]+1));
if (!en) accCntrY1[5:0]<= 6'h0; else if (accYen[1]) accCntrY1[5:0]<= (accYfirst[1]?6'h0:(accCntrY1[5:0]+1));
if (!en) accCntrY2[5:0]<= 6'h0; else if (accYen[2]) accCntrY2[5:0]<= (accYfirst[2]?6'h0:(accCntrY2[5:0]+1));
if (!en) accCntrY3[5:0]<= 6'h0; else if (accYen[3]) accCntrY3[5:0]<= (accYfirst[3]?6'h0:(accCntrY3[5:0]+1));
if (!en) accCntrC0[5:0]<= 6'h0; else if (accCen[0]) accCntrC0[5:0]<= (accCfirst[0]?6'h0:(accCntrC0[5:0]+1));
if (!en) accCntrC1[5:0]<= 6'h0; else if (accCen[1]) accCntrC1[5:0]<= (accCfirst[1]?6'h0:(accCntrC1[5:0]+1));
accYrun[3:0] <= {4{en}} & ((accYfirst[3:0] & accYen[3:0]) | (accYrun[3:0] & ~pre_accYdone[3:0]));
accCrun[1:0] <= {2{en}} & ((accCfirst[1:0] & accCen[1:0]) | (accCrun[1:0] & ~pre_accCdone[1:0]));
accYdone[3:0] <= pre_accYdone[3:0] & accYrun[3:0];
accYdoneAny <= |(pre_accYdone[3:0] & accYrun[3:0]);
avr_we <= |(pre_accYdone[3:0] & accYrun[3:0]) || |(pre_accCdone[1:0] & accCrun[1:0]);
pre_avrY_wa[1:0] <= yaddrw[7:6];
avrY_wa[1:0] <= pre_avrY_wa[1:0];
pre_avrC_wa <= caddrw[ 6];
avrC_wa <= pre_avrC_wa;
pre_avrPage_wa <= wpage[0];
avrPage_wa <= pre_avrPage_wa;
if (avr_we) avermem[avr_wa[3:0]] <= en_sdc?(accYdoneAny?avrY_di[8:0]:avrC_di[8:0]):9'h0;
avr_ra[3:0] <= {rpage[0],raddr[8:6]};
raddr8_d <= raddr[8];
end
reg transfer_ended=0; /// there was already EOT pulse for the current frame
......@@ -400,7 +406,7 @@ module color_proc393 (
yaddrw[7:0] <= {conv18_yaddrw[7],conv18_yaddrw[3],conv18_yaddrw[6:4],conv18_yaddrw[2:0]};
c_in[8:0] <= {conv18_c_in[8:0]};
cwe <= conv18_cwe;
pre_color_enable <= 1'b1;
pre_color_enable <= 1'b1;
caddrw[7:0] <= {1'b0,conv18_caddrw[6:0]};
ccv_out_start <= (conv18_yaddrw[7:0]==8'hc5); //TODO: adjust to minimal latency?
component_numsLS <= 6'h10; // component_num [0]
......@@ -416,7 +422,7 @@ module color_proc393 (
yaddrw[7:0] <= {conv20_yaddrw[7],conv20_yaddrw[3],conv20_yaddrw[6:4],conv20_yaddrw[2:0]};
c_in[8:0] <= {conv20_c_in[8:0]};
cwe <= conv20_cwe;
pre_color_enable <= 1'b1;
pre_color_enable <= 1'b1;
caddrw[7:0] <= {1'b0,conv20_caddrw[6:0]};
ccv_out_start <= (conv20_yaddrw[7:0]==8'hc5); //TODO: adjust to minimal latency?
component_numsLS <= 6'h10; // component_num [0]
......
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......@@ -286,14 +286,14 @@ module csconvert18a(
// SRL16 i_nxtline(.Q(nxtline),.D(!RST && ywe_r && (yaddr_r[3:0]==4'hf) && (yaddr_r[7:4]!=4'hf)), .CLK(CLK), .A0(1'b1), .A1(1'b0), .A2(1'b0), .A3(1'b0)); // dly=1+1
always @ (posedge CLK) begin
ywe_r <= !RST && (ystrt || nxtline || (ywe_r && (yaddr_r[3:0]!=4'hf)));
yaddr_r[7:4] <= (RST || strt)? 4'h0: (nxtline?(yaddr_r[7:4]+1):yaddr_r[7:4]);
yaddr_r[3:0] <= ywe_r? (yaddr_r[3:0]+1):4'h0;
odd_pix <= RST || strt || ~odd_pix;
if (RST || strt) odd_line <= 1'b0;
else if (yaddr_r[3:0]==4'hd) odd_line <= ~odd_line;
if (RST || strt) pix_green <=bayer_phase[1]^bayer_phase[0];
else pix_green <=~(yaddr_r[3:0]==4'hd)^pix_green;
ywe_r <= !RST && (ystrt || nxtline || (ywe_r && (yaddr_r[3:0]!=4'hf)));
yaddr_r[7:4] <= (RST || strt)? 4'h0: (nxtline?(yaddr_r[7:4]+1):yaddr_r[7:4]);
yaddr_r[3:0] <= ywe_r? (yaddr_r[3:0]+1):4'h0;
odd_pix <= RST || strt || ~odd_pix;
if (RST || strt) odd_line <= 1'b0;
else if (yaddr_r[3:0]==4'hd) odd_line <= ~odd_line;
if (RST || strt) pix_green <=bayer_phase[1]^bayer_phase[0];
else pix_green <=~(yaddr_r[3:0]==4'hd)^pix_green;
end
// First block generates 2 8-bit values (latency=3)- pixel (p2) and average value of previous and next pixel in the same
......
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