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Elphel
x393
Commits
bf463e76
Commit
bf463e76
authored
Feb 02, 2021
by
Andrey Filippov
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v.202 for Boson - reset with OD
parent
df06bda0
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fpga_version.vh
fpga_version.vh
+2
-1
sens_103993.v
sensor/sens_103993.v
+4
-3
x393_boson.bit
x393_boson.bit
+0
-0
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fpga_version.vh
View file @
bf463e76
...
@@ -35,7 +35,8 @@
...
@@ -35,7 +35,8 @@
* contains all the components and scripts required to completely simulate it
* contains all the components and scripts required to completely simulate it
* with at least one of the Free Software programs.
* with at least one of the Free Software programs.
*/
*/
parameter FPGA_VERSION = 32'h03930201; // Initial Boson implementation (cheating with 2.5V - as with HISPI)
parameter FPGA_VERSION = 32'h03930202; // Initial Boson implementation (cheating with 2.5V), open drain for Boson reset
// parameter FPGA_VERSION = 32'h03930201; // Initial Boson implementation (cheating with 2.5V - as with HISPI)
// parameter FPGA_VERSION = 32'h03930200; // Initial Boson implementation (1.8V)
// parameter FPGA_VERSION = 32'h03930200; // Initial Boson implementation (1.8V)
//BOSON
//BOSON
// parameter FPGA_VERSION = 32'h03930139; // Adding pullup on senspgm
// parameter FPGA_VERSION = 32'h03930139; // Adding pullup on senspgm
...
...
sensor/sens_103993.v
View file @
bf463e76
...
@@ -496,15 +496,16 @@ module sens_103993 #(
...
@@ -496,15 +496,16 @@ module sens_103993 #(
.
I
(
ext_sync
)
// input
.
I
(
ext_sync
)
// input
)
;
)
;
// generate MRST
// generate MRST
(for Boson ground/float
obuf
#(
obuf
t
#(
.
CAPACITANCE
(
PXD_CAPACITANCE
)
,
.
CAPACITANCE
(
PXD_CAPACITANCE
)
,
.
DRIVE
(
PXD_DRIVE
)
,
.
DRIVE
(
PXD_DRIVE
)
,
.
IOSTANDARD
(
PXD_IOSTANDARD
)
,
.
IOSTANDARD
(
PXD_IOSTANDARD
)
,
.
SLEW
(
PXD_SLEW
)
.
SLEW
(
PXD_SLEW
)
)
sns_mrst_i
(
)
sns_mrst_i
(
.
O
(
sns_mrst
)
,
// output
.
O
(
sns_mrst
)
,
// output
.
I
(
imrst
)
// input
.
I
(
imrst
)
,
// input
.
T
(
imrst
)
// input // tristate when high
)
;
)
;
...
...
x393_boson.bit
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bf463e76
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