Commit beb06b1f authored by Andrey Filippov's avatar Andrey Filippov
Browse files

improving sensor_i2c

parent 1f717678

.gitignore

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@@ -40,3 +40,5 @@ py393/x393_i2c.py.test 
py393/x393_init_usb_hub.py

py393/x393_mcntrl_adjust.py.dbg

x393_testbench03_01.sav

simulation_data/*.dat

simulation_data/*.jpeg

.project

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@@ -62,52 +62,52 @@ 
		<link>

			<name>vivado_logs/VivadoBitstream.log</name>

			<type>1</type>

			<location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20160513115248831.log</location>

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			<location>/home/andrey/git/x393/vivado_logs/VivadoOptPower-20160513140328135.log</location>

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			<location>/home/andrey/git/x393/vivado_logs/VivadoRoute-20160513115248831.log</location>

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			<location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20160513114712446.log</location>

			<location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20160513135803163.log</location>

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			<name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name>

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@@ -127,7 +127,7 @@ 
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			<location>/home/andrey/git/x393/vivado_state/x393-synth-20160513114712446.dcp</location>

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		</link>

	</linkedResources>

</projectDescription>

fpga_version.vh

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@@ -32,8 +32,11 @@ 
 * with at least one of the Free Software programs.

 *******************************************************************************/

 

        parameter FPGA_VERSION =          32'h0393008f;    // parallel, all the same

//        parameter FPGA_VERSION =          32'h0393008e;    // hispi, adding i2c fifo fill, all met,83.73%

//        parameter FPGA_VERSION =          32'h0393008d;    // parallel, adding i2c fifo fill max err 0.128, 82.61%

//        parameter FPGA_VERSION =          32'h0393008c;      // hispi, all met, 83.55%

        parameter FPGA_VERSION =          32'h0393008b;    // parallel, all met, 82.06%

//        parameter FPGA_VERSION =          32'h0393008b;    // parallel, all met, 82.06% . Reran 0.051ns error, 82.02%

//        parameter FPGA_VERSION =          32'h0393008a;    // HiSPI sensor (14 MPix) no timing errors

//        parameter FPGA_VERSION =          32'h03930089;    // Auto-synchronizing i2c sequencers with the command ones

//        parameter FPGA_VERSION =          32'h03930088;    // Fixing circbuf rollover pointers bug (only one path violated)

sensor/sensor_i2c.v

+33 −6
Original line number Diff line number Diff line
@@ -121,6 +121,7 @@ module sensor_i2c#( 
     reg    [3:0]  page_r;     // FIFO page where current i2c commands are taken from

     

     reg    [3:0]  wpage_wr;      // FIFO page where current write goes (reading from write address) 

     reg    [3:0]  wpage_wr_only; // as, wpage_wr but uses rel[0] after frame sync, not wpage_prev (for fifo_fill)  

     reg    [1:0]  wpage0_inc; // increment wpage0 (after frame sync or during reset)

     reg           reset_cmd;

     reg           run_cmd;
@@ -181,10 +182,16 @@ module sensor_i2c#( 
     wire          scl_hard;



`ifdef I2C_FRAME_INDEPENDENT

     localparam sync_to_seq = -;

     localparam sync_to_seq = 0;

`else     

     reg           sync_to_seq;

`endif

     reg     [5:0] last_wp;    // last written write pointer     

     reg     [5:0] last_wp_d;    // last written write pointer, delayed to match rpointer

     reg           was_asap;     

     reg     [3:0] last_wpage; // last written to page (or zeroed)

     reg     [5:0] fifo_fill;  // number of words written to the other (not current) page, or difference wp-rp for the current

     wire    [5:0] fifo_wr_pointers_next; // pointer value to be written to  fifo_wr_pointers_ram[wpage_wr]    

     

     assign set_ctrl_w = we_cmd && ((wa & ~SENSI2C_CTRL_MASK) == SENSI2C_CTRL );// ==0

     assign set_status_w = we_cmd && ((wa & ~SENSI2C_CTRL_MASK) == SENSI2C_STATUS );// ==0
@@ -202,7 +209,7 @@ module sensor_i2c#( 
     assign scl_en =  i2c_enrun?  1'b1:        scl_en_soft  ;

     assign sda_out = i2c_enrun?  sda_hard:    sda_soft ;

     assign sda_en =  i2c_enrun?  sda_en_hard: sda_en_soft ;



     assign fifo_wr_pointers_next = wpage0_inc[1]? 6'h0:(fifo_wr_pointers_outw_r[5:0]+1);
@@ -236,7 +243,7 @@ module sensor_i2c#( 


    status_generate #(

        .STATUS_REG_ADDR(SENSI2C_STATUS_REG),

        .PAYLOAD_BITS(7+3+10) // STATUS_PAYLOAD_BITS)

        .PAYLOAD_BITS(7+6+3+10) // STATUS_PAYLOAD_BITS)

    ) status_generate_sens_i2c_i (

        .rst        (1'b0), // rst), // input

        .clk        (mclk), // input
@@ -244,6 +251,7 @@ module sensor_i2c#( 
        .we         (set_status_w), // input

        .wd         (di[7:0]), // input[7:0] 

        .status     ({reset_on, req_clr,

                      fifo_fill[5:0],

                      frame_num[3:0],

                      alive_fs,busy, i2c_fifo_cntrl, i2c_fifo_nempty,

                      i2c_fifo_dout[7:0],
@@ -340,7 +348,26 @@ module sensor_i2c#( 
      if (wen_fifo)  fifo_wr_pointers_outw_r[5:0] <= fifo_wr_pointers_outw[5:0];

       

       // write to dual-port pointer memory

      if (we_fifo_wp) fifo_wr_pointers_ram[wpage_wr] <= wpage0_inc[1]? 6'h0:(fifo_wr_pointers_outw_r[5:0]+1); 

//      if (we_fifo_wp) fifo_wr_pointers_ram[wpage_wr] <= wpage0_inc[1]? 6'h0:(fifo_wr_pointers_outw_r[5:0]+1);

      if (we_fifo_wp)  begin

          fifo_wr_pointers_ram[wpage_wr] <= fifo_wr_pointers_next;

          last_wp <=                        fifo_wr_pointers_next;

          last_wpage <=                     wpage_wr_only;

      end

/*

     reg     [5:0] last_wp_d;    // last written write pointer, delayed to match rpointer

     reg           was_asap;     



*/

      last_wp_d <= last_wp; // to match rrpointer

      was_asap <= (last_wpage == wpage0);

      

      if      (we_abs)        wpage_wr_only <= ((wa==wpage_prev)? wpage0[3:0] : wa);

      else if (we_rel)        wpage_wr_only <= wpage0 + wa;

      else if (wpage0_inc[0]) wpage_wr_only <= wpage0 + 1;

      

//      fifo_fill <=  last_wp - ((last_wpage == wpage0)? rpointer : 6'b0); // for current frame use wp-rp, for other pages - just wp

      fifo_fill <=  last_wp_d - (was_asap ? rpointer : 6'b0); // for current frame use wp-rp, for other pages - just wp

        

      fifo_wr_pointers_outr_r[5:0] <= fifo_wr_pointers_outr[5:0]; // just register distri

      if (wen_fifo) i2c_cmd_wa <= {wpage_wr[3:0],fifo_wr_pointers_outw[5:0]};
@@ -355,7 +382,7 @@ module sensor_i2c#( 
      else if (page_r_inc[0]) page_r <= page_r+1;

`endif



//############ rpointer should startt not from 0, but form valuie in another RAM???

//############ rpointer should start not from 0, but form value in another RAM???

      if      (reset_cmd || page_r_inc[0])  rpointer[5:0] <= 6'h0;

      else if (i2c_run_d && ! i2c_run)      rpointer[5:0] <= rpointer[5:0] + 1;

simulation_data/README

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This directory is needed for files generated by the simulator
 
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