Commit b84d2fef authored by Andrey Filippov's avatar Andrey Filippov

Tested 8-point 1d dct-iv, added test bench and LibreOffice Calc verification and shedule

parent 76c093e5
FPGA_project_@_DUTTopFile=cocotb/x393_dut.v FPGA_project_@_DUTTopFile=cocotb/x393_dut.v
FPGA_project_@_DUTTopModule=x393_dut FPGA_project_@_DUTTopModule=x393_dut
FPGA_project_@_ImplementationTopFile=x393.v FPGA_project_@_ImplementationTopFile=x393.v
FPGA_project_@_SimulationTopFile=x393_testbench03.tf FPGA_project_@_SimulationTopFile=dsp/dct_tests_01.tf
FPGA_project_@_SimulationTopModule=x393_testbench03 FPGA_project_@_SimulationTopModule=dct_tests_01
FPGA_project_@_part=xc7z030fbg484-1 FPGA_project_@_part=xc7z030fbg484-1
com.elphel.store.context.FPGA_project=FPGA_project_@_SimulationTopFile<-@\#\#@->FPGA_project_@_DUTTopModule<-@\#\#@->FPGA_project_@_ImplementationTopFile<-@\#\#@->FPGA_project_@_DUTTopFile<-@\#\#@->FPGA_project_@_SimulationTopModule<-@\#\#@->FPGA_project_@_part<-@\#\#@-> com.elphel.store.context.FPGA_project=FPGA_project_@_SimulationTopFile<-@\#\#@->FPGA_project_@_DUTTopModule<-@\#\#@->FPGA_project_@_ImplementationTopFile<-@\#\#@->FPGA_project_@_DUTTopFile<-@\#\#@->FPGA_project_@_SimulationTopModule<-@\#\#@->FPGA_project_@_part<-@\#\#@->
com.elphel.store.version.FPGA_project=1.0 com.elphel.store.version.FPGA_project=1.0
......
com.elphel.store.context.iverilog=iverilog_@_ExtraFiles<-@\#\#@->iverilog_@_ShowWarnings<-@\#\#@->iverilog_@_SaveLogsSimulator<-@\#\#@->iverilog_@_ShowNoProblem<-@\#\#@->iverilog_@_IncludeDir<-@\#\#@->iverilog_@_TopModulesOther<-@\#\#@->iverilog_@_GTKWaveSavFile<-@\#\#@->iverilog_@_SaveLogsPreprocessor<-@\#\#@-> com.elphel.store.context.iverilog=iverilog_@_ShowWarnings<-@\#\#@->iverilog_@_SaveLogsSimulator<-@\#\#@->iverilog_@_ShowNoProblem<-@\#\#@->iverilog_@_IncludeDir<-@\#\#@->iverilog_@_GTKWaveSavFile<-@\#\#@->iverilog_@_SaveLogsPreprocessor<-@\#\#@->iverilog_@_TopModulesOther<-@\#\#@->iverilog_@_ExtraFiles<-@\#\#@->
com.elphel.store.version.iverilog=1.1 com.elphel.store.version.iverilog=1.1
eclipse.preferences.version=1 eclipse.preferences.version=1
iverilog_@_ExtraFiles=glbl.v<-@\#\#@-> iverilog_@_ExtraFiles=glbl.v<-@\#\#@->
iverilog_@_GTKWaveSavFile=x393_testbench04.sav iverilog_@_GTKWaveSavFile=dct_tests_01.sav
iverilog_@_IncludeDir=${verilog_project_loc}/ddr3<-@\#\#@->${verilog_project_loc}/includes<-@\#\#@->${verilog_project_loc}/x393_sata<-@\#\#@->${verilog_project_loc}/x393_sata/host<-@\#\#@-> iverilog_@_IncludeDir=${verilog_project_loc}/ddr3<-@\#\#@->${verilog_project_loc}/includes<-@\#\#@->${verilog_project_loc}/x393_sata<-@\#\#@->${verilog_project_loc}/x393_sata/host<-@\#\#@->
iverilog_@_SaveLogsPreprocessor=false iverilog_@_SaveLogsPreprocessor=false
iverilog_@_SaveLogsSimulator=true iverilog_@_SaveLogsSimulator=true
......
[*]
[*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI
[*] Tue Dec 6 17:55:24 2016
[*]
[dumpfile] "/home/eyesis/git/x393-neon/simulation/dct_tests_01-20161206105514691.fst"
[dumpfile_mtime] "Tue Dec 6 17:55:14 2016"
[dumpfile_size] 10348
[savefile] "/home/eyesis/git/x393-neon/dct_tests_01.sav"
[timestart] 0
[size] 1814 1171
[pos] 1937 0
*-18.387537 1752000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] dct_tests_01.
[treeopen] dct_tests_01.dct_iv8_1d_i.
[treeopen] dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.
[sst_width] 204
[signals_width] 305
[sst_expanded] 1
[sst_vpaned_height] 344
@800200
-top
@25
dct_tests_01.i
dct_tests_01.j
@28
dct_tests_01.CLK
dct_tests_01.RST
dct_tests_01.en_out
dct_tests_01.en_x
@22
dct_tests_01.phase_in[3:0]
@28
dct_tests_01.pre2_start_out
dct_tests_01.run_in
dct_tests_01.run_out
dct_tests_01.x_we
@22
dct_tests_01.x_wa[2:0]
@c08022
dct_tests_01.x_in[23:0]
@28
(0)dct_tests_01.x_in[23:0]
(1)dct_tests_01.x_in[23:0]
(2)dct_tests_01.x_in[23:0]
(3)dct_tests_01.x_in[23:0]
(4)dct_tests_01.x_in[23:0]
(5)dct_tests_01.x_in[23:0]
(6)dct_tests_01.x_in[23:0]
(7)dct_tests_01.x_in[23:0]
(8)dct_tests_01.x_in[23:0]
(9)dct_tests_01.x_in[23:0]
(10)dct_tests_01.x_in[23:0]
(11)dct_tests_01.x_in[23:0]
(12)dct_tests_01.x_in[23:0]
(13)dct_tests_01.x_in[23:0]
(14)dct_tests_01.x_in[23:0]
(15)dct_tests_01.x_in[23:0]
(16)dct_tests_01.x_in[23:0]
(17)dct_tests_01.x_in[23:0]
(18)dct_tests_01.x_in[23:0]
(19)dct_tests_01.x_in[23:0]
(20)dct_tests_01.x_in[23:0]
(21)dct_tests_01.x_in[23:0]
(22)dct_tests_01.x_in[23:0]
(23)dct_tests_01.x_in[23:0]
@1401200
-group_end
@28
dct_tests_01.run_out_d
@22
dct_tests_01.phase_out[3:0]
dct_tests_01.x_ra[2:0]
@8022
dct_tests_01.x_out_w[23:0]
dct_tests_01.x_out[23:0]
@28
[color] 2
dct_tests_01.start
dct_tests_01.y_dv
dct_tests_01.y_pre_we
@22
dct_tests_01.y_ra[2:0]
dct_tests_01.y_wa[2:0]
@28
dct_tests_01.y_we
@22
dct_tests_01.phase_y[3:0]
dct_tests_01.y_dct[23:0]
dct_tests_01.y_out[23:0]
@1000200
-top
@800200
-dct_iv8_1d
@c08022
dct_tests_01.phase_out[3:0]
@28
(0)dct_tests_01.phase_out[3:0]
(1)dct_tests_01.phase_out[3:0]
(2)dct_tests_01.phase_out[3:0]
(3)dct_tests_01.phase_out[3:0]
@1401200
-group_end
@28
dct_tests_01.dct_iv8_1d_i.start
dct_tests_01.dct_iv8_1d_i.restart
dct_tests_01.dct_iv8_1d_i.clk
@8022
[color] 2
dct_tests_01.dct_iv8_1d_i.phase_cnt[3:0]
dct_tests_01.dct_iv8_1d_i.d_in[23:0]
dct_tests_01.dct_iv8_1d_i.dsp_ain_1[24:0]
@28
dct_tests_01.dct_iv8_1d_i.dsp_cea1_1
dct_tests_01.dct_iv8_1d_i.dsp_cea2_1
dct_tests_01.dct_iv8_1d_i.dsp_sela_1
dct_tests_01.dct_iv8_1d_i.dsp_sub_a_1
dct_tests_01.dct_iv8_1d_i.dsp_din_1_we
dct_tests_01.dct_iv8_1d_i.dsp_din_1_wa
dct_tests_01.dct_iv8_1d_i.dsp_din_1_ra
@22
dct_tests_01.dct_iv8_1d_i.dsp_din_1[24:0]
@28
dct_tests_01.dct_iv8_1d_i.dsp_ced_1
@22
dct_tests_01.dct_iv8_1d_i.dsp_cin_1[47:0]
@28
dct_tests_01.dct_iv8_1d_i.dsp_cec_1
dct_tests_01.dct_iv8_1d_i.dsp_neg_m_1
dct_tests_01.dct_iv8_1d_i.dsp_post_add_1
dct_tests_01.dct_iv8_1d_i.dsp_accum_1
@22
dct_tests_01.dct_iv8_1d_i.dsp_p_1[47:0]
@800200
-dsp_1
@22
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.ain[24:0]
@28
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.cea1
@22
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.a1_reg[24:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.a2_reg[24:0]
@28
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.sela
@22
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.a_wire[24:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.din[24:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.d_reg[24:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.ad_reg[24:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.bin[17:0]
@28
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.ceb1
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.ceb2
@22
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.b1_reg[17:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.b2_reg[17:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.a_wire[24:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.b_wire[17:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.m_wire[42:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.m_reg[47:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.m_reg_pm[47:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.p_reg_cond[47:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_1_i.p_reg[47:0]
@200
-
@1000200
-dsp_1
@22
dct_tests_01.dct_iv8_1d_i.dsp_p_2[47:0]
dct_tests_01.dct_iv8_1d_i.dout[23:0]
@28
dct_tests_01.dct_iv8_1d_i.dsp_accum_2
@22
dct_tests_01.dct_iv8_1d_i.dsp_ain_2[24:0]
dct_tests_01.dct_iv8_1d_i.dsp_bin[17:0]
@28
dct_tests_01.dct_iv8_1d_i.dsp_cea1_2
dct_tests_01.dct_iv8_1d_i.dsp_cea2_2
dct_tests_01.dct_iv8_1d_i.dsp_ceb1_1
dct_tests_01.dct_iv8_1d_i.dsp_ceb1_2
dct_tests_01.dct_iv8_1d_i.dsp_ceb2_1
dct_tests_01.dct_iv8_1d_i.dsp_ceb2_2
@22
dct_tests_01.dct_iv8_1d_i.dsp_ain_2[24:0]
dct_tests_01.dct_iv8_1d_i.dsp_p_1[47:0]
@28
dct_tests_01.dct_iv8_1d_i.dsp_din_2_we
@22
dct_tests_01.dct_iv8_1d_i.dsp_din_2_wa[1:0]
dct_tests_01.dct_iv8_1d_i.dsp_din_2_ra[1:0]
dct_tests_01.dct_iv8_1d_i.dsp_din_2[24:0]
@28
dct_tests_01.dct_iv8_1d_i.dsp_neg_m_2
dct_tests_01.dct_iv8_1d_i.dsp_sela_2
dct_tests_01.dct_iv8_1d_i.dsp_selb_1
dct_tests_01.dct_iv8_1d_i.dsp_selb_2
dct_tests_01.dct_iv8_1d_i.dsp_sub_a_2
@22
dct_tests_01.dct_iv8_1d_i.dsp_p_2[47:0]
@8022
[color] 2
dct_tests_01.dct_iv8_1d_i.phase_cnt[3:0]
@22
dct_tests_01.dct_iv8_1d_i.dout[23:0]
@800200
-dsp_2
@22
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_2_i.ain[24:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_2_i.a1_reg[24:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_2_i.a2_reg[24:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_2_i.din[24:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_2_i.d_reg[24:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_2_i.ad_reg[24:0]
dct_tests_01.dct_iv8_1d_i.dsp_ma_preadd_c_2_i.p_reg[47:0]
@200
-
@1000200
-dsp_2
@28
dct_tests_01.dct_iv8_1d_i.en
dct_tests_01.dct_iv8_1d_i.en_out
dct_tests_01.dct_iv8_1d_i.p00
dct_tests_01.dct_iv8_1d_i.p01
dct_tests_01.dct_iv8_1d_i.p02
dct_tests_01.dct_iv8_1d_i.p03
dct_tests_01.dct_iv8_1d_i.p04
dct_tests_01.dct_iv8_1d_i.p05
dct_tests_01.dct_iv8_1d_i.p06
dct_tests_01.dct_iv8_1d_i.p07
dct_tests_01.dct_iv8_1d_i.p08
dct_tests_01.dct_iv8_1d_i.p09
dct_tests_01.dct_iv8_1d_i.p10
dct_tests_01.dct_iv8_1d_i.p11
dct_tests_01.dct_iv8_1d_i.p12
dct_tests_01.dct_iv8_1d_i.p13
dct_tests_01.dct_iv8_1d_i.p14
dct_tests_01.dct_iv8_1d_i.p15
dct_tests_01.dct_iv8_1d_i.pre2_start_out
dct_tests_01.dct_iv8_1d_i.rst
dct_tests_01.dct_iv8_1d_i.run_in
dct_tests_01.dct_iv8_1d_i.run_out
@1000200
-dct_iv8_1d
[pattern_trace] 1
[pattern_trace] 0
File added
...@@ -49,17 +49,17 @@ module dct_iv8_1d#( ...@@ -49,17 +49,17 @@ module dct_iv8_1d#(
parameter A_WIDTH = 25, parameter A_WIDTH = 25,
parameter P_WIDTH = 48, parameter P_WIDTH = 48,
parameter COSINE_SHIFT= 17, parameter COSINE_SHIFT= 17,
parameter COS_01_32 = 130441, // (1<<17) * cos( 1*pi/32) parameter COS_01_32 = 130441, // int(round((1<<17) * cos( 1*pi/32)))
parameter COS_03_32 = 125428, // (1<<17) * cos( 3*pi/32) parameter COS_03_32 = 125428, // int(round((1<<17) * cos( 3*pi/32)))
parameter COS_04_32 = 121095, // (1<<17) * cos( 4*pi/32) parameter COS_04_32 = 121095, // int(round((1<<17) * cos( 4*pi/32)))
parameter COS_05_32 = 115595, // (1<<17) * cos( 5*pi/32) parameter COS_05_32 = 115595, // int(round((1<<17) * cos( 5*pi/32)))
parameter COS_07_32 = 101320, // (1<<17) * cos( 7*pi/32) parameter COS_07_32 = 101320, // int(round((1<<17) * cos( 7*pi/32)))
parameter COS_08_32 = 92682, // (1<<17) * cos( 8*pi/32) parameter COS_08_32 = 92682, // int(round((1<<17) * cos( 8*pi/32)))
parameter COS_09_32 = 83151, // (1<<17) * cos( 9*pi/32) parameter COS_09_32 = 83151, // int(round((1<<17) * cos( 9*pi/32)))
parameter COS_11_32 = 61787, // (1<<17) * cos(11*pi/32) parameter COS_11_32 = 61787, // int(round((1<<17) * cos(11*pi/32)))
parameter COS_12_32 = 50159, // (1<<17) * cos(12*pi/32) parameter COS_12_32 = 50159, // int(round((1<<17) * cos(12*pi/32)))
parameter COS_13_32 = 38048, // (1<<17) * cos(13*pi/32) parameter COS_13_32 = 38048, // int(round((1<<17) * cos(13*pi/32)))
parameter COS_15_32 = 12847 // (1<<17) * cos(15*pi/32) parameter COS_15_32 = 12847 // int(round((1<<17) * cos(15*pi/32)))
)( )(
......
This diff is collapsed.
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment