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Commit b65dd54c authored by Andrey Filippov's avatar Andrey Filippov
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replaced single x393.bit with x393_parallel.bit and x393_hispi.bit

parent 96092048
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Showing with 43 additions and 14 deletions
.project
View file @ b65dd54c
...@@ -62,52 +62,52 @@ ...@@ -62,52 +62,52 @@
<link> <link>
<name>vivado_logs/VivadoBitstream.log</name> <name>vivado_logs/VivadoBitstream.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20160508121344091.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20160512172954764.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoOpt.log</name> <name>vivado_logs/VivadoOpt.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoOpt-20160508121344091.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoOpt-20160512122847249.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoOptPhys.log</name> <name>vivado_logs/VivadoOptPhys.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoOptPhys-20160508121344091.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoOptPhys-20160512122847249.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoOptPower.log</name> <name>vivado_logs/VivadoOptPower.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoOptPower-20160508121344091.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoOptPower-20160512122847249.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoPlace.log</name> <name>vivado_logs/VivadoPlace.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoPlace-20160508121344091.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoPlace-20160512122847249.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoRoute.log</name> <name>vivado_logs/VivadoRoute.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoRoute-20160508121344091.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoRoute-20160512122847249.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoSynthesis.log</name> <name>vivado_logs/VivadoSynthesis.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20160508120724364.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20160512120153045.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name> <name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20160508121344091.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20160512122847249.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoTimimgSummaryReportSynthesis.log</name> <name>vivado_logs/VivadoTimimgSummaryReportSynthesis.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportSynthesis-20160508120724364.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportSynthesis-20160512120153045.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoTimingReportSynthesis.log</name> <name>vivado_logs/VivadoTimingReportSynthesis.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportSynthesis-20160508120724364.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportSynthesis-20160512120153045.log</location>
</link> </link>
<link> <link>
<name>vivado_state/x393-opt-phys.dcp</name> <name>vivado_state/x393-opt-phys.dcp</name>
...@@ -127,7 +127,7 @@ ...@@ -127,7 +127,7 @@
<link> <link>
<name>vivado_state/x393-synth.dcp</name> <name>vivado_state/x393-synth.dcp</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_state/x393-synth-20160508120724364.dcp</location> <location>/home/andrey/git/x393/vivado_state/x393-synth-20160512120153045.dcp</location>
</link> </link>
</linkedResources> </linkedResources>
</projectDescription> </projectDescription>
.settings/com.elphel.vdt.VivadoBitstream.prefs
View file @ b65dd54c
...@@ -3,5 +3,6 @@ VivadoBitstream_105_force=true ...@@ -3,5 +3,6 @@ VivadoBitstream_105_force=true
VivadoBitstream_122_PreBitstreamTCL=set_property "BITSTREAM.STARTUP.MATCH_CYCLE" NoWait [current_design]<-@\#\#@-> VivadoBitstream_122_PreBitstreamTCL=set_property "BITSTREAM.STARTUP.MATCH_CYCLE" NoWait [current_design]<-@\#\#@->
VivadoBitstream_123_PreBitstreamTCL=set_property "BITSTREAM.STARTUP.MATCH_CYCLE" NoWait [current_design]<-@\#\#@-> VivadoBitstream_123_PreBitstreamTCL=set_property "BITSTREAM.STARTUP.MATCH_CYCLE" NoWait [current_design]<-@\#\#@->
VivadoBitstream_124_force=true VivadoBitstream_124_force=true
com.elphel.store.context.VivadoBitstream=VivadoBitstream_105_force<-@\#\#@->VivadoBitstream_103_PreBitstreamTCL<-@\#\#@->VivadoBitstream_124_force<-@\#\#@->VivadoBitstream_122_PreBitstreamTCL<-@\#\#@->VivadoBitstream_123_PreBitstreamTCL<-@\#\#@-> VivadoBitstream_124_rawfile=x393_hispi
com.elphel.store.context.VivadoBitstream=VivadoBitstream_105_force<-@\#\#@->VivadoBitstream_103_PreBitstreamTCL<-@\#\#@->VivadoBitstream_124_force<-@\#\#@->VivadoBitstream_122_PreBitstreamTCL<-@\#\#@->VivadoBitstream_123_PreBitstreamTCL<-@\#\#@->VivadoBitstream_124_rawfile<-@\#\#@->
eclipse.preferences.version=1 eclipse.preferences.version=1
fpga_version.vh
View file @ b65dd54c
...@@ -32,7 +32,8 @@ ...@@ -32,7 +32,8 @@
* with at least one of the Free Software programs. * with at least one of the Free Software programs.
*******************************************************************************/ *******************************************************************************/
parameter FPGA_VERSION = 32'h03930089; // Auto-synchronizing io2c sequencers with the command ones parameter FPGA_VERSION = 32'h0393008a; // HiSPI sensor (14 MPix)
// parameter FPGA_VERSION = 32'h03930089; // Auto-synchronizing i2c sequencers with the command ones
// parameter FPGA_VERSION = 32'h03930088; // Fixing circbuf rollover pointers bug (only one path violated) // parameter FPGA_VERSION = 32'h03930088; // Fixing circbuf rollover pointers bug (only one path violated)
// parameter FPGA_VERSION = 32'h03930087; // Fixed default 90% quantization table // parameter FPGA_VERSION = 32'h03930087; // Fixed default 90% quantization table
// parameter FPGA_VERSION = 32'h03930087; // Synchronizing i2c sequencer frame number with that of a command sequencer // parameter FPGA_VERSION = 32'h03930087; // Synchronizing i2c sequencer frame number with that of a command sequencer
......
py393/x393_jpeg.py
View file @ b65dd54c
...@@ -1072,13 +1072,40 @@ write_sensor_i2c 0 1 0 0x306e9280 ...@@ -1072,13 +1072,40 @@ write_sensor_i2c 0 1 0 0x306e9280
#write_sensor_i2c 0 1 0 0x30700002 #write_sensor_i2c 0 1 0 0x30700002
write_sensor_i2c 0 1 0 0x301a001c write_sensor_i2c 0 1 0 0x301a001c
print_sensor_i2c 0 0x31c6 0xff 0x10 0 print_sensor_i2c 0 0x31c6 0xff 0x10 0
#default gain = 0xa, set red and blue (outdoors)
write_sensor_i2c 0 1 0 0x3028000a
write_sensor_i2c 0 1 0 0x302c000d
write_sensor_i2c 0 1 0 0x302e0010
#outdoor sunny exposure
write_sensor_i2c 0 1 0 0x30120060
compressor_control 0 2 compressor_control 0 2
jpeg_write "img.jpeg" 0 jpeg_write "img.jpeg" 0
jpeg_acquire_write jpeg_acquire_write
write_sensor_i2c 0 1 0 0x30700000 write_sensor_i2c 0 1 0 0x30700000
#default gain = 0xa, set red and blue (indoors)
write_sensor_i2c 0 1 0 0x3028000a
write_sensor_i2c 0 1 0 0x302c000b
write_sensor_i2c 0 1 0 0x302e0010
#Exposure 0x800 lines
write_sensor_i2c 0 1 0 0x30120800
------- -------
setup_all_sensors True None 0xf setup_all_sensors True None 0xf
write_sensor_i2c 0 1 0 0x30700101 write_sensor_i2c 0 1 0 0x30700101
compressor_control all None None None None None 2 compressor_control all None None None None None 2
......
system_defines.vh
View file @ b65dd54c
...@@ -48,7 +48,7 @@ ...@@ -48,7 +48,7 @@
`define PRELOAD_BRAMS `define PRELOAD_BRAMS
`define DISPLAY_COMPRESSED_DATA `define DISPLAY_COMPRESSED_DATA
// if HISPI is not defined, parallel sensor interface is used for all channels // if HISPI is not defined, parallel sensor interface is used for all channels
// `define HISPI `define HISPI
// `define USE_OLD_XDCT393 // `define USE_OLD_XDCT393
// `define USE_PCLK2X // `define USE_PCLK2X
// `define USE_XCLK2X // `define USE_XCLK2X
......
x393_hispi.bit 0 → 100644
View file @ b65dd54c
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