Commit ae1f1eb4 authored by Andrey Filippov's avatar Andrey Filippov
Browse files

updates awsize/arsize after Xilinx fixed corresponding ports width in PS7.v

parent 4340db45

simulation_modules/simul_axi_master_rdaddr.v

+4 −4
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ module simul_axi_master_rdaddr 
    input  [ID_WIDTH-1:0]      arid_in,

    input  [ADDRESS_WIDTH-1:0] araddr_in,

    input  [3:0]               arlen_in,

    input  [2:0]               arsize_in,

    input  [1:0]               arsize_in,

    input  [1:0]               arburst_in,

    input  [3:0]               arcache_in,

    input  [2:0]               arprot_in,
@@ -58,7 +58,7 @@ module simul_axi_master_rdaddr 
    output [ID_WIDTH-1:0]      arid,

    output [ADDRESS_WIDTH-1:0] araddr,

    output [3:0]               arlen,

    output [2:0]               arsize,

    output [1:0]               arsize,

    output [1:0]               arburst,

    output [3:0]               arcache,

    output [2:0]               arprot,
@@ -71,7 +71,7 @@ module simul_axi_master_rdaddr 
    wire [ID_WIDTH-1:0]      arid_out;

    wire [ADDRESS_WIDTH-1:0] araddr_out;

    wire [3:0]               arlen_out;

    wire [2:0]               arsize_out;

    wire [1:0]               arsize_out;

    wire [1:0]               arburst_out;

    wire [3:0]               arcache_out;

    wire [2:0]               arprot_out;
@@ -88,7 +88,7 @@ module simul_axi_master_rdaddr 


simul_axi_fifo

    #(

      .WIDTH(ID_WIDTH+ADDRESS_WIDTH+16),     // total number of output bits

      .WIDTH(ID_WIDTH+ADDRESS_WIDTH+15),     // total number of output bits

      .LATENCY(LATENCY),                     // minimal delay between inout and output ( 0 - next cycle)

      .DEPTH(DEPTH)                          // maximal number of commands in FIFO

//  parameter OUT_DELAY = 3.5,

simulation_modules/simul_axi_master_wraddr.v

+4 −4
Original line number Diff line number Diff line
@@ -47,7 +47,7 @@ module simul_axi_master_wraddr 
    input  [ID_WIDTH-1:0]      awid_in,

    input  [ADDRESS_WIDTH-1:0] awaddr_in,

    input  [3:0]               awlen_in,

    input  [2:0]               awsize_in,

    input  [1:0]               awsize_in,

    input  [1:0]               awburst_in,

    input  [3:0]               awcache_in,

    input  [2:0]               awprot_in,
@@ -55,7 +55,7 @@ module simul_axi_master_wraddr 
    output [ID_WIDTH-1:0]      awid,

    output [ADDRESS_WIDTH-1:0] awaddr,

    output [3:0]               awlen,

    output [2:0]               awsize,

    output [1:0]               awsize,

    output [1:0]               awburst,

    output [3:0]               awcache,

    output [2:0]               awprot,
@@ -68,7 +68,7 @@ module simul_axi_master_wraddr 
    wire [ID_WIDTH-1:0]      awid_out;

    wire [ADDRESS_WIDTH-1:0] awaddr_out;

    wire [3:0]               awlen_out;

    wire [2:0]               awsize_out;

    wire [1:0]               awsize_out;

    wire [1:0]               awburst_out;

    wire [3:0]               awcache_out;

    wire [2:0]               awprot_out;
@@ -85,7 +85,7 @@ module simul_axi_master_wraddr 


simul_axi_fifo

    #(

      .WIDTH(ID_WIDTH+ADDRESS_WIDTH+16),     // total number of output bits

      .WIDTH(ID_WIDTH+ADDRESS_WIDTH+15),     // total number of output bits

      .LATENCY(LATENCY),                     // minimal delay between inout and output ( 0 - next cycle)

      .DEPTH(DEPTH)                          // maximal number of commands in FIFO

//  parameter OUT_DELAY = 3.5,

x393_testbench01.tf

+10 −10
Original line number Diff line number Diff line
@@ -245,12 +245,12 @@ assign #10 gpio_pins[9] = gpio_pins[8]; 
    reg [11:0] ARID_IN_r;

    reg [31:0] ARADDR_IN_r;

    reg  [3:0] ARLEN_IN_r;

    reg  [2:0] ARSIZE_IN_r;

    reg  [1:0] ARSIZE_IN_r;

    reg  [1:0] ARBURST_IN_r;

    reg [11:0] AWID_IN_r;

    reg [31:0] AWADDR_IN_r;

    reg  [3:0] AWLEN_IN_r;

    reg  [2:0] AWSIZE_IN_r;

    reg  [1:0] AWSIZE_IN_r;

    reg  [1:0] AWBURST_IN_r;



    reg [11:0] WID_IN_r;
@@ -289,12 +289,12 @@ assign #10 gpio_pins[9] = gpio_pins[8]; 
    wire [11:0]  #(AXI_TASK_HOLD) ARID_IN = ARID_IN_r;

    wire [31:0]  #(AXI_TASK_HOLD) ARADDR_IN = ARADDR_IN_r;

    wire  [3:0]  #(AXI_TASK_HOLD) ARLEN_IN = ARLEN_IN_r;

    wire  [2:0]  #(AXI_TASK_HOLD) ARSIZE_IN = ARSIZE_IN_r;

    wire  [1:0]  #(AXI_TASK_HOLD) ARSIZE_IN = ARSIZE_IN_r;

    wire  [1:0]  #(AXI_TASK_HOLD) ARBURST_IN = ARBURST_IN_r;

    wire [11:0]  #(AXI_TASK_HOLD) AWID_IN = AWID_IN_r;

    wire [31:0]  #(AXI_TASK_HOLD) AWADDR_IN = AWADDR_IN_r;

    wire  [3:0]  #(AXI_TASK_HOLD) AWLEN_IN = AWLEN_IN_r;

    wire  [2:0]  #(AXI_TASK_HOLD) AWSIZE_IN = AWSIZE_IN_r;

    wire  [1:0]  #(AXI_TASK_HOLD) AWSIZE_IN = AWSIZE_IN_r;

    wire  [1:0]  #(AXI_TASK_HOLD) AWBURST_IN = AWBURST_IN_r;

    wire [11:0]  #(AXI_TASK_HOLD) WID_IN = WID_IN_r;

    wire [31:0]  #(AXI_TASK_HOLD) WDATA_IN = WDATA_IN_r;
@@ -311,7 +311,7 @@ assign #10 gpio_pins[9] = gpio_pins[8]; 
    wire [11:0] arid;

    wire [31:0] araddr;

    wire [3:0]  arlen;

    wire [2:0]  arsize;

    wire [1:0]  arsize;

    wire [1:0]  arburst;

  // SuppressWarnings VEditor : assigned in $readmem(14) system task

    wire [3:0]  arcache;
@@ -323,7 +323,7 @@ assign #10 gpio_pins[9] = gpio_pins[8]; 
    wire [11:0] awid;

    wire [31:0] awaddr;

    wire [3:0]  awlen;

    wire [2:0]  awsize;

    wire [1:0]  awsize;

    wire [1:0]  awburst;

  // SuppressWarnings VEditor : assigned in $readmem() system task

    wire [3:0]  awcache;
@@ -1230,14 +1230,14 @@ simul_axi_master_rdaddr 
    .arid_in(ARID_IN[11:0]),

    .araddr_in(ARADDR_IN[31:0]),

    .arlen_in(ARLEN_IN[3:0]),

    .arsize_in(ARSIZE_IN[2:0]),

    .arsize_in(ARSIZE_IN[1:0]),

    .arburst_in(ARBURST_IN[1:0]),

    .arcache_in(4'b0),

    .arprot_in(3'b0), //     .arprot_in(2'b0),

    .arid(arid[11:0]),

    .araddr(araddr[31:0]),

    .arlen(arlen[3:0]),

    .arsize(arsize[2:0]),

    .arsize(arsize[1:0]),

    .arburst(arburst[1:0]),

    .arcache(arcache[3:0]),

    .arprot(arprot[2:0]),
@@ -1261,14 +1261,14 @@ simul_axi_master_wraddr 
    .awid_in(AWID_IN[11:0]),

    .awaddr_in(AWADDR_IN[31:0]),

    .awlen_in(AWLEN_IN[3:0]),

    .awsize_in(AWSIZE_IN[2:0]),

    .awsize_in(AWSIZE_IN),

    .awburst_in(AWBURST_IN[1:0]),

    .awcache_in(4'b0),

    .awprot_in(3'b0), //.awprot_in(2'b0),

    .awid(awid[11:0]),

    .awaddr(awaddr[31:0]),

    .awlen(awlen[3:0]),

    .awsize(awsize[2:0]),

    .awsize(awsize),

    .awburst(awburst[1:0]),

    .awcache(awcache[3:0]),

    .awprot(awprot[2:0]),

x393_testbench02.tf

+10 −10
Original line number Diff line number Diff line
@@ -463,12 +463,12 @@ assign #10 gpio_pins[9] = gpio_pins[8]; 
    reg [11:0] ARID_IN_r;

    reg [31:0] ARADDR_IN_r;

    reg  [3:0] ARLEN_IN_r;

    reg  [2:0] ARSIZE_IN_r;

    reg  [1:0] ARSIZE_IN_r;

    reg  [1:0] ARBURST_IN_r;

    reg [11:0] AWID_IN_r;

    reg [31:0] AWADDR_IN_r;

    reg  [3:0] AWLEN_IN_r;

    reg  [2:0] AWSIZE_IN_r;

    reg  [1:0] AWSIZE_IN_r;

    reg  [1:0] AWBURST_IN_r;



    reg [11:0] WID_IN_r;
@@ -507,12 +507,12 @@ assign #10 gpio_pins[9] = gpio_pins[8]; 
    wire [11:0]  #(AXI_TASK_HOLD) ARID_IN = ARID_IN_r;

    wire [31:0]  #(AXI_TASK_HOLD) ARADDR_IN = ARADDR_IN_r;

    wire  [3:0]  #(AXI_TASK_HOLD) ARLEN_IN = ARLEN_IN_r;

    wire  [2:0]  #(AXI_TASK_HOLD) ARSIZE_IN = ARSIZE_IN_r;

    wire  [1:0]  #(AXI_TASK_HOLD) ARSIZE_IN = ARSIZE_IN_r;

    wire  [1:0]  #(AXI_TASK_HOLD) ARBURST_IN = ARBURST_IN_r;

    wire [11:0]  #(AXI_TASK_HOLD) AWID_IN = AWID_IN_r;

    wire [31:0]  #(AXI_TASK_HOLD) AWADDR_IN = AWADDR_IN_r;

    wire  [3:0]  #(AXI_TASK_HOLD) AWLEN_IN = AWLEN_IN_r;

    wire  [2:0]  #(AXI_TASK_HOLD) AWSIZE_IN = AWSIZE_IN_r;

    wire  [1:0]  #(AXI_TASK_HOLD) AWSIZE_IN = AWSIZE_IN_r;

    wire  [1:0]  #(AXI_TASK_HOLD) AWBURST_IN = AWBURST_IN_r;

    wire [11:0]  #(AXI_TASK_HOLD) WID_IN = WID_IN_r;

    wire [31:0]  #(AXI_TASK_HOLD) WDATA_IN = WDATA_IN_r;
@@ -529,7 +529,7 @@ assign #10 gpio_pins[9] = gpio_pins[8]; 
    wire [11:0] arid;

    wire [31:0] araddr;

    wire [3:0]  arlen;

    wire [2:0]  arsize;

    wire [1:0]  arsize;

    wire [1:0]  arburst;

  // SuppressWarnings VEditor : assigned in $readmem(14) system task

    wire [3:0]  arcache;
@@ -541,7 +541,7 @@ assign #10 gpio_pins[9] = gpio_pins[8]; 
    wire [11:0] awid;

    wire [31:0] awaddr;

    wire [3:0]  awlen;

    wire [2:0]  awsize;

    wire [1:0]  awsize;

    wire [1:0]  awburst;

  // SuppressWarnings VEditor : assigned in $readmem() system task

    wire [3:0]  awcache;
@@ -1695,14 +1695,14 @@ simul_axi_master_rdaddr 
    .arid_in(ARID_IN[11:0]),

    .araddr_in(ARADDR_IN[31:0]),

    .arlen_in(ARLEN_IN[3:0]),

    .arsize_in(ARSIZE_IN[2:0]),

    .arsize_in(ARSIZE_IN[1:0]),

    .arburst_in(ARBURST_IN[1:0]),

    .arcache_in(4'b0),

    .arprot_in(3'b0), //     .arprot_in(2'b0),

    .arid(arid[11:0]),

    .araddr(araddr[31:0]),

    .arlen(arlen[3:0]),

    .arsize(arsize[2:0]),

    .arsize(arsize[1:0]),

    .arburst(arburst[1:0]),

    .arcache(arcache[3:0]),

    .arprot(arprot[2:0]),
@@ -1726,14 +1726,14 @@ simul_axi_master_wraddr 
    .awid_in(AWID_IN[11:0]),

    .awaddr_in(AWADDR_IN[31:0]),

    .awlen_in(AWLEN_IN[3:0]),

    .awsize_in(AWSIZE_IN[2:0]),

    .awsize_in(AWSIZE_IN[1:0]),

    .awburst_in(AWBURST_IN[1:0]),

    .awcache_in(4'b0),

    .awprot_in(3'b0), //.awprot_in(2'b0),

    .awid(awid[11:0]),

    .awaddr(awaddr[31:0]),

    .awlen(awlen[3:0]),

    .awsize(awsize[2:0]),

    .awsize(awsize[1:0]),

    .awburst(awburst[1:0]),

    .awcache(awcache[3:0]),

    .awprot(awprot[2:0]),

x393_testbench03.tf

+8 −8
Original line number Diff line number Diff line
@@ -585,12 +585,12 @@ assign #10 gpio_pins[9] = gpio_pins[8]; 
    reg [11:0] ARID_IN_r;

    reg [31:0] ARADDR_IN_r;

    reg  [3:0] ARLEN_IN_r;

    reg  [2:0] ARSIZE_IN_r;

    reg  [1:0] ARSIZE_IN_r;

    reg  [1:0] ARBURST_IN_r;

    reg [11:0] AWID_IN_r;

    reg [31:0] AWADDR_IN_r;

    reg  [3:0] AWLEN_IN_r;

    reg  [2:0] AWSIZE_IN_r;

    reg  [1:0] AWSIZE_IN_r;

    reg  [1:0] AWBURST_IN_r;



    reg [11:0] WID_IN_r;
@@ -629,12 +629,12 @@ assign #10 gpio_pins[9] = gpio_pins[8]; 
    wire [11:0]  #(AXI_TASK_HOLD) ARID_IN = ARID_IN_r;

    wire [31:0]  #(AXI_TASK_HOLD) ARADDR_IN = ARADDR_IN_r;

    wire  [3:0]  #(AXI_TASK_HOLD) ARLEN_IN = ARLEN_IN_r;

    wire  [2:0]  #(AXI_TASK_HOLD) ARSIZE_IN = ARSIZE_IN_r;

    wire  [1:0]  #(AXI_TASK_HOLD) ARSIZE_IN = ARSIZE_IN_r;

    wire  [1:0]  #(AXI_TASK_HOLD) ARBURST_IN = ARBURST_IN_r;

    wire [11:0]  #(AXI_TASK_HOLD) AWID_IN = AWID_IN_r;

    wire [31:0]  #(AXI_TASK_HOLD) AWADDR_IN = AWADDR_IN_r;

    wire  [3:0]  #(AXI_TASK_HOLD) AWLEN_IN = AWLEN_IN_r;

    wire  [2:0]  #(AXI_TASK_HOLD) AWSIZE_IN = AWSIZE_IN_r;

    wire  [1:0]  #(AXI_TASK_HOLD) AWSIZE_IN = AWSIZE_IN_r;

    wire  [1:0]  #(AXI_TASK_HOLD) AWBURST_IN = AWBURST_IN_r;

    wire [11:0]  #(AXI_TASK_HOLD) WID_IN = WID_IN_r;

    wire [31:0]  #(AXI_TASK_HOLD) WDATA_IN = WDATA_IN_r;
@@ -651,7 +651,7 @@ assign #10 gpio_pins[9] = gpio_pins[8]; 
    wire [11:0] arid;

    wire [31:0] araddr;

    wire [3:0]  arlen;

    wire [2:0]  arsize;

    wire [1:0]  arsize;

    wire [1:0]  arburst;

  // SuppressWarnings VEditor : assigned in $readmem(14) system task

    wire [3:0]  arcache;
@@ -663,7 +663,7 @@ assign #10 gpio_pins[9] = gpio_pins[8]; 
    wire [11:0] awid;

    wire [31:0] awaddr;

    wire [3:0]  awlen;

    wire [2:0]  awsize;

    wire [1:0]  awsize;

    wire [1:0]  awburst;

  // SuppressWarnings VEditor : assigned in $readmem() system task

    wire [3:0]  awcache;
@@ -1883,14 +1883,14 @@ simul_axi_master_wraddr 
    .awid_in(AWID_IN[11:0]),

    .awaddr_in(AWADDR_IN[31:0]),

    .awlen_in(AWLEN_IN[3:0]),

    .awsize_in(AWSIZE_IN[2:0]),

    .awsize_in(AWSIZE_IN[1:0]),

    .awburst_in(AWBURST_IN[1:0]),

    .awcache_in(4'b0),

    .awprot_in(3'b0), //.awprot_in(2'b0),

    .awid(awid[11:0]),

    .awaddr(awaddr[31:0]),

    .awlen(awlen[3:0]),

    .awsize(awsize[2:0]),

    .awsize(awsize[1:0]),

    .awburst(awburst[1:0]),

    .awcache(awcache[3:0]),

    .awprot(awprot[2:0]),