separated camsync.en bit, bade a separate set fro this bit (aafb3b7a) · Commits · Elphel / x393

includes/x393_parameters.vh

+6 −6

Original line number	Original line	Diff line number	Diff line
	@@ -775,12 +775,12 @@
	parameter CAMSYNC_TRIG_DELAY2 = 'h6, // setup input trigger delay		parameter CAMSYNC_TRIG_DELAY2 = 'h6, // setup input trigger delay
	parameter CAMSYNC_TRIG_DELAY3 = 'h7, // setup input trigger delay		parameter CAMSYNC_TRIG_DELAY3 = 'h7, // setup input trigger delay

	parameter CAMSYNC_EN_BIT = 'h0, // enable module (0 - reset)		parameter CAMSYNC_EN_BIT = 'h1, // enable module (0 - reset)
	parameter CAMSYNC_SNDEN_BIT = 'h2, // enable writing ts_snd_en		parameter CAMSYNC_SNDEN_BIT = 'h3, // enable writing ts_snd_en
	parameter CAMSYNC_EXTERNAL_BIT = 'h4, // enable writing ts_external (0 - local timestamp in the frame header)		parameter CAMSYNC_EXTERNAL_BIT = 'h5, // enable writing ts_external (0 - local timestamp in the frame header)
	parameter CAMSYNC_TRIGGERED_BIT = 'h6, // triggered mode ( 0- async)		parameter CAMSYNC_TRIGGERED_BIT = 'h7, // triggered mode ( 0- async)
	parameter CAMSYNC_MASTER_BIT = 'h9, // select a 2-bit master channel (master delay may be used as a flash delay)		parameter CAMSYNC_MASTER_BIT = 'ha, // select a 2-bit master channel (master delay may be used as a flash delay)
	parameter CAMSYNC_CHN_EN_BIT = 'he, // per-channel enable timestamp generation		parameter CAMSYNC_CHN_EN_BIT = 'hf, // per-channel enable timestamp generation
	parameter CAMSYNC_PRE_MAGIC = 6'b110100,		parameter CAMSYNC_PRE_MAGIC = 6'b110100,
	parameter CAMSYNC_POST_MAGIC = 6'b001101,		parameter CAMSYNC_POST_MAGIC = 6'b001101,

py393/x393_camsync.py

+5 −3

Original line number	Original line	Diff line number	Diff line
	@@ -64,7 +64,7 @@ class X393Camsync(object):
	except:		except:
	pass		pass
	def set_camsync_mode (self,		def set_camsync_mode (self,
	en = True,		en = None,
	en_snd = None,		en_snd = None,
	en_ts_external = None,		en_ts_external = None,
	triggered_mode = None,		triggered_mode = None,
	@@ -81,8 +81,10 @@ class X393Camsync(object):
	@param chn_en - bitmask of enabled channels		@param chn_en - bitmask of enabled channels
	"""		"""
	data = 0		data = 0
	if en:		if not en is None:
	data \|= 1 << vrlg.CAMSYNC_EN_BIT		data \|= (2,3)[en] << (vrlg.CAMSYNC_EN_BIT - 1)
			# if en:
			# data \|= 1 << vrlg.CAMSYNC_EN_BIT
	if not en_snd is None:		if not en_snd is None:
	data \|= (2,3)[en_snd] << (vrlg.CAMSYNC_SNDEN_BIT - 1)		data \|= (2,3)[en_snd] << (vrlg.CAMSYNC_SNDEN_BIT - 1)
	if not en_ts_external is None:		if not en_ts_external is None:

py393/x393_export_c.py

+2 −1

Original line number	Original line	Diff line number	Diff line
	@@ -2378,7 +2378,8 @@ class X393ExportC(object):
	return dw		return dw
	def _enc_camsync_mode(self):		def _enc_camsync_mode(self):
	dw=[]		dw=[]
	dw.append(("en", vrlg.CAMSYNC_EN_BIT, 1, 1, "Enable CAMSYNC module"))		dw.append(("en", vrlg.CAMSYNC_EN_BIT-1, 1, 1, "Enable CAMSYNC module"))
			dw.append(("en_set", vrlg.CAMSYNC_EN_BIT, 1, 1, "Set 'en' bit"))
	dw.append(("en_snd", vrlg.CAMSYNC_SNDEN_BIT-1, 1, 1, "Enable sending timestamps (valid with 'en_snd_set')"))		dw.append(("en_snd", vrlg.CAMSYNC_SNDEN_BIT-1, 1, 1, "Enable sending timestamps (valid with 'en_snd_set')"))
	dw.append(("en_snd_set", vrlg.CAMSYNC_SNDEN_BIT, 1, 0, "Set 'en_snd'"))		dw.append(("en_snd_set", vrlg.CAMSYNC_SNDEN_BIT, 1, 0, "Set 'en_snd'"))
	dw.append(("ext", vrlg.CAMSYNC_EXTERNAL_BIT - 1, 1, 1, "Use external (received) timestamps, if available. O - use local timestamps"))		dw.append(("ext", vrlg.CAMSYNC_EXTERNAL_BIT - 1, 1, 1, "Use external (received) timestamps, if available. O - use local timestamps"))

timing/camsync393.v

+7 −8

Original line number	Original line	Diff line number	Diff line
	@@ -59,13 +59,12 @@ module camsync393 #(
	parameter CAMSYNC_TRIG_DELAY2 = 'h6, // setup input trigger delay		parameter CAMSYNC_TRIG_DELAY2 = 'h6, // setup input trigger delay
	parameter CAMSYNC_TRIG_DELAY3 = 'h7, // setup input trigger delay		parameter CAMSYNC_TRIG_DELAY3 = 'h7, // setup input trigger delay

	parameter CAMSYNC_EN_BIT = 'h0, // enable module (0 - reset)		parameter CAMSYNC_EN_BIT = 'h1, // enable module (0 - reset)
	parameter CAMSYNC_SNDEN_BIT = 'h2, // enable writing ts_snd_en		parameter CAMSYNC_SNDEN_BIT = 'h3, // enable writing ts_snd_en
	parameter CAMSYNC_EXTERNAL_BIT = 'h4, // enable writing ts_external (0 - local timestamp in the frame header)		parameter CAMSYNC_EXTERNAL_BIT = 'h5, // enable writing ts_external (0 - local timestamp in the frame header)
	parameter CAMSYNC_TRIGGERED_BIT = 'h6, // triggered mode ( 0- async)		parameter CAMSYNC_TRIGGERED_BIT = 'h7, // triggered mode ( 0- async)
	parameter CAMSYNC_MASTER_BIT = 'h9, // select a 2-bit master channel (master delay may be used as a flash delay)		parameter CAMSYNC_MASTER_BIT = 'ha, // select a 2-bit master channel (master delay may be used as a flash delay)
	parameter CAMSYNC_CHN_EN_BIT = 'he, // per-channel enable timestamp generation		parameter CAMSYNC_CHN_EN_BIT = 'hf, // per-channel enable timestamp generation


	parameter CAMSYNC_PRE_MAGIC = 6'b110100,		parameter CAMSYNC_PRE_MAGIC = 6'b110100,
	parameter CAMSYNC_POST_MAGIC = 6'b001101		parameter CAMSYNC_POST_MAGIC = 6'b001101
	@@ -375,7 +374,7 @@ module camsync393 #(

	always @(posedge mclk) begin		always @(posedge mclk) begin
	if (set_mode_reg_w) begin		if (set_mode_reg_w) begin
	en <= cmd_data[CAMSYNC_EN_BIT];		if (cmd_data[CAMSYNC_EN_BIT]) ts_snd_en <= cmd_data[CAMSYNC_EN_BIT - 1];
	if (cmd_data[CAMSYNC_SNDEN_BIT]) ts_snd_en <= cmd_data[CAMSYNC_SNDEN_BIT - 1];		if (cmd_data[CAMSYNC_SNDEN_BIT]) ts_snd_en <= cmd_data[CAMSYNC_SNDEN_BIT - 1];
	if (cmd_data[CAMSYNC_EXTERNAL_BIT]) ts_external <= cmd_data[CAMSYNC_EXTERNAL_BIT - 1];		if (cmd_data[CAMSYNC_EXTERNAL_BIT]) ts_external <= cmd_data[CAMSYNC_EXTERNAL_BIT - 1];
	if (cmd_data[CAMSYNC_TRIGGERED_BIT]) triggered_mode_r <= cmd_data[CAMSYNC_TRIGGERED_BIT - 1];		if (cmd_data[CAMSYNC_TRIGGERED_BIT]) triggered_mode_r <= cmd_data[CAMSYNC_TRIGGERED_BIT - 1];

timing/timing393.v

+6 −6

Original line number	Original line	Diff line number	Diff line
	@@ -53,12 +53,12 @@ module timing393 #(
	parameter CAMSYNC_TRIG_DELAY1 = 'h5, // setup input trigger delay		parameter CAMSYNC_TRIG_DELAY1 = 'h5, // setup input trigger delay
	parameter CAMSYNC_TRIG_DELAY2 = 'h6, // setup input trigger delay		parameter CAMSYNC_TRIG_DELAY2 = 'h6, // setup input trigger delay
	parameter CAMSYNC_TRIG_DELAY3 = 'h7, // setup input trigger delay		parameter CAMSYNC_TRIG_DELAY3 = 'h7, // setup input trigger delay
	parameter CAMSYNC_EN_BIT = 'h0, // enable module (0 - reset)		parameter CAMSYNC_EN_BIT = 'h1, // enable module (0 - reset)
	parameter CAMSYNC_SNDEN_BIT = 'h2, // enable writing ts_snd_en		parameter CAMSYNC_SNDEN_BIT = 'h3, // enable writing ts_snd_en
	parameter CAMSYNC_EXTERNAL_BIT = 'h4, // enable writing ts_external (0 - local timestamp in the frame header)		parameter CAMSYNC_EXTERNAL_BIT = 'h5, // enable writing ts_external (0 - local timestamp in the frame header)
	parameter CAMSYNC_TRIGGERED_BIT = 'h6, // triggered mode ( 0- async)		parameter CAMSYNC_TRIGGERED_BIT = 'h7, // triggered mode ( 0- async)
	parameter CAMSYNC_MASTER_BIT = 'h9, // select a 2-bit master channel (master delay may be used as a flash delay)		parameter CAMSYNC_MASTER_BIT = 'ha, // select a 2-bit master channel (master delay may be used as a flash delay)
	parameter CAMSYNC_CHN_EN_BIT = 'he, // per-channel enable timestamp generation		parameter CAMSYNC_CHN_EN_BIT = 'hf, // per-channel enable timestamp generation
	parameter CAMSYNC_PRE_MAGIC = 6'b110100,		parameter CAMSYNC_PRE_MAGIC = 6'b110100,
	parameter CAMSYNC_POST_MAGIC = 6'b001101,		parameter CAMSYNC_POST_MAGIC = 6'b001101,

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