Working on sensor channel (a9cd51b0) · Commits · Elphel / x393

sensor/sens_gamma.v

+19 −18

Original line number	Original line	Diff line number	Diff line
	@@ -109,7 +109,7 @@ module sens_gamma #(
	reg [1:0] color; // for selecting page in a gamma table		reg [1:0] color; // for selecting page in a gamma table
	reg bayer0_latched; // latch bayer[0] at the beginning of first line		reg bayer0_latched; // latch bayer[0] at the beginning of first line
	// reg hact_m;		// reg hact_m;
	reg [3:0] hact_d; // combine sevaral delays?		reg [4:0] hact_d; // combine several delays?
	// reg en_d;		// reg en_d;
	reg [7:0] cdata; //8-bit pixel data after "curves"		reg [7:0] cdata; //8-bit pixel data after "curves"
	// modified table data to increase precision. table_base[9:0] is now 10 bits (2 extra).		// modified table data to increase precision. table_base[9:0] is now 10 bits (2 extra).
	@@ -117,8 +117,8 @@ module sens_gamma #(
	// 8 bit table_diff will be "floating point" with the following format		// 8 bit table_diff will be "floating point" with the following format
	// now "signed" is 2's complement, was sign, abs() before		// now "signed" is 2's complement, was sign, abs() before

	wire [7:0] table_diff_w; // 8 msbs in table word - msb - sign (0 plus, 1 - minus), other 7 bits - +/-127 difference to the next value		reg [7:0] table_diff_m; // 8 msbs in table word - msb - sign (0 plus, 1 - minus), other 7 bits - +/-127 difference to the next value
	wire [9:0] table_base_w; // 10 lsbs in the table - base value, will be corrected using table_diff and input data lsbs (2 for now)		reg [9:0] table_base_m; // 10 lsbs in the table - base value, will be corrected using table_diff and input data lsbs (2 for now)
	wire [35:0] table_mult;		wire [35:0] table_mult;

	// register decoded memory output		// register decoded memory output
	@@ -128,8 +128,8 @@ module sens_gamma #(
	reg [ 9:0] table_base_r;		reg [ 9:0] table_base_r;

	wire [9:0] interp_data;		wire [9:0] interp_data;
	wire [7:0] pxd_in_d2;		wire [7:0] pxd_in_d3;
	reg [7:0] pxd_in_r3; // register to be absorbed in mpy		reg [7:0] pxd_in_r4; // register to be absorbed in mpy

	reg vblank; // from sof to first hact		reg vblank; // from sof to first hact
	reg pend_trig; // pending trigger (if trig came outside of vblank		reg pend_trig; // pending trigger (if trig came outside of vblank
	@@ -145,7 +145,7 @@ module sens_gamma #(
	wire [17:0] table_rdata;		wire [17:0] table_rdata;

	assign pxd_out = cdata;		assign pxd_out = cdata;
	assign hact_out = hact_d[3];		assign hact_out = hact_d[4];

	assign set_ctrl_w = cmd_we && (cmd_a == SENS_GAMMA_CTRL );		assign set_ctrl_w = cmd_we && (cmd_a == SENS_GAMMA_CTRL );
	// assign set_status_w = cmd_we && (cmd_a == SENS_GAMMA_STATUS );		// assign set_status_w = cmd_we && (cmd_a == SENS_GAMMA_STATUS );
	@@ -170,7 +170,7 @@ module sens_gamma #(
	assign table_rdata= ram_chn_d2[1]?		assign table_rdata= ram_chn_d2[1]?
	(ram_chn_d2[0]?table_rdata3:table_rdata2):		(ram_chn_d2[0]?table_rdata3:table_rdata2):
	(ram_chn_d2[0]?table_rdata1:table_rdata0);		(ram_chn_d2[0]?table_rdata1:table_rdata0);
	assign {table_diff_w[7:0],table_base_w[9:0]} = table_rdata;		// assign {table_diff_w[7:0],table_base_w[9:0]} = table_rdata;

	assign bayer = mode[SENS_GAMMA_MODE_BAYER +: 2];		assign bayer = mode[SENS_GAMMA_MODE_BAYER +: 2];
	assign table_page = mode[SENS_GAMMA_MODE_PAGE]; // TODO: re-assign?		assign table_page = mode[SENS_GAMMA_MODE_PAGE]; // TODO: re-assign?
	@@ -179,7 +179,7 @@ module sens_gamma #(

	assign sync_bayer=hact_d[1] && ~hact_d[2];		assign sync_bayer=hact_d[1] && ~hact_d[2];
	assign interp_data[9:0] = table_base_r[9:0]+table_mult_r[17:8]+table_mult_r[7]; //round		assign interp_data[9:0] = table_base_r[9:0]+table_mult_r[17:8]+table_mult_r[7]; //round
	assign table_mult=table_diff{1'b0,pxd_in_r3[7:0]}; // 11 bits, signed 9 bits, positive		assign table_mult=table_diff{1'b0,pxd_in_r4[7:0]}; // 11 bits, signed 9 bits, positive

	assign sof_masked= sof_in && (pend_trig \|\| repet_mode) && en_input;		assign sof_masked= sof_in && (pend_trig \|\| repet_mode) && en_input;
	assign trig = trig_in \|\| trig_soft;		assign trig = trig_in \|\| trig_soft;
	@@ -218,7 +218,7 @@ module sens_gamma #(
	always @ (posedge rst or posedge pclk) begin		always @ (posedge rst or posedge pclk) begin
	if (rst) begin		if (rst) begin
	mode <= 0;		mode <= 0;
	hact_d[3:0] <= 0;		hact_d[4:0] <= 0;
	bayer_nset <= 0;		bayer_nset <= 0;
	bayer0_latched <= 0;		bayer0_latched <= 0;
	color[1:0] <= 0;		color[1:0] <= 0;
	@@ -229,12 +229,12 @@ module sens_gamma #(

	end else begin		end else begin
	mode <= mode_mclk;		mode <= mode_mclk;
	hact_d[3:0] <= {hact_d[2:0],hact_in};		hact_d[4:0] <= {hact_d[3:0],hact_in};
	bayer_nset <= frame_run && (bayer_nset \|\| hact_in);		bayer_nset <= frame_run && (bayer_nset \|\| hact_in);
	bayer0_latched <= bayer_nset? bayer0_latched:bayer[0];		bayer0_latched <= bayer_nset? bayer0_latched:bayer[0];
	color[1:0] <= { bayer_nset? (sync_bayer ^ color[1]):bayer[1] ,		color[1:0] <= { bayer_nset? (sync_bayer ^ color[1]):bayer[1] ,
	(bayer_nset &&(~sync_bayer))?~color[0]:bayer0_latched };		(bayer_nset &&(~sync_bayer))?~color[0]:bayer0_latched };
	pxd_in_r3 <= pxd_in_d2;		pxd_in_r4 <= pxd_in_d3;
	cdata[7:0] <= interp_data[9:2];		cdata[7:0] <= interp_data[9:2];
	vblank <= sof_in \|\| (vblank && !hact_in);		vblank <= sof_in \|\| (vblank && !hact_in);
	pend_trig <= (trig && !vblank) \|\| (pend_trig && !sof_in);		pend_trig <= (trig && !vblank) \|\| (pend_trig && !sof_in);
	@@ -245,10 +245,11 @@ module sens_gamma #(
	end		end

	always @ (posedge pclk) begin		always @ (posedge pclk) begin
	table_base[9:0] <= table_base_w[9:0];		{table_diff_m[7:0],table_base_m[9:0]} <= table_rdata;
	table_diff[10:0] <= table_diff_w[7]?		table_base[9:0] <= table_base_m[9:0];
	{table_diff_w[6:0],4'b0}:		table_diff[10:0] <= table_diff_m[7]?
	{{4{table_diff_w[6]}},table_diff_w[6:0]};		{table_diff_m[6:0],4'b0}:
			{{4{table_diff_m[6]}},table_diff_m[6:0]};
	table_mult_r[17:7] <= table_mult[17:7];		table_mult_r[17:7] <= table_mult[17:7];
	table_base_r[ 9:0] <= table_base[ 9:0];		table_base_r[ 9:0] <= table_base[ 9:0];

	@@ -290,9 +291,9 @@ module sens_gamma #(
	) dly_16_pxd_i (		) dly_16_pxd_i (
	.clk (pclk), // input		.clk (pclk), // input
	.rst (rst), // input		.rst (rst), // input
	.dly (2), // input[3:0]		.dly (3), // input[3:0]
	.din (pxd_in[7:0]), // input[0:0]		.din (pxd_in[7:0]), // input[0:0]
	.dout(pxd_in_d2) // output[0:0]		.dout(pxd_in_d3) // output[0:0]
	);		);

	dly_16 #(		dly_16 #(
	@@ -300,7 +301,7 @@ module sens_gamma #(
	) dly_16_sof_eof_i (		) dly_16_sof_eof_i (
	.clk (pclk), // input		.clk (pclk), // input
	.rst (rst), // input		.rst (rst), // input
	.dly (3), // input[3:0]		.dly (4), // input[3:0]
	.din ({eof_in, sof_masked}), // input[0:0]		.din ({eof_in, sof_masked}), // input[0:0]
	.dout({eof_out,sof_out}) // output[0:0]		.dout({eof_out,sof_out}) // output[0:0]
	);		);

sensor/sensor_channel.v

+88 −15

Original line number	Original line	Diff line number	Diff line
	@@ -36,6 +36,7 @@ module sensor_channel#(

	// parameter SENSI2C_ABS_ADDR = 'h302, // 'h300,		// parameter SENSI2C_ABS_ADDR = 'h302, // 'h300,
	// parameter SENSI2C_REL_ADDR = 'h320, // 'h310,		// parameter SENSI2C_REL_ADDR = 'h320, // 'h310,
			parameter SENSOR_CTRL_ADDR_MASK = 'h3ff, //
	parameter SENSI2C_ADDR_MASK = 'h3f0, // both for SENSI2C_ABS_ADDR and SENSI2C_REL_ADDR		parameter SENSI2C_ADDR_MASK = 'h3f0, // both for SENSI2C_ABS_ADDR and SENSI2C_REL_ADDR
	// parameter SENSI2C_CTRL_ADDR = 'h302. // 'h320,		// parameter SENSI2C_CTRL_ADDR = 'h302. // 'h320,
	parameter SENSI2C_CTRL_MASK = 'h3fe,		parameter SENSI2C_CTRL_MASK = 'h3fe,
	@@ -75,11 +76,14 @@ module sensor_channel#(
	parameter SENSOR_FIFO_DELAY = 7,		parameter SENSOR_FIFO_DELAY = 7,

	// parameter SENS_GAMMA_ADDR = 'h304, //..'h307, // 'h338,		// parameter SENS_GAMMA_ADDR = 'h304, //..'h307, // 'h338,
			parameter SENS_GAMMA_NUM_CHN = 3, // number of subchannels for his sensor ports (1..4)
			parameter SENS_GAMMA_BUFFER = 0, // 1 - use "shadow" table for clean switching, 0 - single table per channel
			// parameter SENS_GAMMA_ADDR = 'h338,
	parameter SENS_GAMMA_ADDR_MASK = 'h3fc,		parameter SENS_GAMMA_ADDR_MASK = 'h3fc,
	parameter SENS_GAMMA_CTRL = 'h0,		parameter SENS_GAMMA_CTRL = 'h0,
	// parameter SENS_GAMMA_STATUS = 'h1,		parameter SENS_GAMMA_ADDR_DATA = 'h1, // bit 20 ==1 - table address, bit 20==0 - table data (18 bits)
	parameter SENS_GAMMA_TADDR = 'h2,		parameter SENS_GAMMA_HEIGHT01 = 'h2, // bits [15:0] - height minus 1 of image 0, [31:16] - height-1 of image1
	parameter SENS_GAMMA_TDATA = 'h3, // 1.. 2^16, 0 - use HACT		parameter SENS_GAMMA_HEIGHT2 = 'h3, // bits [15:0] - height minus 1 of image 2 ( no need for image 3)
	// parameter SENS_GAMMA_STATUS_REG = 'h32		// parameter SENS_GAMMA_STATUS_REG = 'h32
	parameter SENS_GAMMA_MODE_WIDTH = 5, // does not include trig		parameter SENS_GAMMA_MODE_WIDTH = 5, // does not include trig
	parameter SENS_GAMMA_MODE_BAYER = 0,		parameter SENS_GAMMA_MODE_BAYER = 0,
	@@ -145,11 +149,17 @@ module sensor_channel#(
	output status_rq, // input request to send status downstream		output status_rq, // input request to send status downstream
	input status_start, // Acknowledge of the first status packet byte (address)		input status_start, // Acknowledge of the first status packet byte (address)

			output [15:0] dout,
			output dout_valid,
			output sof_out,
			output eof_out,

	output hist_request,		output hist_request,
	input hist_grant,		input hist_grant,
	output [1:0] hist_chn, // output[1:0]		output [1:0] hist_chn, // output[1:0]
	output hist_dvalid, // output		output hist_dvalid, // output
	output [31:0] hist_data // output[31:0]		output [31:0] hist_data // output[31:0]

	// (much) more will be added later		// (much) more will be added later


	@@ -200,6 +210,28 @@ module sensor_channel#(
	wire gamma_sof_out;		wire gamma_sof_out;
	wire gamma_eof_out;		wire gamma_eof_out;

			wire [31:0] sensor_ctrl_data;
			wire sensor_ctrl_we;
			reg [8:0] mode;
			wire [3:0] hist_en;
			wire hist_nrst;
			wire bit16; // 16-bit mode, 0 - 8 bit mode
			wire [3:0] hist_rq;
			wire [3:0] hist_gr;
			wire [3:0] hist_dv;
			wire [31:0] hist_do0;
			wire [31:0] hist_do1;
			wire [31:0] hist_do2;
			wire [31:0] hist_do3;
			reg [7:0] gamma_data_r;
			reg [15:0] dout_r;
			reg dav_8bit;
			reg dav_r;
			wire [15:0] dout_w;
			wire dav_w;

			reg sof_out_r;
			reg eof_out_r;

	// TODO: insert vignetting and/or flat field, pixel defects before gamma_*_in		// TODO: insert vignetting and/or flat field, pixel defects before gamma_*_in
	assign gamma_pxd_in = {pxd[11:0],4'b0};		assign gamma_pxd_in = {pxd[11:0],4'b0};
	@@ -207,13 +239,44 @@ module sensor_channel#(
	assign gamma_sof_in = sof;		assign gamma_sof_in = sof;
	assign gamma_eof_in = eof;		assign gamma_eof_in = eof;

			assign dout = dout_r;
			assign dout_valid = dav_r;
			assign sof_out = sof_out_r;
			assign eof_out = eof_out_r;

			assign dout_w = bit16 ? gamma_pxd_in : {gamma_data_r,gamma_pxd_out};
			assign dav_w = bit16 ? gamma_hact_in : dav_8bit;


			assign hist_en = mode[3:0];
			assign hist_nrst = mode[4];
			assign bit16 = mode[8];


	always @ (posedge mclk) begin		always @ (posedge mclk) begin
	cmd_ad <= cmd_ad_in;		cmd_ad <= cmd_ad_in;
	cmd_stb <= cmd_stb_in;		cmd_stb <= cmd_stb_in;
	end		end

	status_router2 status_router2_sensori (		always @ (posedge rst or posedge mclk) begin
			if (rst) mode <= 0;
			else if (sensor_ctrl_we) mode <= sensor_ctrl_data[8:0];
			end

			always @ (posedge pclk) begin
			if (dav_w) dout_r <= dout_w;

			dav_r <= dav_w;

			dav_8bit <= gamma_hact_out && !dav_8bit;

			if (gamma_hact_out && !dav_8bit) gamma_data_r <= gamma_pxd_out;

			sof_out_r <= bit16 ? gamma_sof_in : gamma_sof_out;
			eof_out_r <= bit16 ? gamma_eof_in : gamma_eof_out;
			end

			status_router2 status_router2_sensor_i (
	.rst (rst), // input		.rst (rst), // input
	.clk (mclk), // input		.clk (mclk), // input
	.db_in0 (sens_i2c_status_ad), // input[7:0]		.db_in0 (sens_i2c_status_ad), // input[7:0]
	@@ -227,6 +290,22 @@ module sensor_channel#(
	.start_out (status_start) // input		.start_out (status_start) // input
	);		);

			cmd_deser #(
			.ADDR (SENSOR_CTRL_ADDR),
			.ADDR_MASK (SENSOR_CTRL_ADDR_MASK),
			.NUM_CYCLES (6),
			.ADDR_WIDTH (1),
			.DATA_WIDTH (32)
			) cmd_deser_sens_channel_i (
			.rst (rst), // input
			.clk (mclk), // input
			.ad (cmd_ad), // input[7:0]
			.stb (cmd_stb), // input
			.addr (), // output[0:0] - not used
			.data (sensor_ctrl_data), // output[31:0]
			.we (sensor_ctrl_we) // output
			);

	sensor_i2c_io #(		sensor_i2c_io #(
	.SENSI2C_ABS_ADDR (SENSI2C_ABS_ADDR),		.SENSI2C_ABS_ADDR (SENSI2C_ABS_ADDR),
	.SENSI2C_REL_ADDR (SENSI2C_REL_ADDR),		.SENSI2C_REL_ADDR (SENSI2C_REL_ADDR),
	@@ -338,11 +417,14 @@ module sensor_channel#(
	);		);

	sens_gamma #(		sens_gamma #(
			.SENS_GAMMA_NUM_CHN (SENS_GAMMA_NUM_CHN),
			.SENS_GAMMA_BUFFER (SENS_GAMMA_BUFFER),
	.SENS_GAMMA_ADDR (SENS_GAMMA_ADDR),		.SENS_GAMMA_ADDR (SENS_GAMMA_ADDR),
	.SENS_GAMMA_ADDR_MASK (SENS_GAMMA_ADDR_MASK),		.SENS_GAMMA_ADDR_MASK (SENS_GAMMA_ADDR_MASK),
	.SENS_GAMMA_CTRL (SENS_GAMMA_CTRL),		.SENS_GAMMA_CTRL (SENS_GAMMA_CTRL),
	.SENS_GAMMA_TADDR (SENS_GAMMA_TADDR),		.SENS_GAMMA_ADDR_DATA (SENS_GAMMA_ADDR_DATA),
	.SENS_GAMMA_TDATA (SENS_GAMMA_TDATA),		.SENS_GAMMA_HEIGHT01 (SENS_GAMMA_HEIGHT01),
			.SENS_GAMMA_HEIGHT2 (SENS_GAMMA_HEIGHT2),
	.SENS_GAMMA_MODE_WIDTH (SENS_GAMMA_MODE_WIDTH),		.SENS_GAMMA_MODE_WIDTH (SENS_GAMMA_MODE_WIDTH),
	.SENS_GAMMA_MODE_BAYER (SENS_GAMMA_MODE_BAYER),		.SENS_GAMMA_MODE_BAYER (SENS_GAMMA_MODE_BAYER),
	.SENS_GAMMA_MODE_PAGE (SENS_GAMMA_MODE_PAGE),		.SENS_GAMMA_MODE_PAGE (SENS_GAMMA_MODE_PAGE),
	@@ -367,15 +449,6 @@ module sensor_channel#(
	);		);

	// TODO: Use generate to generate 1-4 histogram modules		// TODO: Use generate to generate 1-4 histogram modules
	wire [3:0] hist_en;
	wire hist_nrst;
	wire [3:0] hist_rq;
	wire [3:0] hist_gr;
	wire [3:0] hist_dv;
	wire [31:0] hist_do0;
	wire [31:0] hist_do1;
	wire [31:0] hist_do2;
	wire [31:0] hist_do3;
	generate		generate
	if (HISTOGRAM_ADDR0 >=0)		if (HISTOGRAM_ADDR0 >=0)
	sens_histogram #(		sens_histogram #(