Commit a26a7c72 authored by Andrey Filippov's avatar Andrey Filippov
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merged with origin/framepars, includes updated SATA, bitsteram version 0x039300d3 (sata 0x0b)

parents 16bc2093 88f2b52d

dsp/dct_iv.ods

+4.12 KiB (69.6 KiB)

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dsp/dsp_ma_preadd_c.v

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@@ -39,7 +39,7 @@ 
 */

`timescale 1ns/1ps

//`define INSTANTIATE_DSP48E1

`undef INSTANTIATE_DSP48E1

//`undef INSTANTIATE_DSP48E1

module  dsp_ma_preadd_c #(

    parameter B_WIDTH = 18,

    parameter A_WIDTH = 25,

fpga_version.vh

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@@ -35,7 +35,8 @@ 
 * contains all the components and scripts required to completely simulate it

 * with at least one of the Free Software programs.

 */

        parameter FPGA_VERSION =          32'h039300d2;      //parallel - fixing false trigger on input condition change -0.018/21, 80.28 %

        parameter FPGA_VERSION =          32'h039300d3;      //parallel - Updated SATA (v.0xb)

//        parameter FPGA_VERSION =          32'h039300d2;      //parallel - fixing false trigger on input condition change -0.018/21, 80.28 %

//      parameter FPGA_VERSION =          32'h039300d1;      //parallel - removed extra debug -0.042/9 80.34%

//      parameter FPGA_VERSION =          32'h039300d1;      //parallel - changing line_numbers_sync condition  -0.011/3, 80.78 %

//      parameter FPGA_VERSION =          32'h039300d0;      //parallel - more status data

includes/ahci_defaults.vh

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@@ -2,6 +2,6 @@ 
, .INIT_08 (256'h000000000024000600000000000000000000000080000C000000000080000800)

, .INIT_09 (256'h000000000000000000000000000000000000000000000000FFFFFFFF00000000)

, .INIT_0B (256'h0000000000000000000000000000003300000000000000000000000000000000)

, .INIT_0C (256'h000000000000000000000000000000000000000001010002001000000001FFFE)

, .INIT_0C (256'h00000000000000000000000000000000000000000101000B001000000001FFFE)

, .INIT_0D (256'h000001000000000000000040000000000001FFFE000000008000000000000000)

, .INIT_0E (256'h0000000000000000000000000000000000000000000000000000000040000001)

includes/ahci_localparams.vh

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@@ -97,7 +97,7 @@ 
// RO: HBA Revision ID

    localparam PCI_Header__RID__RID__ADDR = 'h62;

    localparam PCI_Header__RID__RID__MASK = 'hff;

    localparam PCI_Header__RID__RID__DFLT = 'h2;

    localparam PCI_Header__RID__RID__DFLT = 'hb;

// RO: Base Class Code: 1 - Mass Storage Device

    localparam PCI_Header__CC__BCC__ADDR = 'h62;

    localparam PCI_Header__CC__BCC__MASK = 'hff000000;