Commit 9dacd762 authored by Andrey Filippov's avatar Andrey Filippov

changed logger LOGGER_PAGE_IMU=3 to remove overlap

parent c9e297d5
...@@ -62,52 +62,52 @@ ...@@ -62,52 +62,52 @@
<link> <link>
<name>vivado_logs/VivadoBitstream.log</name> <name>vivado_logs/VivadoBitstream.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20160327140517650.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoBitstream-20160327153927194.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoOpt.log</name> <name>vivado_logs/VivadoOpt.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoOpt-20160327140517650.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoOpt-20160327153927194.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoOptPhys.log</name> <name>vivado_logs/VivadoOptPhys.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoOptPhys-20160327140517650.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoOptPhys-20160327153927194.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoOptPower.log</name> <name>vivado_logs/VivadoOptPower.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoOptPower-20160327140517650.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoOptPower-20160327153927194.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoPlace.log</name> <name>vivado_logs/VivadoPlace.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoPlace-20160327140517650.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoPlace-20160327153927194.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoRoute.log</name> <name>vivado_logs/VivadoRoute.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoRoute-20160327140517650.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoRoute-20160327153927194.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoSynthesis.log</name> <name>vivado_logs/VivadoSynthesis.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20160327135949141.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoSynthesis-20160327153927194.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name> <name>vivado_logs/VivadoTimimgSummaryReportImplemented.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20160327140517650.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportImplemented-20160327153927194.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoTimimgSummaryReportSynthesis.log</name> <name>vivado_logs/VivadoTimimgSummaryReportSynthesis.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportSynthesis-20160327135949141.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoTimimgSummaryReportSynthesis-20160327153927194.log</location>
</link> </link>
<link> <link>
<name>vivado_logs/VivadoTimingReportSynthesis.log</name> <name>vivado_logs/VivadoTimingReportSynthesis.log</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportSynthesis-20160327135949141.log</location> <location>/home/andrey/git/x393/vivado_logs/VivadoTimingReportSynthesis-20160327153927194.log</location>
</link> </link>
<link> <link>
<name>vivado_state/x393-opt-phys.dcp</name> <name>vivado_state/x393-opt-phys.dcp</name>
...@@ -127,7 +127,7 @@ ...@@ -127,7 +127,7 @@
<link> <link>
<name>vivado_state/x393-synth.dcp</name> <name>vivado_state/x393-synth.dcp</name>
<type>1</type> <type>1</type>
<location>/home/andrey/git/x393/vivado_state/x393-synth-20160327135949141.dcp</location> <location>/home/andrey/git/x393/vivado_state/x393-synth-20160327153927194.dcp</location>
</link> </link>
</linkedResources> </linkedResources>
</projectDescription> </projectDescription>
...@@ -31,7 +31,9 @@ ...@@ -31,7 +31,9 @@
* contains all the components and scripts required to completely simulate it * contains all the components and scripts required to completely simulate it
* with at least one of the Free Software programs. * with at least one of the Free Software programs.
*******************************************************************************/ *******************************************************************************/
parameter FPGA_VERSION = 32'h0393007c; // fixed cmdseqmux - reporting interrupt status and mask correctly
parameter FPGA_VERSION = 32'h0393007d; // Changing IMU logger LOGGER_PAGE_IMU 0-> 3 to avoid overlap with other registers
// parameter FPGA_VERSION = 32'h0393007c; // fixed cmdseqmux - reporting interrupt status and mask correctly
// parameter FPGA_VERSION = 32'h0393007b; // lvcmos25_lvds_25_diff // parameter FPGA_VERSION = 32'h0393007b; // lvcmos25_lvds_25_diff
// parameter FPGA_VERSION = 32'h0393007a; // lvcmos25_ppds_25_nodiff - OK // parameter FPGA_VERSION = 32'h0393007a; // lvcmos25_ppds_25_nodiff - OK
// parameter FPGA_VERSION = 32'h03930079; // diff - failed // parameter FPGA_VERSION = 32'h03930079; // diff - failed
......
...@@ -794,9 +794,10 @@ ...@@ -794,9 +794,10 @@
parameter LOGGER_MASK = 'h7fe, parameter LOGGER_MASK = 'h7fe,
parameter LOGGER_STATUS_MASK = 'h7ff, parameter LOGGER_STATUS_MASK = 'h7ff,
parameter LOGGER_PAGE_IMU = 0, // 'h00..'h1f - overlaps with period/duration/halfperiod/config? // parameter LOGGER_PAGE_IMU = 0, // 'h00..'h1f - overlaps with period/duration/halfperiod/config? (was so in x353)
parameter LOGGER_PAGE_GPS = 1, // 'h20..'h3f parameter LOGGER_PAGE_GPS = 1, // 'h20..'h3f
parameter LOGGER_PAGE_MSG = 2, // 'h40..'h5f parameter LOGGER_PAGE_MSG = 2, // 'h40..'h5f
parameter LOGGER_PAGE_IMU = 3, // 'h60..'h7f - removing overlap with period/duration/halfperiod/config
parameter LOGGER_PERIOD = 0, parameter LOGGER_PERIOD = 0,
parameter LOGGER_BIT_DURATION = 1, parameter LOGGER_BIT_DURATION = 1,
......
...@@ -40,9 +40,10 @@ module event_logger#( ...@@ -40,9 +40,10 @@ module event_logger#(
parameter LOGGER_MASK = 'h7fe, parameter LOGGER_MASK = 'h7fe,
parameter LOGGER_STATUS_MASK = 'h7ff, parameter LOGGER_STATUS_MASK = 'h7ff,
parameter LOGGER_PAGE_IMU = 0, // 'h00..'h1f - overlaps with period/duration/halfperiod/config? // parameter LOGGER_PAGE_IMU = 0, // 'h00..'h1f - overlaps with period/duration/halfperiod/config? (was so in x353)
parameter LOGGER_PAGE_GPS = 1, // 'h20..'h3f parameter LOGGER_PAGE_GPS = 1, // 'h20..'h3f
parameter LOGGER_PAGE_MSG = 2, // 'h40..'h5f parameter LOGGER_PAGE_MSG = 2, // 'h40..'h5f
parameter LOGGER_PAGE_IMU = 3, // 'h60..'h7f - removing overlap with period/duration/halfperiod/config
parameter LOGGER_PERIOD = 0, parameter LOGGER_PERIOD = 0,
parameter LOGGER_BIT_DURATION = 1, parameter LOGGER_BIT_DURATION = 1,
......
...@@ -549,6 +549,11 @@ class X393ExportC(object): ...@@ -549,6 +549,11 @@ class X393ExportC(object):
data = self._enc_cmdframeseq_mode(), data = self._enc_cmdframeseq_mode(),
name = "x393_cmdframeseq_mode", typ="wo", name = "x393_cmdframeseq_mode", typ="wo",
frmt_spcs = frmt_spcs) frmt_spcs = frmt_spcs)
stypedefs += self.get_typedef32(comment = "CMDFRAMESEQ mode",
data = self._enc_cmdseqmux_status(),
name = "x393_cmdseqmux_status", typ="ro",
frmt_spcs = frmt_spcs)
#
return stypedefs return stypedefs
def define_macros(self): def define_macros(self):
...@@ -994,7 +999,16 @@ class X393ExportC(object): ...@@ -994,7 +999,16 @@ class X393ExportC(object):
(('_ [1:0] - 0: NOP, 1: clear IRQ, 2 - Clear IE, 3: set IE',)), (('_ [1:0] - 0: NOP, 1: clear IRQ, 2 - Clear IE, 3: set IE',)),
(("X393_CMDFRAMESEQ_CTRL", c, vrlg.CMDFRAMESEQ_CTRL + ba, ia, z3, "x393_cmdframeseq_mode", "wo", "CMDFRAMESEQ control register")), (("X393_CMDFRAMESEQ_CTRL", c, vrlg.CMDFRAMESEQ_CTRL + ba, ia, z3, "x393_cmdframeseq_mode", "wo", "CMDFRAMESEQ control register")),
(("X393_CMDFRAMESEQ_ABS", (c,"offset"), vrlg.CMDFRAMESEQ_ABS + ba, (ia,1), (z3,z15), "u32*", "wo", "CMDFRAMESEQ absolute frame address/command")), (("X393_CMDFRAMESEQ_ABS", (c,"offset"), vrlg.CMDFRAMESEQ_ABS + ba, (ia,1), (z3,z15), "u32*", "wo", "CMDFRAMESEQ absolute frame address/command")),
(("X393_CMDFRAMESEQ_REL", (c,"offset"), vrlg.CMDFRAMESEQ_REL + ba, (ia,1), (z3,z14), "u32*", "wo", "CMDFRAMESEQ relative frame address/command"))] (("X393_CMDFRAMESEQ_REL", (c,"offset"), vrlg.CMDFRAMESEQ_REL + ba, (ia,1), (z3,z14), "u32*", "wo", "CMDFRAMESEQ relative frame address/command"))]
ba = 0
ia = 0
c = ""
sdefines +=[
(('_Command sequencer multiplexer, provides current frame number for each sesnor channel and interrupt status/interrupt masks for them.',)),
(('_Interrupts and interrupt masks are controlled through channel CMDFRAMESEQ module',)),
(("X393_CMDSEQMUX_STATUS_CTRL", "", vrlg.CMDSEQMUX_ADDR, 0, None, "x393_status_ctrl", "rw", "CMDSEQMUX status control mode (status provides current frame numbers)")),
(("X393_CMDSEQMUX_STATUS", "", vrlg.STATUS_ADDR + vrlg.CMDSEQMUX_STATUS, 0, None, "x393_cmdseqmux_status", "ro", "CMDSEQMUX status data (frame numbers and interrupts"))]
return sdefines return sdefines
def define_other_macros(self): # Used mostly for development/testing, not needed for normal camera operation def define_other_macros(self): # Used mostly for development/testing, not needed for normal camera operation
...@@ -2121,6 +2135,19 @@ class X393ExportC(object): ...@@ -2121,6 +2135,19 @@ class X393ExportC(object):
dw.append(("reset", vrlg.CMDFRAMESEQ_RST_BIT, 1, 0, "1 - reset, 0 - normal operation")) dw.append(("reset", vrlg.CMDFRAMESEQ_RST_BIT, 1, 0, "1 - reset, 0 - normal operation"))
return dw return dw
def _enc_cmdseqmux_status(self):
dw=[]
dw.append(("frame_num0", 0, 4, 0, "Fame number for sensor 0"))
dw.append(("frame_num1", 4, 4, 0, "Fame number for sensor 0"))
dw.append(("frame_num2", 8, 4, 0, "Fame number for sensor 0"))
dw.append(("frame_num3", 12, 4, 0, "Fame number for sensor 0"))
dw.append(("is", 16, 4, 0, "Interrupt status: 1 bit per sensor channel"))
dw.append(("im", 20, 4, 0, "Interrupt enable: 1 bit per sensor channel"))
dw.append(("seq_num", 26, 6, 0, "Status sequence number"))
return dw
def get_pad32(self, data, wlen=32, name="unnamed", padLast=False): def get_pad32(self, data, wlen=32, name="unnamed", padLast=False):
sorted_data=sorted(data,key=lambda sbit: sbit[1]) sorted_data=sorted(data,key=lambda sbit: sbit[1])
......
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