Regenerated bitstream version 039300a5 for parallel sensors with updated command sequencer

.settings/com.elphel.vdt.cocotb.prefs

-cocotb_@_COCOTB_DEBUG=true
+cocotb_@_COCOTB_DEBUG=false
 cocotb_@_CocotbDutTopFile=cocotb/x393_dut.v
 cocotb_@_CocotbExtraFiles=glbl.v<-@\#\#@->
 cocotb_@_CocotbIncludeDir=${verilog_project_loc}/includes<-@\#\#@->${verilog_project_loc}/ddr3<-@\#\#@->${verilog_project_loc}/x393_sata<-@\#\#@->${verilog_project_loc}/x393_sata/host<-@\#\#@->

fpga_version.vh

@@ -35,7 +35,8 @@
  * contains all the components and scripts required to completely simulate it
  * with at least one of the Free Software programs.
  */
-          parameter FPGA_VERSION =          32'h039300a4;      // parallel 79.66, -0.1
+          parameter FPGA_VERSION =          32'h039300a5;      // parallel, fixing command sequencer and ARO
+//          parameter FPGA_VERSION =          32'h039300a4;      // parallel 79.66, -0.1
 //          parameter FPGA_VERSION =          32'h039300a3;      // hispi, after minor interface changes (separated control bits)80.52% -0.163
 //          parameter FPGA_VERSION =          32'h039300a2;      // hispi trying default placement 81.39% not met by -0.183
 //          parameter FPGA_VERSION =          32'h039300a1;      // hispi 81.19%, not met by -0.07