Fixed frame sequencers command output (ignored busy before)

cocotb/x393_cocotb_02.sav

 [*]
 [*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI
-[*] Thu Sep  1 04:51:15 2016
+[*] Thu Sep  1 21:10:54 2016
 [*]
-[dumpfile] "/home/eyesis/git/x393-neon/simulation/x393_dut-20160830202606545.fst"
-[dumpfile_mtime] "Wed Aug 31 03:39:41 2016"
-[dumpfile_size] 281513830
+[dumpfile] "/home/eyesis/git/x393-neon/simulation/x393_dut-20160901133543970.fst"
+[dumpfile_mtime] "Thu Sep  1 20:31:46 2016"
+[dumpfile_size] 118208746
 [savefile] "/home/eyesis/git/x393-neon/cocotb/x393_cocotb_02.sav"
-[timestart] 0
+[timestart] 115264800
 [size] 1836 1171
 [pos] 1920 23
-*-26.061598 53377388 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+*-15.820814 115547388 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
 [treeopen] x393_dut.
 [treeopen] x393_dut.ddr3_i.ddr3_i.
 [treeopen] x393_dut.simul_axi_master_wdata_i.
 [treeopen] x393_dut.x393_i.
+[treeopen] x393_dut.x393_i.cmd_mux_i.
 [treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].
 [treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.
 [treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_pixel_buf_iface_i.
@@ -28,6 +29,7 @@
 [treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.
 [treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.cmprs_pixel_buf_iface_i.
 [treeopen] x393_dut.x393_i.compressor393_i.genblk3.cmprs_afi0_mux_i.
+[treeopen] x393_dut.x393_i.frame_sequencer_block[0].
 [treeopen] x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.
 [treeopen] x393_dut.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.
 [treeopen] x393_dut.x393_i.mcntrl393_i.memctrl16_i.mcontr_sequencer_i.phy_cmd_i.
@@ -43,7 +45,7 @@
 [treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[2].
 [treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[3].
 [treeopen] x393_dut.x393_i.timing393_i.
-[sst_width] 440
+[sst_width] 266
 [signals_width] 293
 [sst_expanded] 1
 [sst_vpaned_height] 540
@@ -295,7 +297,7 @@ x393_dut.x393_i.sync_resets_i.rst_early_master
 -linescan0
 @1000200
 -linescan0
-@800200
+@c00200
 -tiled0
 @28
 x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.frame_en
@@ -342,6 +344,7 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_macrob
 @1000200
 -compressor_address
 -rbuffer0
+@1401200
 -tiled0
 @800200
 -rtc
@@ -821,7 +824,7 @@ x393_dut.x393_i.compressor393_i.cmprs_channel_block[2].jp_channel_i.buf_pxd[7:0]
 x393_dut.x393_i.compressor393_i.cmprs_channel_block[3].jp_channel_i.buf_pxd[7:0]
 @1401200
 -compressors_all
-@c00200
+@800200
 -cmdseq_0
 @28
 x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.frame_sync
@@ -991,6 +994,8 @@ x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.cmd_we_ctl_w
 x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.seq_enrun
 @22
 x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.fifo_wr_pointers_outr_r[5:0]
+@28
+x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.pre_cmd_seq_w
 @800028
 x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.ren[1:0]
 @28
@@ -1000,6 +1005,10 @@ x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.ren[1:0]
 -group_end
 @22
 x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.rpointer[5:0]
+[color] 7
+x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.waddr[13:0]
+[color] 7
+x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.wdata[31:0]
 @28
 x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.commands_pending
 x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.pre_cmd_seq_w
@@ -1013,11 +1022,13 @@ x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.read_busy[1:0]
 x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.conf_send
 x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.valid
 x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.ackn
+@29
+x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.mclk
 @1001200
 -group_end
-@1401200
+@1000200
 -cmdseq_0
-@c00200
+@800200
 -cmdseq_mux
 @22
 x393_dut.x393_i.cmd_seq_mux_i.frame_num0[3:0]
@@ -1065,9 +1076,67 @@ x393_dut.x393_i.cmd_seq_mux_i.pri_enc_w[1:0]
 x393_dut.x393_i.cmd_seq_mux_i.pri_one[3:0]
 @28
 x393_dut.x393_i.cmd_seq_mux_i.chn_r[1:0]
-@1401200
+@1000200
 -cmdseq_mux
-@c00200
+@800200
+-cmd_mux
+@22
+x393_dut.x393_i.cmd_mux_i.pre_waddr[13:0]
+@28
+x393_dut.x393_i.cmd_mux_i.start_wburst
+@22
+x393_dut.x393_i.cmd_mux_i.waddr[13:0]
+@28
+x393_dut.x393_i.cmd_mux_i.wr_en
+@22
+x393_dut.x393_i.cmd_mux_i.wdata[31:0]
+x393_dut.x393_i.cmd_mux_i.cseq_waddr[13:0]
+@28
+x393_dut.x393_i.cmd_mux_i.cseq_wr_en
+@22
+x393_dut.x393_i.cmd_mux_i.cseq_wdata[31:0]
+@28
+x393_dut.x393_i.cmd_mux_i.cseq_ackn
+@200
+-
+@22
+x393_dut.x393_i.cmd_mux_i.par_waddr[13:0]
+x393_dut.x393_i.cmd_mux_i.par_data[31:0]
+x393_dut.x393_i.cmd_mux_i.byte_ad[7:0]
+@28
+x393_dut.x393_i.cmd_mux_i.ad_stb
+@200
+-
+@28
+x393_dut.x393_i.cmd_mux_i.cmdseq_full_r
+x393_dut.x393_i.cmd_mux_i.fifo_nempty
+x393_dut.x393_i.cmd_mux_i.fifo_half_empty
+x393_dut.x393_i.cmd_mux_i.can_start_w
+@c00022
+x393_dut.x393_i.cmd_mux_i.seq_busy_r[4:0]
+@28
+(0)x393_dut.x393_i.cmd_mux_i.seq_busy_r[4:0]
+(1)x393_dut.x393_i.cmd_mux_i.seq_busy_r[4:0]
+(2)x393_dut.x393_i.cmd_mux_i.seq_busy_r[4:0]
+(3)x393_dut.x393_i.cmd_mux_i.seq_busy_r[4:0]
+(4)x393_dut.x393_i.cmd_mux_i.seq_busy_r[4:0]
+@1401200
+-group_end
+@28
+x393_dut.x393_i.cmd_mux_i.start_axi_w
+x393_dut.x393_i.cmd_mux_i.start_wburst
+@1000200
+-cmd_mux
+@800200
+-readback
+@28
+x393_dut.x393_i.cmd_readback_i.we
+@22
+x393_dut.x393_i.cmd_readback_i.waddr[10:0]
+x393_dut.x393_i.cmd_readback_i.wdata[31:0]
+@1000200
+-readback
+@800200
 -gpio
 @28
 x393_dut.x393_i.gpio393_i.set_mode_w
@@ -1163,7 +1232,7 @@ x393_dut.x393_i.gpio393_i.io_pins[9:0]
 (9)x393_dut.x393_i.gpio393_i.io_pins[9:0]
 @1001200
 -group_end
-@1401200
+@1000200
 -gpio
 @c00200
 -sensor_channel1
@@ -1748,7 +1817,6 @@ x393_dut.simul_axi_master_wdata_i.simul_axi_fifo_i.valid
 -frames
 @22
 x393_dut.x393_i.frame_num[15:0]
-@23
 x393_dut.x393_i.frame_num_compressed[15:0]
 @200
 -

fpga_version.vh

@@ -35,7 +35,8 @@
  * contains all the components and scripts required to completely simulate it
  * with at least one of the Free Software programs.
  */
-          parameter FPGA_VERSION =          32'h039300a7;      // parallel, chnging parameter to reset buffer pages at each frame start. 79.4%, -0.022 (2 paths)
+          parameter FPGA_VERSION =          32'h039300a8;      // parallel, fixing BUG in command sequencer that was missing some commands 79.25%, all met
+//          parameter FPGA_VERSION =          32'h039300a7;      // parallel, changing parameter to reset buffer pages at each frame start. 79.4%, -0.022 (2 paths)
 //          parameter FPGA_VERSION =          32'h039300a6;      // parallel, adding frame sync delays to mcntrl_linear 79.26, mclk and xclk violated
 //          parameter FPGA_VERSION =          32'h039300a5;      // parallel, fixing command sequencer and ARO 80.21%, -0.068
 //          parameter FPGA_VERSION =          32'h039300a4;      // parallel 79.66, -0.1

py393/x393_jpeg.py

@@ -1047,22 +1047,32 @@ print_status_sensor_io all
 
 setup_all_sensors True None 0x4
 
+################## Parallel after drivers ##################
+cd /usr/local/verilog/; test_mcntrl.py @hargs-after
+specify_phys_memory
+specify_window
+set_rtc # maybe not needed as it can be set differently
+camsync_setup 0xf # sensor mask - use local timestamps)
+jpeg_write  "img.jpeg" 0 80
+
+
+
 ################## Parallel ##################
 cd /usr/local/verilog/; test_mcntrl.py @tpargs -x
 
-reset_channels 15
 
 cd /usr/local/verilog/; test_mcntrl.py @hargs
-bitstream_set_path /usr/local/verilog/x393_parallel.bit
+#bitstream_set_path /usr/local/verilog/x393_parallel.bit
 #fpga_shutdown
-#setupSensorsPower "PAR12"
-setupSensorsPower  "PAR12"  all  0  0.0
+#setupSensorsPower  "PAR12"  all  0  0.0
+#measure_all "*DI"
+#setSensorClock 24.0 "2V5_LVDS"
+#set_rtc # maybe not needed as it can be set differently
+
+#all above included hargs
+
+
 
-measure_all "*DI"
-setSensorClock 24.0 "2V5_LVDS"
-specify_phys_memory
-specify_window
-set_rtc # maybe not needed as it can be set differently
 camsync_setup 0xf # sensor mask - use local timestamps)
 
 #later:
@@ -1328,10 +1338,19 @@ set_gpio_pins 0 1 # pin 0 low, pin 1 - high
 #ctrl_cmd_frame_sequencer  <num_sensor>  <reset=False>  <start=False>  <stop=False>
 ctrl_cmd_frame_sequencer   0  0  1  0
 write_cmd_frame_sequencer  0  1  1  0x700  0x6
+write_cmd_frame_sequencer  0  1  1  0x700  0x9
+write_cmd_frame_sequencer  0  1  1  0x700  0xa0
+write_cmd_frame_sequencer  0  1  1  0x700  0x50
 write_cmd_frame_sequencer  0  0  3  0x700  0xa000
 write_cmd_frame_sequencer  0  1  0  0x700  0x90
 write_cmd_frame_sequencer  0  0  2  0x700  0xe00
 write_cmd_frame_sequencer  0  0  3  0x700  0xa
+write_cmd_frame_sequencer  0  0  2  0x700  0x6
+write_cmd_frame_sequencer  0  0  2  0x700  0x9
+write_cmd_frame_sequencer  0  0  2  0x700  0x60
+write_cmd_frame_sequencer  0  0  2  0x700  0x90
+write_cmd_frame_sequencer  0  0  2  0x700  0x600
+write_cmd_frame_sequencer  0  0  2  0x700  0x900
 
 #set_sensor_io_dly_hispi all 0x48 0x68 0x68 0x68 0x68
 #set_sensor_io_ctl all None None None None None 1 None # load all delays?

util_modules/cmd_frame_sequencer.v

@@ -141,7 +141,9 @@ module  cmd_frame_sequencer#(
     reg                   [1:0] page_r_inc;     // increment page_r - signal and delayed version
     reg         [PNTR_WIDH-1:0] rpointer;       // FIFO read pointer for current page
     reg                   [1:0] read_busy;      // reading and sending command  
-    reg                         conf_send;      // valid && ackn
+    wire                        conf_send_w;    // valid && ackn
+    reg                         conf_send_r;    // valid && ackn
+    
     wire                        commands_pending; // wants to send some commands
     reg                   [1:0] ren;             // 1-hot ren to BRAM, then regen to BRAM
     wire                        pre_cmd_seq_w;  // 1 cycle before starting command read/send sequence
@@ -155,6 +157,7 @@ module  cmd_frame_sequencer#(
     wire                        irq_ctrl;
     wire                        we_seq_data;
     
+    assign conf_send_w = valid && ackn;
     assign we_seq_data = data_cycle_r[2];
     
     assign is =  is_r;      // interrupt status (not masked)
@@ -179,7 +182,8 @@ module  cmd_frame_sequencer#(
     assign pre_wpage_inc = (!cmd_we && !(|cmd_we_r) ) && ((next_frame_rq && !wpage_inc[0] && initialized) || reset_on) ;
     assign commands_pending = rpointer != fifo_wr_pointers_outr_r; // only look at the current page different pages will trigger page increment first
 //    assign pre_cmd_seq_w = commands_pending & ~(|page_r_inc) & seq_enrun;
-    assign pre_cmd_seq_w = commands_pending & ~(|page_r_inc) & seq_enrun && !ren[0]; // counter lags
+//    assign pre_cmd_seq_w = commands_pending & ~(|page_r_inc) & seq_enrun && !ren[0]; // counter lags
+    assign pre_cmd_seq_w = commands_pending & ~(|page_r_inc) & seq_enrun && !read_busy[0]; // counter lags
 //    
     assign valid = valid_r;
     
@@ -285,7 +289,8 @@ module  cmd_frame_sequencer#(
         
         fifo_wr_pointers_outr_r <= fifo_wr_pointers_outr; // just register write pointer for the read page 
         page_r_inc <= {page_r_inc[0],
-                      (~read_busy[0] | conf_send) & // not busy or will not be busy next cycle (when page_r_inc active)
+//                      (~read_busy[0] | conf_send_r) & // not busy or will not be busy next cycle (when page_r_inc active)
+                      (~read_busy[0] | conf_send_w) & // not busy or will not be busy next cycle (when page_r_inc active)
                       ~(|page_r_inc) & // read_page was not just incremented, so updated read pointer had a chance to propagate
                        (rpointer == fifo_wr_pointers_outr_r) & // nothing left in the frame FIFO pointed  page_r
                        (page_r != wpage_asap)};  // the page commands are taken from is not the ASAP (current) page
@@ -297,12 +302,13 @@ module  cmd_frame_sequencer#(
         if      (!por[1] || reset_on || page_r_inc[0]) rpointer <= 0; // TODO: move to rst ?
         else if (ren[0])                               rpointer <= rpointer + 1;
         
-        conf_send <= valid && ackn;
+        conf_send_r <= conf_send_w; // valid && ackn;
 
 //        if (reset_on || reset_cmd) read_busy <= 0;
         if (!por[1] || reset_on) read_busy <= 0;
         else                     read_busy <= {read_busy[0],
-                                               read_busy[0]? (~conf_send) : pre_cmd_seq_w};
+//                                               read_busy[0]? (~conf_send_r) : pre_cmd_seq_w};
+                                               read_busy[0]? (~conf_send_w) : pre_cmd_seq_w};
         ren <= {ren[0], pre_cmd_seq_w};
 // TODO: check generation of the reset sequence