Commit 93daca63 authored by Andrey Filippov's avatar Andrey Filippov
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More registered programmed for C export

parent 126a6ce8
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+1 −1
Original line number Original line Diff line number Diff line
@@ -73,7 +73,7 @@ class X393CmprsAfi(object):
                                  0: disable status generation,
                                  0: disable status generation,
                                  1: single status request,
                                  1: single status request,
                                  2: auto status, keep specified seq number,
                                  2: auto status, keep specified seq number,
                                  4: auto, inc sequence number 
                                  3: auto, inc sequence number 
        @param seq_number - 6-bit sequence number of the status message to be sent
        @param seq_number - 6-bit sequence number of the status message to be sent
        
        
        """
        """
+393 −38

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+10 −9
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@@ -71,12 +71,13 @@ module camsync393 #(
    input                         mrst,        // @ posedge mclk - sync reset
    input                         mrst,        // @ posedge mclk - sync reset
    input                   [7:0] cmd_ad,      // byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3 
    input                   [7:0] cmd_ad,      // byte-serial command address/data (up to 6 bytes: AL-AH-D0-D1-D2-D3 
    input                         cmd_stb,     // strobe (with first byte) for the command a/d
    input                         cmd_stb,     // strobe (with first byte) for the command a/d
                           // 0 - mode: [1:0] +2 - reset ts_snd_en, +3 - set ts_snd_en - enable sending timestamp over sync line
                           // 0 - mode: [0] - enable module, 0 reset
                           //           [3:2] +8 - reset ts_external, +'hc - set ts_external:
                           //           [2:1] +4 - reset ts_snd_en, +6 - set ts_snd_en - enable sending timestamp over sync line
                           //           [4:3] +0x10 - reset ts_external, +'hc - set ts_external:
                           //                  1 - use external timestamp, if available. 0 - always use local ts
                           //                  1 - use external timestamp, if available. 0 - always use local ts
                           //           [5:4] +'h20 - reset triggered mode (free running sensor), +'h30 - set sensor triggered mode
                           //           [6:5] +'h40 - reset triggered mode (free running sensor), +'h30 - set sensor triggered mode
                           //           [8:6] +'h100 - set master channel (zero delay in internal trigger mode, delay used for flash output)
                           //           [9:7] +'h200 - set master channel (zero delay in internal trigger mode, delay used for flash output)
                           //          [13:9] +'h2000 - set which channels to generate timestamp mesages
                           //         [14:10] +'h4000 - set which channels to generate timestamp messages
                           // UPDATE now di-bit "01" means "keep" (00 - do not use, 01 - keep, 10 set active 0, 11 - set active 1)
                           // UPDATE now di-bit "01" means "keep" (00 - do not use, 01 - keep, 10 set active 0, 11 - set active 1)
                           // 1 - source of trigger (10 bit pairs, LSB - level to trigger, MSB - use this bit). All 0 - internal trigger
                           // 1 - source of trigger (10 bit pairs, LSB - level to trigger, MSB - use this bit). All 0 - internal trigger
                           //     in internal mode output has variable delay from the internal trigger (relative to sensor trigger)
                           //     in internal mode output has variable delay from the internal trigger (relative to sensor trigger)
@@ -86,7 +87,7 @@ module camsync393 #(
                           //     d == 0 - disable (stop periodic mode)
                           //     d == 0 - disable (stop periodic mode)
                           //     d == 1 - single trigger
                           //     d == 1 - single trigger
                           //     d == 2..255 - set output pulse / input-output serial bit duration (no start generated)
                           //     d == 2..255 - set output pulse / input-output serial bit duration (no start generated)
                           //     256>=d - repetitive trigger
                           //     d >= 256 - repetitive trigger
                           
                           
                           // 4..7 - input trigger delay (in pclk periods) 
                           // 4..7 - input trigger delay (in pclk periods) 
    input                         pclk,           // pixel clock (global) - switch it to 100MHz (mclk/2)?
    input                         pclk,           // pixel clock (global) - switch it to 100MHz (mclk/2)?