Commit 8f2f1a21 authored by Andrey Filippov's avatar Andrey Filippov

grounded unused mosi, fpga 03930121 (vospi)

parent f8db9544
...@@ -35,7 +35,8 @@ ...@@ -35,7 +35,8 @@
* contains all the components and scripts required to completely simulate it * contains all the components and scripts required to completely simulate it
* with at least one of the Free Software programs. * with at least one of the Free Software programs.
*/ */
parameter FPGA_VERSION = 32'h03930120; // VOSPI parameter FPGA_VERSION = 32'h03930121; // VOSPI setting MOSI to low, according to DS
// parameter FPGA_VERSION = 32'h03930120; // VOSPI
// parameter FPGA_VERSION = 32'h03930108; // parallel - in master branch // parameter FPGA_VERSION = 32'h03930108; // parallel - in master branch
// parameter FPGA_VERSION = 32'h03930107; // parallel - 17.4 - restored delay after linear, fixed bug, all met // parameter FPGA_VERSION = 32'h03930107; // parallel - 17.4 - restored delay after linear, fixed bug, all met
// parameter FPGA_VERSION = 32'h03930110; //A serial - 17.4 - restored delay after linear, fixed bug, timing met // parameter FPGA_VERSION = 32'h03930110; //A serial - 17.4 - restored delay after linear, fixed bug, timing met
......
...@@ -228,8 +228,8 @@ module sens_lepton3 #( ...@@ -228,8 +228,8 @@ module sens_lepton3 #(
wire crc_reset_pclk; wire crc_reset_pclk;
wire fake_out; // wire fake_out;
wire spi_mosi_int; // not used // wire spi_mosi_int; // not used
reg out_en_r; // single paulse - single frame, level - continuous reg out_en_r; // single paulse - single frame, level - continuous
...@@ -264,8 +264,8 @@ module sens_lepton3 #( ...@@ -264,8 +264,8 @@ module sens_lepton3 #(
assign out_en_single_mclk = set_ctrl_r && data_r[VOSPI_OUT_EN_SINGL] && !mrst; assign out_en_single_mclk = set_ctrl_r && data_r[VOSPI_OUT_EN_SINGL] && !mrst;
assign crc_reset_mclk = set_ctrl_r && data_r[VOSPI_RESET_CRC] && !mrst; assign crc_reset_mclk = set_ctrl_r && data_r[VOSPI_RESET_CRC] && !mrst;
assign fake_out = set_ctrl_r && data_r[VOSPI_FAKE_OUT]; /// assign fake_out = set_ctrl_r && data_r[VOSPI_FAKE_OUT];
assign spi_mosi_int = set_ctrl_r && data_r[VOSPI_MOSI]; // not used /// assign spi_mosi_int = set_ctrl_r && data_r[VOSPI_MOSI]; // not used
assign prsts = prst | !lwir_mrst_pclk[1]; assign prsts = prst | !lwir_mrst_pclk[1];
...@@ -406,8 +406,9 @@ module sens_lepton3 #( ...@@ -406,8 +406,9 @@ module sens_lepton3 #(
) spi_mosi_i ( ) spi_mosi_i (
.O (), // output - currently not used .O (), // output - currently not used
.IO (spi_mosi), // inout I/O pad .IO (spi_mosi), // inout I/O pad
.I (spi_mosi_int), // input // .I (spi_mosi_int), // input
.T (!fake_out) // input - always off .I (1'b0), // input
.T (1'b0) // input - always off
); );
iobuf #( // spi_cs iobuf #( // spi_cs
......
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