correcting histograms to system memory transfer

        else if ( burst_done_w && !page_sent_mclk) pages_in_buf_wr <= pages_in_buf_wr + 1;

        else if (!burst_done_w &&  page_sent_mclk) pages_in_buf_wr <= pages_in_buf_wr - 1;

//        grant <= en && rq_in && !buf_full && (!started || busy_r); // delay grant until chn_sel is set (first cycle of started)

        grant <= en && rq_in && !buf_full && (grant || busy_r); // delay grant until chn_sel is set (first cycle of started)

//        grant <= en && rq_in && !buf_full && (grant || busy_r); // delay grant until chn_sel is set (first cycle of started)

        grant <= en && rq_in && !dav_r && !buf_full && (grant || busy_r); // delay grant until chn_sel is set (first cycle of started)

        if (!en) chn_grant <= 0;

[*]

[*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI

[*] Tue Nov 22 04:53:52 2016

[*] GTKWave Analyzer v3.3.78 (w)1999-2016 BSI

[*] Mon Jan  9 07:36:22 2017

[*]

[dumpfile] "/home/eyesis/git/x393-neon/simulation/x393_dut-20161121203439871.fst"

[dumpfile_mtime] "Tue Nov 22 04:52:55 2016"

[dumpfile_size] 442146667

[dumpfile] "/home/eyesis/git/x393-neon/simulation/x393_dut-20170108183700100.fst"

[dumpfile_mtime] "Mon Jan  9 02:25:11 2017"

[dumpfile_size] 322665780

[savefile] "/home/eyesis/git/x393-neon/cocotb/x393_cocotb_03.sav"

[timestart] 0

[timestart] 123600000

[size] 1814 1171

[pos] 0 0

*-26.832495 36980000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

*-25.086031 251800000 212597388 212637388 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1

[treeopen] x393_dut.

[treeopen] x393_dut.simul_sensor12bits_2_i.

[treeopen] x393_dut.simul_sensor12bits_3_i.

[treeopen] x393_dut.simul_sensor12bits_i.

[treeopen] x393_dut.x393_i.

[treeopen] x393_dut.x393_i.compressor393_i.

[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].

[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.

[treeopen] x393_dut.x393_i.compressor393_i.cmprs_channel_block[0].jp_channel_i.cmprs_frame_sync_i.

[treeopen] x393_dut.x393_i.event_logger_i.i_nmea_decoder.

[treeopen] x393_dut.x393_i.event_logger_i.i_rs232_rcv.

[treeopen] x393_dut.x393_i.frame_sequencer_block[0].cmd_frame_sequencer_i.

[treeopen] x393_dut.x393_i.mcntrl393_i.

[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].

[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[0].mcntrl_tiled_rd_compressor_i.

[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[1].

[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[3].

[treeopen] x393_dut.x393_i.mcntrl393_i.sens_comp_block[3].mcntrl_tiled_rd_compressor_i.

[treeopen] x393_dut.x393_i.mult_saxi_wr_i.mult_saxi_wr_pointers_i.

[treeopen] x393_dut.x393_i.mult_saxi_wr_inbuf_i.

[treeopen] x393_dut.x393_i.sensors393_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].

[treeopen] x393_dut.x393_i.sensors393_i.histogram_saxi_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_sync_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.genblk1.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.genblk1.sens_histogram_0_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_histogram_mux_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sensor_i2c_io_i.sensor_i2c_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[1].

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_sync_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[2].

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.sens_sync_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[3].

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.

[treeopen] x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.sens_sync_i.

[treeopen] x393_dut.x393_i.timing393_i.

[treeopen] x393_dut.x393_i.timing393_i.camsync393_i.

[treeopen] x393_dut.x393_i.timing393_i.camsync393_i.i_frsync_pclk0.

[sst_width] 388

[signals_width] 349

[sst_width] 465

[signals_width] 300

[sst_expanded] 1

[sst_vpaned_height] 486

@820

-group_end

@1401200

-gpio

@800200

-histograms

@28

x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_start_burst_w

@c00022

x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

@28

(0)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(1)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(2)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(3)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(4)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(5)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(6)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(7)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(8)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(9)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(10)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(11)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(12)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(13)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(14)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(15)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(16)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(17)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(18)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(19)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(20)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(21)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(22)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(23)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(24)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(25)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(26)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(27)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(28)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(29)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(30)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

(31)x393_dut.x393_i.sensors393_i.histogram_saxi_i.saxi_awaddr[31:0]

@1401200

-group_end

@200

-

@28

x393_dut.x393_i.sensors393_i.histogram_saxi_i.en

x393_dut.x393_i.sensors393_i.histogram_saxi_i.rq_in

x393_dut.x393_i.sensors393_i.histogram_saxi_i.buf_full

x393_dut.x393_i.sensors393_i.histogram_saxi_i.busy_r

@8022

x393_dut.x393_i.sensors393_i.histogram_saxi_i.pages_in_buf_wr[2:0]

x393_dut.x393_i.sensors393_i.histogram_saxi_i.pages_in_buf_rd[2:0]

@28

x393_dut.x393_i.sensors393_i.histogram_saxi_i.grant

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_chn0[1:0]

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_chn1[1:0]

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_chn2[1:0]

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_chn3[1:0]

@22

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_data0[31:0]

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_data1[31:0]

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_data2[31:0]

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_data3[31:0]

@28

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_dvalid0

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_dvalid1

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_dvalid2

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_dvalid3

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_grant0

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_grant1

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_grant2

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_grant3

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_request0

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_request1

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_request2

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_request3

@22

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_start_addr[31:10]

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_start_page_r[19:0]

x393_dut.x393_i.sensors393_i.histogram_saxi_i.inter_buf_data[31:0]

@c00022

x393_dut.x393_i.sensors393_i.histogram_saxi_i.burst[2:0]

@28

(0)x393_dut.x393_i.sensors393_i.histogram_saxi_i.burst[2:0]

(1)x393_dut.x393_i.sensors393_i.histogram_saxi_i.burst[2:0]

(2)x393_dut.x393_i.sensors393_i.histogram_saxi_i.burst[2:0]

@1401200

-group_end

@28

x393_dut.x393_i.sensors393_i.histogram_saxi_i.busy_w

x393_dut.x393_i.sensors393_i.histogram_saxi_i.busy_r

x393_dut.x393_i.sensors393_i.histogram_saxi_i.started

x393_dut.x393_i.sensors393_i.histogram_saxi_i.start_w

@22

x393_dut.x393_i.sensors393_i.histogram_saxi_i.pri_rq[3:0]

x393_dut.x393_i.sensors393_i.histogram_saxi_i.enc_rq[2:0]

@28

x393_dut.x393_i.sensors393_i.histogram_saxi_i.hist_request0

x393_dut.x393_i.sensors393_i.histogram_saxi_i.mux_sel[1:0]

@22

x393_dut.x393_i.sensors393_i.histogram_saxi_i.chn_sel[3:0]

x393_dut.x393_i.sensors393_i.histogram_saxi_i.chn_grant[3:0]

@c00022

x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

@28

(0)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

(1)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

(2)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

(3)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

(4)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

(5)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

(6)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

(7)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

@1401200

-group_end

@c08022

x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

@28

(0)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

(1)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

(2)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

(3)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

(4)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

(5)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

(6)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

(7)x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wa[7:0]

@1401200

-group_end

@22

x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wr[1:0]

@8022

x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_wr[1:0]

@28

x393_dut.x393_i.sensors393_i.histogram_saxi_i.dav_r

x393_dut.x393_i.sensors393_i.histogram_saxi_i.buf_full

x393_dut.x393_i.sensors393_i.histogram_saxi_i.dav

@8028

x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_rd[1:0]

@8022

x393_dut.x393_i.sensors393_i.histogram_saxi_i.page_ra[7:0]

@200

-sens_histogram_mux

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_histogram_mux_i.dv

x393_dut.x393_i.sensors393_i.sensor_channel_block[1].sensor_channel_i.sens_histogram_mux_i.dv

x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.sens_histogram_mux_i.dv

x393_dut.x393_i.sensors393_i.sensor_channel_block[3].sensor_channel_i.sens_histogram_mux_i.dv

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_histogram_mux_i.dav_out

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_histogram_mux_i.start_w

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_histogram_mux_i.mux_sel[1:0]

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_histogram_mux_i.enc_rq[2:0]

@22

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_histogram_mux_i.pri_rq[3:0]

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_histogram_mux_i.dav0

@22

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.sens_histogram_mux_i.chn_grant[3:0]

@200

-

-sens_histogram_singl_chn2

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_grant

x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_out

x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.en_rq_start

x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_rq_r

@800023

x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_re[2:0]

@29

(0)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_re[2:0]

(1)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_re[2:0]

(2)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_re[2:0]

@1001203

-group_end

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_re_even

x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_re_odd

@808022

x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

@28

(0)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(1)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(2)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(3)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(4)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(5)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(6)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(7)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(8)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(9)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

@1009202

-group_end

@c08022

x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

@28

(0)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(1)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(2)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(3)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(4)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(5)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(6)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(7)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(8)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

(9)x393_dut.x393_i.sensors393_i.sensor_channel_block[2].sensor_channel_i.genblk1.sens_histogram_0_i.hist_raddr[9:0]

@1401200

-group_end

@200

-sens_histogram_snglclk

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.genblk1.sens_histogram_0_i.hist_dv

@22

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.genblk1.sens_histogram_0_i.hist_re[2:0]

@28

x393_dut.x393_i.sensors393_i.sensor_channel_block[0].sensor_channel_i.genblk1.sens_histogram_0_i.hist_out

@1000200

-histograms

@c00200

-event_logger

@22

x393_dut.IMU_TAPS[5:1]

@1401200

-IMU_

@800200

@c00200

-camsync_ext_int

@c00022

x393_dut.x393_i.timing393_i.camsync393_i.gpio_in[9:0]

@28

x393_dut.x393_i.timing393_i.camsync393_i.trigger_condition

x393_dut.x393_i.timing393_i.camsync393_i.trigger_condition_filtered

@29

x393_dut.x393_i.timing393_i.camsync393_i.rcv_run_or_deaf

@28

x393_dut.x393_i.timing393_i.camsync393_i.ext_int_mode_pclk

x393_dut.x393_i.timing393_i.camsync393_i.triggered_mode

@22

-group_end

-group_end

-group_end

@1000200

@1401200

-camsync_ext_int

@800200

-sequencers_0

 * contains all the components and scripts required to completely simulate it

 * with at least one of the Free Software programs.

 */

        parameter FPGA_VERSION =          32'h039300d8;      //parallel - SATA is now logging irq on/off -0.054 /16, 80.50%

        parameter FPGA_VERSION =          32'h039300d9;      //parallel - correcting histograms -0.022/1, 79.60%

//      parameter FPGA_VERSION =          32'h039300d8;      //parallel - SATA is now logging irq on/off -0.054 /16, 80.50%

//      parameter FPGA_VERSION =          32'h039300d7;      //parallel - updated SATA (v12) all met, 80.32%

//      parameter FPGA_VERSION =          32'h039300d6;      //parallel - more SATA debug link layer -0.127/18, 80.03% -> -0.002/4, 80.26%

//      parameter FPGA_VERSION =          32'h039300d5;      //parallel - more SATA debug (v.0xd) -0.021/8 80.20 %

jpeg_sim_multi 4

################## Simulate Parallel 18 - debugging histograms  ####################

./py393/test_mcntrl.py @py393/cocoargs  --simulated=localhost:7777

measure_all "*DI"

setup_all_sensors True None 0xf

#set_sensor_io_ctl  all None None 1 # Set ARO low - check if it is still needed?

#use EOF instead of SOF for i2c sequencer advance

set_sensor_i2c_command  all  False  None  None  None None None None True

#just testing

set_gpio_ports  1   1 # enable software gpio pins and porta (camsync)

set_gpio_pins 0 1 # pin 0 low, pin 1 - high

set_logger_params_file "/home/eyesis/git/x393-neon/attic/imu_config.bin"

##### write_control_register 0x480  0x400 # disable sensor chn 2

reset_camsync_inout 1 # reset all outputs

set_camsync_period 31 # set bit duration

set_camsync_period  0 # disable

set_camsync_delay 0 400

set_camsync_delay 1 300

set_camsync_delay 2 200

set_camsync_delay 3 150

#set_camsync_inout  <is_out>  <bit_number>  <active_positive>

###set_camsync_inout  1  8  0

###set_camsync_inout  0  7  0

reset_camsync_inout  0 # start with internal trigger

#set_camsync_mode  <en=None>  <en_snd=None>  <en_ts_external=None>  <triggered_mode=None>  <master_chn=None>  <chn_en=None> 

set_camsync_mode  1 1 1 1 0 0xf

set_camsync_period  0 # so next setting period will immadiately trigger

set_camsync_period  8000 # 80 usec #and issue first trigger

##set_sensor_histogram_window  0  0  4  4  25 21

##set_sensor_histogram_window  1  0  4  4  41 21

##set_sensor_histogram_window  2  0  4  4  25 41

##set_sensor_histogram_window  3  0  4  4  41 41

set_sensor_histogram_window  0  0  4  4  41 21

set_sensor_histogram_window  1  0  4  4  41 41

set_sensor_histogram_window  2  0  4  4  41 41

set_sensor_histogram_window  3  0  4  4  41 41

r

read_control_register 0x430

read_control_register 0x431

write_cmd_frame_sequencer  0  1  2  0x600  0x48   # compressor q page = 1 // too late for frame 2

set_qtables 0 0 80

set_qtables 0 1 70

#irq coming, image not changing - yes

###write_cmd_frame_sequencer  0  1  1 0x686 0x280005 #save 4 more lines than sensor has                                                                                                                                    

write_cmd_frame_sequencer  0  1  1 0x680 0x5507 #enable abort

#write_cmd_frame_sequencer  0  1  1 0x6c6 0x300006 #save 4 more lines that compressor has                                                                                                                                    

###write_cmd_frame_sequencer  0  1  2  0x600  0x5    #stop    compressor           `      

###write_cmd_frame_sequencer  0  1  2  0x680  0x5405 # stop  sensor memory         (+0) // sensor memory should be controlled first, (9 commands

###write_cmd_frame_sequencer  0  1  2  0x6c0  0x5c49 # stop compressor memory      (+0)

###write_cmd_frame_sequencer  0  1  3 0x686 0x240005 # correct lines                                                                                                   

###write_cmd_frame_sequencer  0  1  3  0x680  0x5507 # run sensor memory           (+1) Can not be 0

###write_cmd_frame_sequencer  0  1  4 0x686 0x280005 #save 4 more lines than sensor has                                                                                                                                    

###write_cmd_frame_sequencer  0  1  4 0x6c6 0x300006 #save more lines than compressor needs (sensor provides)                                                                                                                                    

###write_cmd_frame_sequencer  0  1  4  0x6c0  0x7d4b # run compressor memory       (+2)

###write_cmd_frame_sequencer  0  1  4  0x600  0x7    # run compressor              (+0)

write_cmd_frame_sequencer  0  1  1  0x600  0x48   # compressor q page = 1

write_cmd_frame_sequencer  0  1  4  0x600  0x40   # compressor q page = 0

read_control_register 0x431

read_control_register 0x430

#testing histograms

write_control_register 0x409 0xc0

#set_sensor_io_dly_hispi all 0x48 0x68 0x68 0x68 0x68

#set_sensor_io_ctl all None None None None None 1 None # load all delays?

compressor_control  all  None  None  None None None  2

compressor_interrupt_control all clr

compressor_interrupt_control all en

compressor_control  all  3

r

read_status 0x21

r

jpeg_sim_multi 4

###set_camsync_period  9000 # 90 usec # change period, skip first trigger

set_camsync_delay 0 400

set_camsync_delay 1 300

set_camsync_delay 2 200

set_camsync_delay 3 100

r

read_status 0x21

r

###jpeg_sim_multi 3

jpeg_sim_multi 4

r

read_status 0x21

r

set_camsync_delay 0 400

set_camsync_delay 1 350

set_camsync_delay 2 200

set_camsync_delay 3 50

##write_cmd_frame_sequencer  0  1  1 0x686 0x240005 # correct lines                                                                                                   

##write_cmd_frame_sequencer  0  1  1 0x6c6 0x200006 # correct lines                                                                                                                                    

##write_cmd_frame_sequencer  0  1  1  0x680  0x5507 # run sensor memory, update frame#, reset buffers

##write_cmd_frame_sequencer  0  1  1  0x6c0  0x7d4b # run compressor memory

##write_cmd_frame_sequencer  0  1  1  0x600  0x7    # run compressor

#switch to external (wired) trigger

jpeg_sim_multi 4

set_camsync_delay 0 400

set_camsync_delay 1 400

set_camsync_delay 2 200

set_camsync_delay 3 0

### set_camsync_inout  0  9  0 # external/internal trigger mode

###switch to external (wired) trigger

##set_camsync_inout  0  7  0

jpeg_sim_multi 4

#set_camsync_mode  <en=None>  <en_snd=None>  <en_ts_external=None>  <triggered_mode=None>  <master_chn=None>  <chn_en=None> 

jpeg_sim_multi 8

###set_camsync_period  8000 # 80 usec - restart while waiting for external trigger

jpeg_sim_multi 4

jpeg_sim_multi 4

################## Serial ####################

        // prevent starting rq if grant is still on (back-to-back)

        if      (!hist_out)   en_rq_start <= 0;

        else if (!hist_grant) en_rq_start <= 1;

        hist_rq_r <= !hist_rst & en_mclk && hist_out && !(&hist_raddr) && en_rq_start;

        if      (!hist_out || (&hist_raddr[7:0])) hist_re[0] <= 0;