updated both bitstreams with corrected sensors memory buffer interfacing

.settings/com.elphel.vdt.VivadoBitstream.prefs

@@ -3,6 +3,6 @@ VivadoBitstream_105_force=true
 VivadoBitstream_122_PreBitstreamTCL=set_property "BITSTREAM.STARTUP.MATCH_CYCLE" NoWait [current_design]<-@\#\#@->
 VivadoBitstream_123_PreBitstreamTCL=set_property "BITSTREAM.STARTUP.MATCH_CYCLE" NoWait [current_design]<-@\#\#@->
 VivadoBitstream_124_force=true
-VivadoBitstream_124_rawfile=x393_hispi
+VivadoBitstream_124_rawfile=x393_parallel
 com.elphel.store.context.VivadoBitstream=VivadoBitstream_105_force<-@\#\#@->VivadoBitstream_103_PreBitstreamTCL<-@\#\#@->VivadoBitstream_124_force<-@\#\#@->VivadoBitstream_122_PreBitstreamTCL<-@\#\#@->VivadoBitstream_123_PreBitstreamTCL<-@\#\#@->VivadoBitstream_124_rawfile<-@\#\#@->
 eclipse.preferences.version=1

fpga_version.vh

@@ -31,8 +31,9 @@
  * contains all the components and scripts required to completely simulate it
  * with at least one of the Free Software programs.
  *******************************************************************************/
- 
-        parameter FPGA_VERSION =          32'h03930093;    // hispi, masking sesnor data to memory buffer, debug still on
+          parameter FPGA_VERSION =          32'h03930095;    // parallel  -0.068/-0.342/5 82.38%
+//          parameter FPGA_VERSION =          32'h03930094;    // hispi, disabling debug  -0.187/-1.252/16 84.14%  
+//        parameter FPGA_VERSION =          32'h03930093;    // hispi, masking sensor data to memory buffer, debug still on
 //        parameter FPGA_VERSION =          32'h03930092;    // hispi, even more debugging memory pages sens-> memory
 //        parameter FPGA_VERSION =          32'h03930091;    // hispi, more debugging memory pages sens-> memory
 //        parameter FPGA_VERSION =          32'h03930090;    // hispi, debugging memory pages sens-> memory (not met)

system_defines.vh

@@ -48,14 +48,14 @@
   `define PRELOAD_BRAMS
   `define DISPLAY_COMPRESSED_DATA  
   // if HISPI is not defined, parallel sensor interface is used for all channels
-  `define HISPI /*************** CHANGE here and x393_hispi/x393_parallel in bitstream tool settings ****************/
+//  `define HISPI /*************** CHANGE here and x393_hispi/x393_parallel in bitstream tool settings ****************/
 //    `define USE_OLD_XDCT393  
 //  `define USE_PCLK2X
 //  `define USE_XCLK2X
   `define REVERSE_LANES 1
   `define DEBUG_RING 1
   
-  `define DEBUG_SENS_MEM_PAGES 1   
+//  `define DEBUG_SENS_MEM_PAGES 1   
 //  `define MCLK_VCO_MULT 16
 // DDR3 memory speed grade and density
     `define sg25 1