Made new (single-clock) compressor output match the old (two clocks) one (802a2f02) · Commits · Elphel / x393

compressor_jp/bit_stuffer_27_32.v

+2 −1

Original line number	Original line	Diff line number	Diff line
	@@ -133,7 +133,8 @@ module bit_stuffer_27_32#(
	end		end
	// dv <= (ds_stage[1] && dlen2[5]) \|\| (flush_stage[1] && !(\|data3[DATA3_LEN-1 -: 32]));		// dv <= (ds_stage[1] && dlen2[5]) \|\| (flush_stage[1] && !(\|data3[DATA3_LEN-1 -: 32]));
	// dv <= (ds_stage[1] && dlen1[5]) \|\| (flush_stage[1] && !(\|data3[DATA3_LEN-1 -: 32]));		// dv <= (ds_stage[1] && dlen1[5]) \|\| (flush_stage[1] && !(\|data3[DATA3_LEN-1 -: 32]));
	dv <= (ds_stage[0] && dlen1[5]) \|\| (flush_stage[1] && !(\|data3[DATA3_LEN-1 -: 32]));		// dv <= (ds_stage[0] && dlen1[5]) \|\| (flush_stage[1] && !(\|data3[DATA3_LEN-1 -: 32]));
			dv <= (ds_stage[0] && dlen1[5]) \|\| (flush_stage[1] && (\|data3[DATA3_LEN-1 -: 32]));

	if (rst \|\| ds_stage[1]) bytes_out <= 0; // if the dv was caused by 32 bits full - output 4 bytes		if (rst \|\| ds_stage[1]) bytes_out <= 0; // if the dv was caused by 32 bits full - output 4 bytes
	else if (flush_stage[1]) bytes_out <= pre_bits_out_w[4:3];		else if (flush_stage[1]) bytes_out <= pre_bits_out_w[4:3];

compressor_jp/bit_stuffer_metadata.v

+7 −7

Original line number	Original line	Diff line number	Diff line
	@@ -95,17 +95,17 @@ module bit_stuffer_metadata(
	else if (ts_rstb) ts_in <= 0;		else if (ts_rstb) ts_in <= 0;
	else if (!ts_in[3]) ts_in <= ts_in + 1;		else if (!ts_in[3]) ts_in <= ts_in + 1;

	if ((ts_in[3] && (ts_in[1:0] == 0)) \|\| write_size) time_ram0[ts_in[3:2]] <= ts_in[3]? ({imgsz4[5:0],flush?2'b0:bytes_in}):ts_dout; //ts_in[3:2] == 2'b10 when write_size		if ((!ts_in[3] && (ts_in[1:0] == 0)) \|\| write_size) time_ram0[ts_in[3:2]] <= ts_in[3]? ({imgsz4[5:0],flush?2'b0:bytes_in}):ts_dout; //ts_in[3:2] == 2'b10 when write_size
	if ((ts_in[3] && (ts_in[1:0] == 1)) \|\| write_size) time_ram1[ts_in[3:2]] <= ts_in[3]? (imgsz4[13:6]):ts_dout;		if ((!ts_in[3] && (ts_in[1:0] == 1)) \|\| write_size) time_ram1[ts_in[3:2]] <= ts_in[3]? (imgsz4[13:6]):ts_dout;
	if ((ts_in[3] && (ts_in[1:0] == 2)) \|\| write_size) time_ram2[ts_in[3:2]] <= ts_in[3]? (imgsz4[21:14]):ts_dout;		if ((!ts_in[3] && (ts_in[1:0] == 2)) \|\| write_size) time_ram2[ts_in[3:2]] <= ts_in[3]? (imgsz4[21:14]):ts_dout;
	if ((ts_in[3] && (ts_in[1:0] == 3)) \|\| write_size) time_ram3[ts_in[3:2]] <= ts_in[3]? (8'hff):ts_dout;		if ((!ts_in[3] && (ts_in[1:0] == 3)) \|\| write_size) time_ram3[ts_in[3:2]] <= ts_in[3]? (8'hff):ts_dout;

	if (xrst) trailer <= 0;		if (xrst) trailer <= 0;
	else if (flush \|\| force_flush) trailer <= 1;		else if (flush \|\| force_flush) trailer <= 1;
	else if (trailer_done) trailer <= 0;		else if (trailer_done) trailer <= 0;

	if (xrst) meta_out <= 0;		if (xrst) meta_out <= 0;
	else if ((flush \|\| trailer) && (imgsz4[2:0] == 4)) meta_out <= 1;		else if (trailer && (imgsz4[2:0] == 4) &&!zeros_out) meta_out <= 1;
	else if (meta_last) meta_out <= 0;		else if (meta_last) meta_out <= 0;

	if (!meta_out) meta_word <= 0;		if (!meta_out) meta_word <= 0;

compressor_jp/huffman_snglclk.v

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -165,7 +165,7 @@ module huffman_snglclk (
	else active_r <= active_r >> 1;		else active_r <= active_r >> 1;

	if (rst) flush_r <= 0;		if (rst) flush_r <= 0;
	else flush_r <= ready_to_flush && !active;		else flush_r <= ready_to_flush && !active && !flush_r;

	end		end

compressor_jp/jp_channel.v

+40 −0

Original line number	Original line	Diff line number	Diff line
	@@ -1126,6 +1126,31 @@ module jp_channel#(
	,.test_cntr1(test_cntr1[7:0])		,.test_cntr1(test_cntr1[7:0])
	`endif		`endif
	);		);
			`ifdef DISPLAY_COMPRESSED_DATA
			integer dbg_stuffer_word_number;
			reg dbg_odd_stuffer_dv;
			reg [15:0] dbg_even_stuffer_do;
			wire [31:0] dbg_stuffer_do32 = {dbg_even_stuffer_do, stuffer_do};
			always @ (negedge xclk2x) begin

			if (stuffer_dv && dbg_odd_stuffer_dv) begin
			$display ("COMPRESSOR CHN%d 0x%x -> 0x%x", CMPRS_NUMBER, dbg_stuffer_word_number, dbg_stuffer_do32);
			end

			if (stuffer_done) begin
			$display ("COMPRESSOR CHN%d *** DONE ***",CMPRS_NUMBER);
			end

			if (stuffer_dv && !dbg_odd_stuffer_dv) dbg_even_stuffer_do = stuffer_do;

			if (!stuffer_en \|\| stuffer_done) dbg_stuffer_word_number = 0;
			else if (stuffer_dv && dbg_odd_stuffer_dv) dbg_stuffer_word_number = dbg_stuffer_word_number + 1;

			if (!stuffer_en) dbg_odd_stuffer_dv = 0;
			else if (stuffer_dv) dbg_odd_stuffer_dv = ~dbg_odd_stuffer_dv;

			end
			`endif

	// Debugging - attaching new compressor module in parallel to the existing one		// Debugging - attaching new compressor module in parallel to the existing one
	wire [31:0] alt_stuffer_do; // SuppressThisWarning VEditor Unused		wire [31:0] alt_stuffer_do; // SuppressThisWarning VEditor Unused
	@@ -1162,7 +1187,22 @@ module jp_channel#(
	`endif		`endif
	);		);

			`ifdef DISPLAY_COMPRESSED_DATA
			integer alt_stuffer_word_number;
			always @ (posedge xclk) begin
			if (alt_stuffer_dv) begin
			$display ("COMPRESSOR32 CHN%d 0x%x -> 0x%x", CMPRS_NUMBER, alt_stuffer_word_number, alt_stuffer_do);
			end
			if (alt_stuffer_done) begin
			$display ("COMPRESSOR32 CHN%d *** DONE ***",CMPRS_NUMBER);
			end
			if (!stuffer_en \|\| alt_stuffer_done) alt_stuffer_word_number = 0;
			else if (alt_stuffer_dv) alt_stuffer_word_number = alt_stuffer_word_number + 1;
			end

			//CMPRS_NUMBER
			`endif
			//cat x393_testbench03-latest.log \| grep "COMPRESSOR[32 ]*CHN" > compressors_out32.log

	/*		/*
	,output dbg_ts_rstb		,output dbg_ts_rstb

system_defines.vh

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -2,6 +2,7 @@
	`ifndef SYSTEM_DEFINES		`ifndef SYSTEM_DEFINES
	`define SYSTEM_DEFINES		`define SYSTEM_DEFINES
	`define PRELOAD_BRAMS		`define PRELOAD_BRAMS
			`define DISPLAY_COMPRESSED_DATA
	// if HISPI is not defined, parallel sensor interface is used for all channels		// if HISPI is not defined, parallel sensor interface is used for all channels
	`define HISPI		`define HISPI

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