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Commit 74bffdd3 authored by Andrey Filippov's avatar Andrey Filippov
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Matched mclt16x16_bayer with more java data

parent 1db76b02
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dsp/mclt16x16_bayer.v
View file @ 74bffdd3
...@@ -99,10 +99,13 @@ module mclt16x16_bayer#( ...@@ -99,10 +99,13 @@ module mclt16x16_bayer#(
reg [SHIFT_WIDTH-1:0] y_shft_r3; // registered @ start_dtt reg [SHIFT_WIDTH-1:0] y_shft_r3; // registered @ start_dtt
reg [SHIFT_WIDTH-1:0] x_shft_r4; // registered @ dtt_start_first_fill reg [SHIFT_WIDTH-1:0] x_shft_r4; // registered @ dtt_start_first_fill
reg [SHIFT_WIDTH-1:0] y_shft_r4; // registered @ dtt_start_first_fill reg [SHIFT_WIDTH-1:0] y_shft_r4; // registered @ dtt_start_first_fill
reg [SHIFT_WIDTH-1:0] x_shft_r5; // registered @ dtt_start_first_fill
reg [SHIFT_WIDTH-1:0] y_shft_r5; // registered @ dtt_start_first_fill
reg inv_checker_r; reg inv_checker_r;
reg inv_checker_r2; reg inv_checker_r2;
reg inv_checker_r3; reg inv_checker_r3;
reg inv_checker_r4; reg inv_checker_r4;
reg inv_checker_r5;
wire [1:0] signs; //!< bit 0: sign to add to dtt-cc input, bit 1: sign to add to dtt-cs input wire [1:0] signs; //!< bit 0: sign to add to dtt-cc input, bit 1: sign to add to dtt-cs input
wire [6:0] phases; //!< other signals wire [6:0] phases; //!< other signals
...@@ -157,7 +160,7 @@ module mclt16x16_bayer#( ...@@ -157,7 +160,7 @@ module mclt16x16_bayer#(
end end
start_r <= {start_r[0], start}; start_r <= {start_r[0], start};
if (start_r[1]) begin // same latency as mpix_a_w if (start_r[1]) begin // same latency as mpix_a_w
x_shft_r2 <= x_shft_r; // use for the window x_shft_r2 <= x_shft_r;
y_shft_r2 <= y_shft_r; y_shft_r2 <= y_shft_r;
inv_checker_r2 <= inv_checker_r; inv_checker_r2 <= inv_checker_r;
end end
...@@ -174,6 +177,13 @@ module mclt16x16_bayer#( ...@@ -174,6 +177,13 @@ module mclt16x16_bayer#(
inv_checker_r4 <= inv_checker_r3; inv_checker_r4 <= inv_checker_r3;
end end
if (dtt_start_second_fill) begin
x_shft_r5 <= x_shft_r4;
y_shft_r5 <= y_shft_r4;
inv_checker_r5 <= inv_checker_r4;
end
// if (!phases[14]) dtt_in_cntr <= 0; // if (!phases[14]) dtt_in_cntr <= 0;
if (!dtt_we) dtt_in_cntr <= 0; if (!dtt_we) dtt_in_cntr <= 0;
else dtt_in_cntr <= dtt_in_cntr + 1; else dtt_in_cntr <= dtt_in_cntr + 1;
...@@ -374,7 +384,8 @@ module mclt16x16_bayer#( ...@@ -374,7 +384,8 @@ module mclt16x16_bayer#(
.rst (rst), // input .rst (rst), // input
.start (dtt_start), // input .start (dtt_start), // input
.mode ({dtt_mode, 1'b0}), // input[1:0] for checker-board: only 2 of 4 modes (CC, SC) .mode ({dtt_mode, 1'b0}), // input[1:0] for checker-board: only 2 of 4 modes (CC, SC)
.xin (dtt_r_data), // input[24:0] signed // .xin (dtt_r_data), // input[24:0] signed
.xin ({dtt_r_data[DTT_IN_WIDTH-1],dtt_r_data[DTT_IN_WIDTH-1:1]}), // input[24:0] signed
.pre_last_in (), // output reg .pre_last_in (), // output reg
.mode_out (), // dtt_mode_out), // output[1:0] reg .mode_out (), // dtt_mode_out), // output[1:0] reg
.pre_busy (), // output reg .pre_busy (), // output reg
...@@ -385,6 +396,7 @@ module mclt16x16_bayer#( ...@@ -385,6 +396,7 @@ module mclt16x16_bayer#(
.inc16 (dtt_inc16), // output reg .inc16 (dtt_inc16), // output reg
.start_out (dtt_start_fill) // output[24:0] signed .start_out (dtt_start_fill) // output[24:0] signed
); );
//[DTT_IN_WIDTH-1:0
// still incorrectly shows difference when filled nto sequentially // still incorrectly shows difference when filled nto sequentially
reg [8:0] dbg_last_dtt_out_ram_wa; // SuppressThisWarning VEditor : debug only signal reg [8:0] dbg_last_dtt_out_ram_wa; // SuppressThisWarning VEditor : debug only signal
wire [8:0] dbg_diff_wara_dtt_out0 = dbg_last_dtt_out_ram_wa-dtt_rd_ra0; // SuppressThisWarning VEditor : debug only signal wire [8:0] dbg_diff_wara_dtt_out0 = dbg_last_dtt_out_ram_wa-dtt_rd_ra0; // SuppressThisWarning VEditor : debug only signal
...@@ -444,9 +456,9 @@ module mclt16x16_bayer#( ...@@ -444,9 +456,9 @@ module mclt16x16_bayer#(
.rst (rst), // input .rst (rst), // input
.start (dtt_start_out[1]), // input .start (dtt_start_out[1]), // input
// are these shift OK? Will need to be valis only @ dtt_start_out // are these shift OK? Will need to be valis only @ dtt_start_out
.shift_h (x_shft_r4), // input[6:0] signed .shift_h (x_shft_r5), // input[6:0] signed
.shift_v (y_shft_r4), // input[6:0] signed .shift_v (y_shft_r5), // input[6:0] signed
.inv_checker (inv_checker_r4),// input only used for Bayer mosaic data .inv_checker (inv_checker_r5),// input only used for Bayer mosaic data
.fd_din (dtt_rd_data0), // input[24:0] signed. Expected latency = 3 from start .fd_din (dtt_rd_data0), // input[24:0] signed. Expected latency = 3 from start
.fd_out (dout0), // output[24:0] reg signed .fd_out (dout0), // output[24:0] reg signed
.pre_first_out (pre_first_out), // output reg .pre_first_out (pre_first_out), // output reg
...@@ -466,9 +478,9 @@ module mclt16x16_bayer#( ...@@ -466,9 +478,9 @@ module mclt16x16_bayer#(
.rst (rst), // input .rst (rst), // input
.start (dtt_start_out[1]), // input .start (dtt_start_out[1]), // input
// are these shift OK? Will need to be valis only @ dtt_start_out // are these shift OK? Will need to be valis only @ dtt_start_out
.shift_h (x_shft_r4), // input[6:0] signed .shift_h (x_shft_r5), // input[6:0] signed
.shift_v (y_shft_r4), // input[6:0] signed .shift_v (y_shft_r5), // input[6:0] signed
.inv_checker (inv_checker_r4),// input only used for Bayer mosaic data .inv_checker (inv_checker_r5),// input only used for Bayer mosaic data
.fd_din (dtt_rd_data1), // input[24:0] signed. Expected latency = 3 from start .fd_din (dtt_rd_data1), // input[24:0] signed. Expected latency = 3 from start
.fd_out (dout1), // output[24:0] reg signed .fd_out (dout1), // output[24:0] reg signed
.pre_first_out (), // output reg .pre_first_out (), // output reg
......
dsp/mclt_test_04.tf
View file @ 74bffdd3
...@@ -77,465 +77,26 @@ module mclt_test_04 (); ...@@ -77,465 +77,26 @@ module mclt_test_04 ();
parameter DSP_P_WIDTH = 48; parameter DSP_P_WIDTH = 48;
parameter DEAD_CYCLES = 14; // start next block immedaitely, or with longer pause parameter DEAD_CYCLES = 14; // start next block immedaitely, or with longer pause
//parameter DCT_GAP = 16; // between runs
//parameter SAME_BITS=4; // (3) to match 24-bit widths
reg RST = 1'b1; reg RST = 1'b1;
reg CLK = 1'b0; reg CLK = 1'b0;
reg [PIXEL_WIDTH-1 : 0] tile_shift[0:258]; // SuppressThisWarning VEditor : assigned in $readmem() system task
reg [PIXEL_WIDTH-1 : 0] tiles[0:1023];
reg [SHIFT_WIDTH-1 : 0] shifts_x[0:3];
reg [SHIFT_WIDTH-1 : 0] shifts_y[0:3];
reg [3 : 0] bayer[0:3];
reg [3:0] java_wnd_signs[0:255]; // SuppressThisWarning VEditor : assigned in $readmem() system task
reg [7:0] java_fold_index[0:255]; // SuppressThisWarning VEditor : assigned in $readmem() system task
reg [WND_WIDTH - 1:0] java_tiles_wnd[0:255]; // SuppressThisWarning VEditor : assigned in $readmem() system task
reg [DTT_IN_WIDTH - 1:0] java_dtt_in0[0:255]; // SuppressThisWarning VEditor : assigned in $readmem() system task
reg [WND_WIDTH - 1:0] tiles_wnd[0:1023]; // SuppressThisWarning VEditor : assigned in $readmem() system task
reg [DTT_IN_WIDTH - 1:0] java_dtt_in[0:1023]; // SuppressThisWarning VEditor : assigned in $readmem() system task
reg [DTT_IN_WIDTH - 1:0] java_dtt_out0[0:255]; // SuppressThisWarning VEditor : assigned in $readmem() system task
reg [DTT_IN_WIDTH - 1:0] java_dtt_out[0:1023]; // SuppressThisWarning VEditor : assigned in $readmem() system task
reg [DTT_IN_WIDTH - 1:0] java_dtt_rot0[0:255]; // SuppressThisWarning VEditor : assigned in $readmem() system task
reg [DTT_IN_WIDTH - 1:0] java_dtt_rot[0:1023]; // SuppressThisWarning VEditor : assigned in $readmem() system task
integer i, n, n_out;
initial begin integer i, n;
$readmemh("input_data/mclt_dtt_all_00_x1489_y951.dat", java_all);
$display("000c: %h", java_all['h000c]);
$display("01f0: %h", java_all['h01f0]);
$display("02f0: %h", java_all['h02f0]);
$display("03f0: %h", java_all['h03f0]);
$display("04f0: %h", java_all['h04f0]);
$display("05f0: %h", java_all['h05f0]);
$display("06f0: %h", java_all['h06f0]);
$display("07f0: %h", java_all['h07f0]);
$display("08f0: %h", java_all['h08f0]);
$display("09f0: %h", java_all['h09f0]);
$display("0af0: %h", java_all['h0af0]);
$display("0bf0: %h", java_all['h0bf0]);
$display("0cf0: %h", java_all['h0cf0]);
$display("0df0: %h", java_all['h0df0]);
$display("0ef0: %h", java_all['h0ef0]);
$display("0ff0: %h", java_all['h0ff0]);
$display("10f0: %h", java_all['h10f0]);
$display("11f0: %h", java_all['h11f0]);
$display("12f0: %h", java_all['h12f0]);
$readmemh("input_data/clt_wnd_signs.dat", java_wnd_signs);
$readmemh("input_data/clt_fold_index.dat", java_fold_index);
// $readmemh("input_data/tile_01.dat",tile_shift);
//============ tile 0
$readmemh("input_data/clt_tile_00_2_x1489_y951.dat",tile_shift);
shifts_x[0] = tile_shift[0][SHIFT_WIDTH-1:0];
shifts_y[0] = tile_shift[1][SHIFT_WIDTH-1:0];
bayer[0] = tile_shift[2][3:0];
for (i=0; i<256; i=i+1) begin
tiles['h000 + i] = tile_shift[i+3];
end
$readmemh("input_data/clt_wnd_00_2_x1489_y951.dat",java_tiles_wnd);
for (i=0; i<256; i=i+1) begin
tiles_wnd['h000 + i] = java_tiles_wnd[i];
end
$readmemh("input_data/clt_dtt_in_00_2_x1489_y951.dat",java_dtt_in0);
for (i=0; i<256; i=i+1) begin
java_dtt_in['h000 + i] = java_dtt_in0[i];
end
$readmemh("input_data/clt_dtt_out_00_2_x1489_y951.dat",java_dtt_out0);
for (i=0; i<256; i=i+1) begin
java_dtt_out['h000 + i] = java_dtt_out0[i];
end
$readmemh("input_data/clt_dtt_rot_00_2_x1489_y951.dat",java_dtt_rot0);
for (i=0; i<256; i=i+1) begin
java_dtt_rot['h000 + i] = java_dtt_rot0[i];
end
//============ tile 1
$readmemh("input_data/clt_tile_01_2_x1489_y951.dat",tile_shift);
shifts_x[1] = tile_shift[0][SHIFT_WIDTH-1:0];
shifts_y[1] = tile_shift[1][SHIFT_WIDTH-1:0];
bayer[1] = tile_shift[2][3:0];
for (i=0; i<256; i=i+1) begin
tiles['h100 + i] = tile_shift[i+3];
end
$readmemh("input_data/clt_wnd_01_2_x1489_y951.dat",java_tiles_wnd);
for (i=0; i<256; i=i+1) begin
tiles_wnd['h100 + i] = java_tiles_wnd[i];
end
$readmemh("input_data/clt_dtt_in_01_2_x1489_y951.dat",java_dtt_in0);
for (i=0; i<256; i=i+1) begin
java_dtt_in['h100 + i] = java_dtt_in0[i];
end
$readmemh("input_data/clt_dtt_out_01_2_x1489_y951.dat",java_dtt_out0);
for (i=0; i<256; i=i+1) begin
java_dtt_out['h100 + i] = java_dtt_out0[i];
end
$readmemh("input_data/clt_dtt_rot_01_2_x1489_y951.dat",java_dtt_rot0);
for (i=0; i<256; i=i+1) begin
java_dtt_rot['h100 + i] = java_dtt_rot0[i];
end
//============ tile 2
$readmemh("input_data/clt_tile_02_2_x1489_y951.dat",tile_shift);
shifts_x[2] = tile_shift[0][SHIFT_WIDTH-1:0];
shifts_y[2] = tile_shift[1][SHIFT_WIDTH-1:0];
bayer[2] = tile_shift[2][3:0];
for (i=0; i<256; i=i+1) begin
tiles['h200 + i] = tile_shift[i+3];
end
$readmemh("input_data/clt_wnd_02_2_x1489_y951.dat",java_tiles_wnd);
for (i=0; i<256; i=i+1) begin
tiles_wnd['h200 + i] = java_tiles_wnd[i];
end
$readmemh("input_data/clt_dtt_in_02_2_x1489_y951.dat",java_dtt_in0);
for (i=0; i<256; i=i+1) begin
java_dtt_in['h200 + i] = java_dtt_in0[i];
end
$readmemh("input_data/clt_dtt_out_02_2_x1489_y951.dat",java_dtt_out0);
for (i=0; i<256; i=i+1) begin
java_dtt_out['h200 + i] = java_dtt_out0[i];
end
$readmemh("input_data/clt_dtt_rot_02_2_x1489_y951.dat",java_dtt_rot0);
for (i=0; i<256; i=i+1) begin
java_dtt_rot['h200 + i] = java_dtt_rot0[i];
end
//============ tile 3
$readmemh("input_data/clt_tile_00_2_x1489_y951.dat",tile_shift);
shifts_x[3] = tile_shift[0][SHIFT_WIDTH-1:0];
shifts_y[3] = tile_shift[1][SHIFT_WIDTH-1:0];
bayer[3] = tile_shift[2][3:0];
for (i=0; i<256; i=i+1) begin
tiles['h300 + i] = tile_shift[i+3];
end
$readmemh("input_data/clt_wnd_00_2_x1489_y951.dat",java_tiles_wnd);
for (i=0; i<256; i=i+1) begin
tiles_wnd['h300 + i] = java_tiles_wnd[i];
end
$readmemh("input_data/clt_dtt_in_00_2_x1489_y951.dat",java_dtt_in0);
for (i=0; i<256; i=i+1) begin
java_dtt_in['h300 + i] = java_dtt_in0[i];
end
$readmemh("input_data/clt_dtt_out_00_2_x1489_y951.dat",java_dtt_out0);
for (i=0; i<256; i=i+1) begin
java_dtt_out['h300 + i] = java_dtt_out0[i];
end
$readmemh("input_data/clt_dtt_rot_00_2_x1489_y951.dat",java_dtt_rot0);
for (i=0; i<256; i=i+1) begin
java_dtt_rot['h300 + i] = java_dtt_rot0[i];
end
for (n=0;n<4;n=n+1) begin
$display("Tile %d: shift x = %h, shift_y = %h, bayer = %h", 0, shifts_x[n], shifts_y[n], bayer[n]);
for (i = 256 * n; i < 256 * (n + 1); i = i + 16) begin
$display ("%h, %h, %h, %h, %h, %h, %h, %h, %h, %h, %h, %h, %h, %h, %h, %h",
tiles[i+ 0],tiles[i+ 1],tiles[i+ 2],tiles[i+ 3],
tiles[i+ 4],tiles[i+ 5],tiles[i+ 6],tiles[i+ 7],
tiles[i+ 8],tiles[i+ 9],tiles[i+10],tiles[i+11],
tiles[i+12],tiles[i+13],tiles[i+14],tiles[i+15]);
end
$display("");
end
end
// reg start;
reg [SHIFT_WIDTH-1:0] x_shft;
reg [SHIFT_WIDTH-1:0] y_shft;
reg [3:0] bayer_r;
reg [1:0] page_in;
wire pre_busy_w;
wire pre_busy; wire pre_busy;
reg LATE = 0; reg LATE = 0;
wire mpixel_re;
wire mpixel_page;
reg mpixel_reg;
reg mpixel_valid;
wire [7:0] mpixel_a;
reg [PIXEL_WIDTH-1 : 0] pixel_r;
reg [PIXEL_WIDTH-1 : 0] pixel_r2;
wire [PIXEL_WIDTH-1 : 0] mpixel_d = mpixel_valid ? pixel_r2 : {PIXEL_WIDTH{1'bz}};
wire pre_last_in; // SuppressThisWarning VEditor - output only wire pre_last_in; // SuppressThisWarning VEditor - output only
wire pre_first_out; // SuppressThisWarning VEditor - output only wire pre_first_out; // SuppressThisWarning VEditor - output only
wire pre_last_out; // SuppressThisWarning VEditor - output only wire pre_last_out; // SuppressThisWarning VEditor - output only
wire [7:0] out_addr; // SuppressThisWarning VEditor - output only wire [7:0] out_addr; // SuppressThisWarning VEditor - output only
wire dv; // SuppressThisWarning VEditor - output only wire dv; // SuppressThisWarning VEditor - output only
wire [OUT_WIDTH-1:0] dout; // SuppressThisWarning VEditor - output only wire [OUT_WIDTH-1:0] dout0; // SuppressThisWarning VEditor - output only
wire [OUT_WIDTH-1:0] dout1; // SuppressThisWarning VEditor - output only
assign #(1) pre_busy = pre_busy_w;
// assign #(1) pre_busy = pre_busy_w;
always #(CLK_PERIOD/2) CLK = ~CLK; always #(CLK_PERIOD/2) CLK = ~CLK;
/*
initial begin
$dumpfile(fstname);
$dumpvars(0,mclt_test_04); // SuppressThisWarning VEditor
#100;
start = 0;
page_in = 0;
LATE = 0;
RST = 0;
#100;
repeat (10) @(posedge CLK);
// #1;
for (n = 0; n < 4; n = n+1) begin
if (n>2) LATE = 1;
while (pre_busy || LATE) begin
if (!pre_busy) LATE = 0;
@(posedge CLK);
#1;
end
start = 1;
x_shft = shifts_x[n];
y_shft = shifts_y[n];
bayer_r = bayer[n];
@(posedge CLK);
#1;
start = 0;
x_shft = 'bz;
y_shft = 'bz;
bayer_r = 'bz;
@(posedge CLK);
// #1;
end
// emergency finish
repeat (1024) @(posedge CLK);
$finish;
//pre_last_out
end
always @ (posedge CLK) if (!RST) begin
mpixel_reg <= mpixel_re;
mpixel_valid <= mpixel_reg;
if (mpixel_re) pixel_r <= tiles[{page_in,mpixel_a}];
if (mpixel_reg) pixel_r2 <= pixel_r;
if (mpixel_page) page_in <= page_in + 1;
if (pre_last_out) n_out <= n_out + 1;
end
initial begin
n_out = 0;
while (n_out < 4) @(posedge CLK);
repeat (32) @(posedge CLK);
$finish;
end
integer n1, cntr1, diff1;// SuppressThisWarning VEditor : assigned in $readmem() system task
wire [7:0] mpix_a_w = mclt16x16_i.mpix_a_w;
wire [7:0] java_fi_w = java_fold_index[cntr1];
initial begin
while (RST) @(negedge CLK);
for (n1 = 0; n1 < 4; n1 = n1+1) begin
while (mclt16x16_i.in_cntr != 2) begin
@(negedge CLK);
end
for (cntr1 = 0; cntr1 < 256; cntr1 = cntr1 + 1) begin
diff1 = mpix_a_w - java_fi_w; // java_fold_index[cntr1];
@(negedge CLK);
end
end
end
integer n2, cntr2, diff2, diff2a; // SuppressThisWarning VEditor : assigned in $readmem() system task
wire [WND_WIDTH-1:0] window_r = mclt16x16_i.window_r;
// reg [7:0] java_fi_r;
wire [WND_WIDTH-1:0] java_window_w = tiles_wnd[n2 * 256 + cntr2]; // java_tiles_wnd[cntr2];
initial begin
while (RST) @(negedge CLK);
for (n2 = 0; n2 < 4; n2 = n2+1) begin
while (mclt16x16_i.in_cntr != 9) begin
@(negedge CLK);
end
for (cntr2 = 0; cntr2 < 256; cntr2 = cntr2 + 1) begin
diff2 = window_r - java_window_w;
if (n2 < 1) diff2a = window_r - java_window_w; // TEMPORARY, while no other data
@(negedge CLK);
end
end
end
//Compare window signs
integer n3, cntr3, diff3; // SuppressThisWarning VEditor : assigned in $readmem() system task
wire [3:0] mpix_sgn_w = mclt16x16_i.mpix_sgn_w; // SuppressThisWarning VEditor : assigned in $readmem() system task
wire [3:0] java_sgn_w = { //java_wnd_signs[java_fold_index[cntr3]]; // SuppressThisWarning VEditor : assigned in $readmem() system task
java_wnd_signs[{2'b11,cntr3[7:2]}][cntr3[1:0]],
java_wnd_signs[{2'b10,cntr3[7:2]}][cntr3[1:0]],
java_wnd_signs[{2'b01,cntr3[7:2]}][cntr3[1:0]],
java_wnd_signs[{2'b00,cntr3[7:2]}][cntr3[1:0]]
};
initial begin
while (RST) @(negedge CLK);
for (n3 = 0; n3 < 4; n3 = n3+1) begin
while (mclt16x16_i.in_cntr != 2) begin
@(negedge CLK);
end
for (cntr3 = 0; cntr3 < 256; cntr3 = cntr3 + 1) begin
#1;
diff3 = mpix_sgn_w - java_sgn_w; // java_fold_index[cntr1];
@(negedge CLK);
end
end
end
//Compare DTT inputs
integer n4, cntr4, diff4, diff4a; // SuppressThisWarning VEditor : assigned in $readmem() system task
wire [DTT_IN_WIDTH-1:0] data_dtt_in = mclt16x16_i.data_dtt_in;
wire [DTT_IN_WIDTH-1:0] java_data_dtt_in = java_dtt_in[{n4[1:0], cntr4[1:0],cntr4[7:2]}]; // java_dtt_in0[{cntr4[1:0],cntr4[7:2]}]
initial begin
while (RST) @(negedge CLK);
for (n4 = 0; n4 < 4; n4 = n4+1) begin
while (mclt16x16_i.in_cntr != 16) begin
@(negedge CLK);
end
for (cntr4 = 0; cntr4 < 256; cntr4 = cntr4 + 1) begin
#1;
diff4 = data_dtt_in - java_data_dtt_in;
if (n4 < 1) diff4a = data_dtt_in - java_data_dtt_in; // TEMPORARY, while no other data
@(negedge CLK);
end
end
end
integer n5, cntr5, diff5, diff5a; // SuppressThisWarning VEditor : assigned in $readmem() system task
wire [DTT_IN_WIDTH-1:0] dtt_r_data = mclt16x16_i.dtt_r_data;
wire [DTT_IN_WIDTH-1:0] java_dtt_r_data = java_dtt_in[{n5[1:0], cntr5[7:0]}]; // java_dtt_in0[cntr5[7:0]];
wire dtt_r_regen = mclt16x16_i.dtt_r_regen;
reg dtt_r_dv; // SuppressThisWarning VEditor just for simulation
always @ (posedge CLK) begin
if (RST) dtt_r_dv <= 0;
else dtt_r_dv <= dtt_r_regen;
end
initial begin
while (RST) @(negedge CLK);
for (n5 = 0; n5 < 4; n5 = n5+1) begin
while ((!dtt_r_dv) || (mclt16x16_i.dtt_r_cntr[7:0] != 2)) begin
@(negedge CLK);
end
for (cntr5 = 0; cntr5 < 256; cntr5 = cntr5 + 1) begin
#1;
diff5 = dtt_r_data - java_dtt_r_data;
if (n5 < 1) diff5a = dtt_r_data - java_dtt_r_data; // TEMPORARY, while no other data
@(negedge CLK);
end
end
end
integer n6, cntr6, diff6, diff6a; // SuppressThisWarning VEditor : assigned in $readmem() system task
wire [DTT_IN_WIDTH-1:0] data_dtt_out = mclt16x16_i.dtt_rd_data;
// wire [DTT_IN_WIDTH-1:0] java_data_dtt_out = java_dtt_out0[{cntr6[1:0],cntr6[7:2]}]; // java_dtt_in[n2 * 256 + cntr2];
wire [DTT_IN_WIDTH-1:0] java_data_dtt_out = java_dtt_out[{n6[1:0], cntr6[0],cntr6[1], cntr6[7:2]}]; //java_dtt_out0[{cntr6[0],cntr6[1],cntr6[7:2]}];
initial begin
while (RST) @(negedge CLK);
for (n6 = 0; n6 < 4; n6 = n6+1) begin
while ((!mclt16x16_i.dtt_rd_regen_dv[2]) || (mclt16x16_i.dtt_rd_cntr[7:0] != 2)) begin
@(negedge CLK);
end
for (cntr6 = 0; cntr6 < 256; cntr6 = cntr6 + 1) begin
#1;
diff6 = data_dtt_out - java_data_dtt_out;
if (n6 < 1) diff6a = data_dtt_out - java_data_dtt_out; // TEMPORARY, while no other data
@(negedge CLK);
end
end
end
reg FIRST_OUT;
always @(posedge CLK) FIRST_OUT <= mclt16x16_i.pre_first_out;
integer n7, cntr7, diff7, diff7a; // SuppressThisWarning VEditor : assigned in $readmem() system task
wire [OUT_WIDTH-1:0] java_data_dtt_rot = java_dtt_rot[{n7[1:0], cntr7[1],cntr7[0],cntr7[7:2]}]; //java_dtt_rot0[{cntr7[1],cntr7[0],cntr7[7:2]}];
initial begin
while (RST) @(negedge CLK);
for (n7 = 0; n7 < 4; n7 = n7+1) begin
while (!FIRST_OUT) begin
@(negedge CLK);
end
for (cntr7 = 0; cntr7 < 256; cntr7 = cntr7 + 1) begin
#1;
diff7 = dout - java_data_dtt_rot;
if (n7 < 1) diff7a = dout - java_data_dtt_rot; // TEMPORARY, while no other data
@(negedge CLK);
end
end
end
mclt16x16 #(
.SHIFT_WIDTH (SHIFT_WIDTH),
.COORD_WIDTH (COORD_WIDTH),
.PIXEL_WIDTH (PIXEL_WIDTH),
.WND_WIDTH (WND_WIDTH),
.OUT_WIDTH (OUT_WIDTH),
.DTT_IN_WIDTH (DTT_IN_WIDTH),
.TRANSPOSE_WIDTH (TRANSPOSE_WIDTH),
.OUT_RSHIFT (OUT_RSHIFT),
.OUT_RSHIFT2 (OUT_RSHIFT2),
.DSP_B_WIDTH (DSP_B_WIDTH),
.DSP_A_WIDTH (DSP_A_WIDTH),
.DSP_P_WIDTH (DSP_P_WIDTH),
.DEAD_CYCLES (DEAD_CYCLES)
) mclt16x16_i (
.clk (CLK), // input
.rst (RST), // input
.start (start), // input
.x_shft (x_shft), // input[6:0]
.y_shft (y_shft), // input[6:0]
.bayer (bayer_r), // input[3:0]
.mpixel_re (mpixel_re), // output
.mpixel_page (mpixel_page), // output //!< increment pixel page after this
.mpixel_a (mpixel_a), // output[7:0]
.mpixel_d (mpixel_d), // input[15:0]
.pre_busy (pre_busy_w), // output
.pre_last_in (pre_last_in), // output reg
.pre_first_out (pre_first_out), // output
.pre_last_out (pre_last_out), // output
.out_addr (out_addr), // output[7:0]
.dv (dv), // output
.dout (dout) // output[24:0] signed
);
*/
localparam PIX_ADDR_WIDTH = 9; localparam PIX_ADDR_WIDTH = 9;
// localparam ADDR_DLY = 2; // localparam ADDR_DLY = 2;
localparam EXT_PIX_LATENCY = 2; // external pixel buffer a->d latency (may increase to 4 for gamma) localparam EXT_PIX_LATENCY = 2; // external pixel buffer a->d latency (may increase to 4 for gamma)
...@@ -566,29 +127,19 @@ module mclt_test_04 (); ...@@ -566,29 +127,19 @@ module mclt_test_04 ();
localparam DTT_ROT_START = DTT_OUT_END; localparam DTT_ROT_START = DTT_OUT_END;
localparam DTT_ROT_SIZE = 'h300; localparam DTT_ROT_SIZE = 'h300;
localparam DTT_ROT_END = DTT_ROT_START + DTT_ROT_SIZE; localparam DTT_ROT_END = DTT_ROT_START + DTT_ROT_SIZE; // SuppressThisWarning VEditor
integer java_all[0:5103]; //'h126f]; // SuppressThisWarning VEditor : assigned in $readmem() system task integer java_all[0:5103]; //'h126f]; // SuppressThisWarning VEditor : assigned in $readmem() system task
reg [1:0] TILE_SIZE2 = (TILE_SIDE - 16) >> 1; // 3; // 22; reg [1:0] TILE_SIZE2 = (TILE_SIDE - 16) >> 1; // 3; // 22;
reg INV_CHECKER = 0; wire PIX_RE; // SuppressThisWarning VEditor : debug only
reg [7:0] TOP_LEFT = 69; // center
reg [1:0] VALID_ROWS = 3; // for green component
reg [6:0] CLT_SHIFT_X = 'h62; // shift_x, 7 bits
reg [6:0] CLT_SHIFT_Y = 'h0a; // shift_y, 7 bits
wire [8:0] PIX_ADDR9; wire [8:0] PIX_ADDR9;
wire PIX_RE;
wire PIX_COPY_PAGE; // copy page address // SuppressThisWarning VEditor - not yet used wire PIX_COPY_PAGE; // copy page address // SuppressThisWarning VEditor - not yet used
// wire [PIXEL_WIDTH-1 : 0] PIX_D = PIX_VALID ? PIX_R2 : {PIXEL_WIDTH{1'bz}};
wire [PIXEL_WIDTH-1 : 0] PIX_D; wire [PIXEL_WIDTH-1 : 0] PIX_D;
// reg [PIXEL_WIDTH-1 : 0] PIX_R;
// reg [PIXEL_WIDTH-1 : 0] PIX_R2;
// reg PIX_REG;
// reg PIX_VALID;
reg [PIXEL_WIDTH-1 : 0] bayer_tiles[0:1023]; // SuppressThisWarning VEditor : assigned in $readmem() system task reg [PIXEL_WIDTH-1 : 0] bayer_tiles[0:1023]; // SuppressThisWarning VEditor : assigned in $readmem() system task
reg [PIXEL_WIDTH-1 : 0] jav_pix_in [0:INTILE_SIZE*2-1]; reg [PIXEL_WIDTH-1 : 0] jav_pix_in [0:INTILE_SIZE*2-1];
reg [3 : 0] jav_signs [0:SGN_SIZE*2-1]; reg [3 : 0] jav_signs [0:SGN_SIZE*2-1]; // SuppressThisWarning VEditor not yet used
reg [WND_WIDTH-1 : 0] jav_wnd [0:WND_SIZE*2-1]; reg [WND_WIDTH-1 : 0] jav_wnd [0:WND_SIZE*2-1]; // SuppressThisWarning VEditor not yet used
reg [DTT_IN_WIDTH - 1:0] jav_dtt_in [0:DTT_IN_SIZE*2-1]; reg [DTT_IN_WIDTH - 1:0] jav_dtt_in [0:DTT_IN_SIZE*2-1];
reg [OUT_WIDTH - 1:0] jav_dtt_out[0:DTT_OUT_SIZE*2-1]; reg [OUT_WIDTH - 1:0] jav_dtt_out[0:DTT_OUT_SIZE*2-1];
reg [OUT_WIDTH - 1:0] jav_dtt_rot[0:DTT_ROT_SIZE*2-1]; reg [OUT_WIDTH - 1:0] jav_dtt_rot[0:DTT_ROT_SIZE*2-1];
...@@ -601,15 +152,6 @@ module mclt_test_04 (); ...@@ -601,15 +152,6 @@ module mclt_test_04 ();
integer offs_x, offs_y, top_left; integer offs_x, offs_y, top_left;
reg [1:0] byr_index; // [0:2]; // bayer index of top-left 16x16 tile reg [1:0] byr_index; // [0:2]; // bayer index of top-left 16x16 tile
/*
always @ (posedge CLK) if (!RST) begin
PIX_REG <= PIX_RE;
PIX_VALID <= PIX_REG;
if (PIX_RE) PIX_R <= bayer_tiles[{1'b0, PIX_ADDR9}];
if (PIX_REG) PIX_R2 <= PIX_R;
end
*/
reg DBG = 0;
initial begin initial begin
$readmemh("input_data/mclt_dtt_all_00_x1489_y951.dat", java_all); $readmemh("input_data/mclt_dtt_all_00_x1489_y951.dat", java_all);
...@@ -669,7 +211,6 @@ module mclt_test_04 (); ...@@ -669,7 +211,6 @@ module mclt_test_04 ();
for (i=0; i<INTILE_SIZE; i=i+1) begin for (i=0; i<INTILE_SIZE; i=i+1) begin
jav_pix_in[0 + i] = java_all[INTILE_START+i][PIXEL_WIDTH-1 : 0]; jav_pix_in[0 + i] = java_all[INTILE_START+i][PIXEL_WIDTH-1 : 0];
jav_pix_in[INTILE_SIZE + i] = java_all[INTILE_START+i][PIXEL_WIDTH-1 : 0]; jav_pix_in[INTILE_SIZE + i] = java_all[INTILE_START+i][PIXEL_WIDTH-1 : 0];
// $display("i=%h data=%h", i, java_all[INTILE_START+i][PIXEL_WIDTH-1 : 0]);
end end
for (i=0; i<SGN_SIZE; i=i+1) begin for (i=0; i<SGN_SIZE; i=i+1) begin
...@@ -689,12 +230,10 @@ module mclt_test_04 (); ...@@ -689,12 +230,10 @@ module mclt_test_04 ();
jav_dtt_out[DTT_OUT_SIZE + i] = java_all[DTT_OUT_START+i][OUT_WIDTH-1 : 0]; jav_dtt_out[DTT_OUT_SIZE + i] = java_all[DTT_OUT_START+i][OUT_WIDTH-1 : 0];
end end
for (i=0; i<DTT_ROT_SIZE; i=i+1) begin for (i=0; i<DTT_ROT_SIZE; i=i+1) begin
jav_dtt_out[ + i] = java_all[DTT_ROT_START+i][OUT_WIDTH-1 : 0]; jav_dtt_rot[ + i] = java_all[DTT_ROT_START+i][OUT_WIDTH-1 : 0];
jav_dtt_out[DTT_ROT_SIZE + i] = java_all[DTT_ROT_START+i][OUT_WIDTH-1 : 0]; jav_dtt_rot[DTT_ROT_SIZE + i] = java_all[DTT_ROT_START+i][OUT_WIDTH-1 : 0];
end end
DBG = 1;
end end
reg START; reg START;
...@@ -708,7 +247,7 @@ module mclt_test_04 (); ...@@ -708,7 +247,7 @@ module mclt_test_04 ();
reg PAGE; // full page, 192 clocks reg PAGE; // full page, 192 clocks
reg [2:0] SUB_PAGE; // single color page reg [2:0] SUB_PAGE; // single color page
reg PIX_PAGE; reg PIX_PAGE;
wire [9:0] PIX_ADDR10 = {PIX_PAGE,PIX_ADDR9}; wire [9:0] PIX_ADDR10 = {PIX_PAGE,PIX_ADDR9}; // SuppressThisWarning VEditor debug output
always @ (posedge CLK) begin always @ (posedge CLK) begin
last_count_r <= pre_last_count; last_count_r <= pre_last_count;
...@@ -735,16 +274,10 @@ module mclt_test_04 (); ...@@ -735,16 +274,10 @@ module mclt_test_04 ();
end end
initial begin initial begin
// for (i=0; i<INTILE_SIZE; i=i+1) begin
// $display("i=%h data=%h %h", i, jav_pix_in[0 + i],jav_pix_in[INTILE_SIZE + i]);
// end
$dumpfile(fstname); $dumpfile(fstname);
$dumpvars(0,mclt_test_04); // SuppressThisWarning VEditor $dumpvars(0,mclt_test_04); // SuppressThisWarning VEditor
#100; #100;
START = 0; START = 0;
page_in = 0;
LATE = 0; LATE = 0;
RST = 0; RST = 0;
#100; #100;
...@@ -768,48 +301,16 @@ module mclt_test_04 (); ...@@ -768,48 +301,16 @@ module mclt_test_04 ();
@(posedge CLK) @(posedge CLK)
#1 START = 0; #1 START = 0;
end end
// #1;
repeat (1024) @(posedge CLK);
$finish;
for (n = 0; n < 4; n = n+1) begin
if (n>2) LATE = 1;
while (pre_busy || LATE) begin
if (!pre_busy) LATE = 0;
@(posedge CLK);
#1;
end
// start = 1;
x_shft = shifts_x[n];
y_shft = shifts_y[n];
bayer_r = bayer[n];
@(posedge CLK);
#1;
// start = 0;
x_shft = 'bz;
y_shft = 'bz;
bayer_r = 'bz;
@(posedge CLK);
// #1;
end
// emergency finish
repeat (1024) @(posedge CLK); repeat (1024) @(posedge CLK);
$finish; $finish;
//pre_last_out
end end
//mclt_bayer_fold_i
integer n1, cntr1, diff1;// SuppressThisWarning VEditor : assigned in $readmem() system task integer n1, cntr1, diff1;// SuppressThisWarning VEditor : assigned in $readmem() system task
wire [7:0] wnd_a_w = mclt16x16_bayer_i.mclt_bayer_fold_i.wnd_a_w; wire [7:0] wnd_a_w = mclt16x16_bayer_i.mclt_bayer_fold_i.wnd_a_w;
// wire [7:0] java_fi_w = java_fold_index[cntr1];
wire [10:0] jav_pix_in_now_a = {n1[2:0], wnd_a_w}; wire [10:0] jav_pix_in_now_a = {n1[2:0], wnd_a_w};
// wire [PIXEL_WIDTH-1 : 0] jav_pix_in_now = jav_pix_in[{n1[2:0], wnd_a_w}];
wire [PIXEL_WIDTH-1 : 0] jav_pix_in_now = cntr1[7]?{PIXEL_WIDTH{1'bz}}:jav_pix_in[jav_pix_in_now_a]; wire [PIXEL_WIDTH-1 : 0] jav_pix_in_now = cntr1[7]?{PIXEL_WIDTH{1'bz}}:jav_pix_in[jav_pix_in_now_a];
wire [PIXEL_WIDTH-1 : 0] jav_pix_in_now_d; wire [PIXEL_WIDTH-1 : 0] jav_pix_in_now_d;
...@@ -892,23 +393,22 @@ module mclt_test_04 (); ...@@ -892,23 +393,22 @@ module mclt_test_04 ();
integer n6, cntr6, diff60, diff61; // SuppressThisWarning VEditor : assigned in $readmem() system task integer n6, cntr6, diff60, diff61; // SuppressThisWarning VEditor : assigned in $readmem() system task
wire [DTT_IN_WIDTH-1:0] data_dtt_out0 = mclt16x16_bayer_i.dtt_rd_data0; wire [DTT_IN_WIDTH-1:0] data_dtt_out0 = mclt16x16_bayer_i.dtt_rd_data0;
wire [DTT_IN_WIDTH-1:0] data_dtt_out1 = mclt16x16_bayer_i.dtt_rd_data1; wire [DTT_IN_WIDTH-1:0] data_dtt_out1 = mclt16x16_bayer_i.dtt_rd_data1;
// wire [DTT_IN_WIDTH-1:0] java_data_dtt_out = java_dtt_out0[{cntr6[1:0],cntr6[7:2]}]; // java_dtt_in[n2 * 256 + cntr2];
// wire [DTT_IN_WIDTH-1:0] java_data_dtt_out0 = jav_dtt_out[{n6[2:0], cntr6[0],cntr6[1], cntr6[7:2]}]; //java_dtt_out0[{cntr6[0],cntr6[1],cntr6[7:2]}];
// wire [DTT_IN_WIDTH-1:0] java_data_dtt_out1 = jav_dtt_out[{n6[2:0], cntr6[0],cntr6[1], cntr6[7:2]}]; //java_dtt_out0[{cntr6[0],cntr6[1],cntr6[7:2]}];
wire [DTT_IN_WIDTH-1:0] java_data_dtt_out0 = jav_dtt_out[{ wire [DTT_IN_WIDTH-1:0] java_data_dtt_out0 = jav_dtt_out[{
n6[2:0], n6[2:0],
1'b0,
cntr6[0] ^ cntr6[1], cntr6[0] ^ cntr6[1],
cntr6[0]? (~cntr6[6:2]) : cntr6[6:2], cntr6[0]? (~cntr6[6:2]) : cntr6[6:2],
cntr6[0]}]; cntr6[0]}];
wire [DTT_IN_WIDTH-1:0] java_data_dtt_out1 = jav_dtt_out[{ wire [DTT_IN_WIDTH-1:0] java_data_dtt_out1 = jav_dtt_out[{
n6[2:0], n6[2:0],
1'b0,
cntr6[0] ^ cntr6[1], cntr6[0] ^ cntr6[1],
cntr6[0]? (~cntr6[6:2]) : cntr6[6:2], cntr6[0]? (~cntr6[6:2]) : cntr6[6:2],
~cntr6[0]}]; ~cntr6[0]}];
initial begin initial begin
while (RST) @(negedge CLK); while (RST) @(negedge CLK);
for (n6 = 0; n6 < 6; n6 = n6+1) begin for (n6 = 0; n6 < 6; n6 = n6+1) begin
while ((!mclt16x16_bayer_i.dtt_rd_regen_dv[2]) || (mclt16x16_bayer_i.dtt_rd_cntr_pre[6:0] != 2)) begin while ((!mclt16x16_bayer_i.dtt_rd_regen_dv[2]) || (mclt16x16_bayer_i.dtt_rd_cntr_pre[6:0] != 3)) begin
@(negedge CLK); @(negedge CLK);
end end
for (cntr6 = 0; cntr6 < 128; cntr6 = cntr6 + 1) begin for (cntr6 = 0; cntr6 < 128; cntr6 = cntr6 + 1) begin
...@@ -920,6 +420,26 @@ module mclt_test_04 (); ...@@ -920,6 +420,26 @@ module mclt_test_04 ();
end end
end end
reg FIRST_OUT;
always @(posedge CLK) FIRST_OUT <= mclt16x16_bayer_i.pre_first_out;
integer n7, cntr7, diff70, diff71; // SuppressThisWarning VEditor : assigned in $readmem() system task
wire [OUT_WIDTH-1:0] java_data_dtt_rot0 = jav_dtt_rot[{n7[2:0], cntr7[1],cntr7[0],cntr7[6:2],1'b0}]; //java_dtt_rot0[{cntr7[1],cntr7[0],cntr7[7:2]}];
wire [OUT_WIDTH-1:0] java_data_dtt_rot1 = jav_dtt_rot[{n7[2:0], cntr7[1],cntr7[0],cntr7[6:2],1'b1}]; //java_dtt_rot0[{cntr7[1],cntr7[0],cntr7[7:2]}];
initial begin
while (RST) @(negedge CLK);
for (n7 = 0; n7 < 6; n7 = n7+1) begin
while (!FIRST_OUT) begin
@(negedge CLK);
end
for (cntr7 = 0; cntr7 < 128; cntr7 = cntr7 + 1) begin
#1;
diff70 = dout0 - java_data_dtt_rot0;
diff71 = dout1 - java_data_dtt_rot1;
@(negedge CLK);
end
end
end
...@@ -942,27 +462,27 @@ module mclt_test_04 (); ...@@ -942,27 +462,27 @@ module mclt_test_04 ();
.DSP_P_WIDTH (DSP_P_WIDTH), .DSP_P_WIDTH (DSP_P_WIDTH),
.DEAD_CYCLES (DEAD_CYCLES) .DEAD_CYCLES (DEAD_CYCLES)
) mclt16x16_bayer_i ( ) mclt16x16_bayer_i (
.clk (CLK), // input .clk (CLK), // input
.rst (RST), // input .rst (RST), // input
.start (start), // input .start (start), // input
.tile_size (TILE_SIZE2), // input[1:0] .tile_size (TILE_SIZE2), // input[1:0]
.inv_checker (jav_inv_check[SUB_PAGE]), // INV_CHECKER), // input .inv_checker (jav_inv_check[SUB_PAGE]), // INV_CHECKER), // input
.top_left (jav_top_left[SUB_PAGE]), // TOP_LEFT), // input[7:0] .top_left (jav_top_left[SUB_PAGE]), // TOP_LEFT), // input[7:0]
.valid_rows (jav_vld_rows[SUB_PAGE]), // VALID_ROWS), // input[1:0] .valid_rows (jav_vld_rows[SUB_PAGE]), // VALID_ROWS), // input[1:0]
.x_shft (jav_shifts_x[SUB_PAGE]), //CLT_SHIFT_X), // input[6:0] .x_shft (jav_shifts_x[SUB_PAGE]), //CLT_SHIFT_X), // input[6:0]
.y_shft (jav_shifts_y[SUB_PAGE]), //CLT_SHIFT_Y), // input[6:0] .y_shft (jav_shifts_y[SUB_PAGE]), //CLT_SHIFT_Y), // input[6:0]
.pix_addr (PIX_ADDR9), // output[8:0] .pix_addr (PIX_ADDR9), // output[8:0]
.pix_re (PIX_RE), // output .pix_re (PIX_RE), // output
.pix_page (PIX_COPY_PAGE), // output .pix_page (PIX_COPY_PAGE), // output
.pix_d (PIX_D), // input[15:0] .pix_d (PIX_D), // input[15:0]
.pre_busy (pre_busy), // output .pre_busy (pre_busy), // output
.pre_last_in (pre_last_in), // output .pre_last_in (pre_last_in), // output
.pre_first_out (pre_first_out), // output .pre_first_out (pre_first_out), // output
.pre_last_out (pre_last_out), // output .pre_last_out (pre_last_out), // output
.out_addr (out_addr), // output[7:0] .out_addr (out_addr), // output[7:0]
.dv (dv), // output .dv (dv), // output
.dout0 (), // output[24:0] signed .dout0 (dout0), // output[24:0] signed
.dout1 () // output[24:0] signed .dout1 (dout1) // output[24:0] signed
); );
...@@ -973,7 +493,7 @@ module mclt_test_04 (); ...@@ -973,7 +493,7 @@ module mclt_test_04 ();
.clk (CLK), // input .clk (CLK), // input
.rst (RST), // input .rst (RST), // input
.dly (4'h1), // input[3:0] .dly (4'h1), // input[3:0]
.din (bayer_tiles[PIX_ADDR10]), // input[0:0] .din (PIX_RE?bayer_tiles[PIX_ADDR10]:{PIXEL_WIDTH{1'bz}}), // input[0:0]
.dout (PIX_D) // output[0:0] .dout (PIX_D) // output[0:0]
); );
......
dsp/phase_rotator.v
View file @ 74bffdd3
...@@ -80,7 +80,7 @@ module phase_rotator#( ...@@ -80,7 +80,7 @@ module phase_rotator#(
// 0xxxxxx (>0) nnn s s xxxxxx nnn 0 0 // 0xxxxxx (>0) nnn s s xxxxxx nnn 0 0
reg [5:0] start_d; // delayed versions of start (TODO: adjust length) reg [5:0] start_d; // delayed versions of start (TODO: adjust length)
reg [7:0] cntr_h_consec; // input sample counter reg [7-DECIMATE:0] cntr_h_consec; // input sample counter
wire [7:0] cntr_h = DECIMATE ? {cntr_h_consec[6:2], ODD ? 1'b1: 1'b0, cntr_h_consec[1:0]}: cntr_h_consec; wire [7:0] cntr_h = DECIMATE ? {cntr_h_consec[6:2], ODD ? 1'b1: 1'b0, cntr_h_consec[1:0]}: cntr_h_consec;
reg run_h; reg run_h;
...@@ -121,7 +121,8 @@ module phase_rotator#( ...@@ -121,7 +121,8 @@ module phase_rotator#(
if (rst) run_h <= 0; if (rst) run_h <= 0;
else if (start) run_h <= 1; else if (start) run_h <= 1;
else if (&cntr_h_consec[6:0] && (cntr_h[7] || DECIMATE)) run_h <= 0; // else if (&cntr_h_consec[6:0] && (cntr_h[7] || DECIMATE)) run_h <= 0;
else if (&cntr_h_consec) run_h <= 0;
if (!run_h) cntr_h_consec <= 0; if (!run_h) cntr_h_consec <= 0;
else cntr_h_consec <= cntr_h_consec + 1; else cntr_h_consec <= cntr_h_consec + 1;
...@@ -224,10 +225,15 @@ module phase_rotator#( ...@@ -224,10 +225,15 @@ module phase_rotator#(
sela_1 <= ph[2] | ph[4]; sela_2 <= ph[3] | ph[5]; sela_1 <= ph[2] | ph[4]; sela_2 <= ph[3] | ph[5];
selb_1 <= ph[2] | ph[5]; selb_2 <= ph[3] | ph[6]; selb_1 <= ph[2] | ph[5]; selb_2 <= ph[3] | ph[6];
// 0 1 0 0 // 0 1 0 0
/*
negm_1 <= ((ph[4] & ~sign_cs[2]) | (ph[5] & sign_cs[3])) ^ negm_1 <= ((ph[4] & ~sign_cs[2]) | (ph[5] & sign_cs[3])) ^
(inv_checker_r2 & (ph[4] | ph[6])); // invert negation when using Bayer patterns (inv_checker_r2 & (ph[4] | ph[6])); // invert negation when using Bayer patterns
negm_2 <= ((ph[5] & ~sign_cs[3]) | (ph[6] & sign_cs[4])) ^ negm_2 <= ((ph[5] & ~sign_cs[3]) | (ph[6] & sign_cs[4])) ^
(inv_checker_r2 & (ph[5] | ph[7])); // invert negation when using Bayer patterns (inv_checker_r2 & (ph[5] | ph[7])); // invert negation when using Bayer patterns
*/
negm_1 <= (ph[4] & ~sign_cs[2]) | (ph[5] & sign_cs[3]);
negm_2 <= ((ph[5] & ~sign_cs[3]) | (ph[6] & sign_cs[4])) ^ inv_checker_r2;
// (inv_checker_r2 & (|ph[7:4])); // invert negation when using Bayer patterns
accum_1 <= ph[4] | ph[6]; accum_2 <= ph[5] | ph[7]; accum_1 <= ph[4] | ph[6]; accum_2 <= ph[5] | ph[7];
...@@ -241,7 +247,6 @@ module phase_rotator#( ...@@ -241,7 +247,6 @@ module phase_rotator#(
//inv_checker_r2 //inv_checker_r2
negm_3 <= (ph[10] & ~sign_cs[2]) | (ph[11] & sign_cs[3]); negm_3 <= (ph[10] & ~sign_cs[2]) | (ph[11] & sign_cs[3]);
negm_4 <= (ph[11] & ~sign_cs[3]) | (ph[12] & sign_cs[4]); negm_4 <= (ph[11] & ~sign_cs[3]) | (ph[12] & sign_cs[4]);
;
accum_3 <= ph[10] | ph[12]; accum_4 <= ph[11] | ph[13]; accum_3 <= ph[10] | ph[12]; accum_4 <= ph[11] | ph[13];
...@@ -249,7 +254,7 @@ module phase_rotator#( ...@@ -249,7 +254,7 @@ module phase_rotator#(
fd_dv <= pre_dv; fd_dv <= pre_dv;
if (pre_dv) fd_out <= omux_sel ? pout_4[COEFF_WIDTH +: DSP_A_WIDTH] : pout_3[COEFF_WIDTH +: DSP_A_WIDTH]; if (pre_dv) fd_out <= omux_sel ? pout_4[COEFF_WIDTH +: DSP_A_WIDTH] : pout_3[COEFF_WIDTH +: DSP_A_WIDTH];
pre_first_out <= cntr_h_consec[7:0] == 8'hd; pre_first_out <= cntr_h_consec == 8'hd;
end end
......
input_data/mclt_dtt_all_00_x1489_y951.dat
View file @ 74bffdd3
...@@ -327,43 +327,42 @@ a a a a 0 0 0 0 a a a a 0 0 0 0 ...@@ -327,43 +327,42 @@ a a a a 0 0 0 0 a a a a 0 0 0 0
1fb2ca6 77725 fd0ea 158059 110e13 15d2a9 18f42e 1ad35d 1fb2ca6 77725 fd0ea 158059 110e13 15d2a9 18f42e 1ad35d
// Color = 0: DTT output range: -930.830168 ... 962.877927 // Color = 0: DTT output range: -930.830168 ... 962.877927
dc89ef 1e1fa87 1f43f6e da38a 1f7e59e 13e853 1e8116c 11ffb67 6e4489 1f0fd52 1fa1fbd 6d1be 1fbf2d3 9f420 1f408c2 18ffe24
1f2a286 12ece9 4bbc2 2c827 1fbdaf8 1ff8e39 1fe137e 1fde1a 1f9514a 9766b 25ddf 16412 1fded7e 1ffc71d 1ff09c0 feefd
5c552 928d8 1d0268c 1fe7123 33fe20 1fc5dc0 1e2681f 8b9d2 2e2a6 49468 1e8135e 1ff3892 19fef6 1fe2ee2 1f1341e 45ce5
c7c1b 1f7ef4d 1f9206f 1a18a 7960f 3778a 1fa0016 1f13d92 63e07 1fbf7ab 1fc903b d0c4 3cb04 1bbc3 1fd000e 1f89ed1
1fac088 1fd470d 346f8f 1fc61f2 1c465be 1ffe078 25465b 1fc48dd 1fd6046 1fea388 1a37ae 1fe30fb 1e232fd 1fff03c 12a31b 1fe2471
16fc2b 1f967cb 1f5d41e 1fee2bb cd034 1fba2da 1fa5d4b 1e404bf b7e0a 1fcb3e9 1faea14 1ff715e 66814 1fdd16f 1fd2ea8 1f2026e
1e70c61 e9377 1ee4612 1fbe23f 19579e 1faacbc 1fa0db8 25d546 1f3863d 749b4 1f72312 1fdf122 cabc2 1fd5661 1fd06df 12ea90
1174adf 2b4cec b8fc5 1f5811a 1fe358d 1e486ca 10608b f0b830 18ba5e4 15a660 5c7dd 1fac092 1ff1ac7 1f24373 8303d 785ba0
1174adf 2b4cec b8fc5 1f5811a 1fe358d 1e486ca 10608b f0b830 18ba5e4 15a660 5c7dd 1fac092 1ff1ac7 1f24373 8303d 785ba0
1e70c61 e9377 1ee4612 1fbe23f 19579e 1faacbc 1fa0db8 25d546 1f3863d 749b4 1f72312 1fdf122 cabc2 1fd5661 1fd06df 12ea90
16fc2b 1f967cb 1f5d41e 1fee2bb cd034 1fba2da 1fa5d4b 1e404bf b7e0a 1fcb3e9 1faea14 1ff715e 66814 1fdd16f 1fd2ea8 1f2026e
1fac088 1fd470d 346f8f 1fc61f2 1c465be 1ffe078 25465b 1fc48dd 1fd6046 1fea388 1a37ae 1fe30fb 1e232fd 1fff03c 12a31b 1fe2471
c7c1b 1f7ef4d 1f9206f 1a18a 7960f 3778a 1fa0016 1f13d92 63e07 1fbf7ab 1fc903b d0c4 3cb04 1bbc3 1fd000e 1f89ed1
5c552 928d8 1d0268c 1fe7123 33fe20 1fc5dc0 1e2681f 8b9d2 2e2a6 49468 1e8135e 1ff3892 19fef6 1fe2ee2 1f1341e 45ce5
1f2a286 12ece9 4bbc2 2c827 1fbdaf8 1ff8e39 1fe137e 1fde1a 1f9514a 9766b 25ddf 16412 1fded7e 1ffc71d 1ff09c0 feefd
dc89ef 1e1fa87 1f43f6e da38a 1f7e59e 13e853 1e8116c 11ffb67 6e4489 1f0fd52 1fa1fbd 6d1be 1fbf2d3 9f420 1f408c2 18ffe24
11ffb67 1e8116c 13e853 1f7e59e da38a 1f43f6e 1e1fa87 dc89ef 18ffe24 1f408c2 9f420 1fbf2d3 6d1be 1fa1fbd 1f0fd52 6e4489
1fde1a 1fe137e 1ff8e39 1fbdaf8 2c827 4bbc2 12ece9 1f2a286 feefd 1ff09c0 1ffc71d 1fded7e 16412 25ddf 9766b 1f9514a
8b9d2 1e2681f 1fc5dc0 33fe20 1fe7123 1d0268c 928d8 5c552 45ce5 1f1341e 1fe2ee2 19fef6 1ff3892 1e8135e 49468 2e2a6
1f13d92 1fa0016 3778a 7960f 1a18a 1f9206f 1f7ef4d c7c1b 1f89ed1 1fd000e 1bbc3 3cb04 d0c4 1fc903b 1fbf7ab 63e07
1fc48dd 25465b 1ffe078 1c465be 1fc61f2 346f8f 1fd470d 1fac088 1fe2471 12a31b 1fff03c 1e232fd 1fe30fb 1a37ae 1fea388 1fd6046
1e404bf 1fa5d4b 1fba2da cd034 1fee2bb 1f5d41e 1f967cb 16fc2b 1f2026e 1fd2ea8 1fdd16f 66814 1ff715e 1faea14 1fcb3e9 b7e0a
25d546 1fa0db8 1faacbc 19579e 1fbe23f 1ee4612 e9377 1e70c61 12ea90 1fd06df 1fd5661 cabc2 1fdf122 1f72312 749b4 1f3863d
f0b830 10608b 1e486ca 1fe358d 1f5811a b8fc5 2b4cec 1174adf 785ba0 8303d 1f24373 1ff1ac7 1fac092 5c7dd 15a660 18ba5e4
f0b830 10608b 1e486ca 1fe358d 1f5811a b8fc5 2b4cec 1174adf 785ba0 8303d 1f24373 1ff1ac7 1fac092 5c7dd 15a660 18ba5e4
25d546 1fa0db8 1faacbc 19579e 1fbe23f 1ee4612 e9377 1e70c61 12ea90 1fd06df 1fd5661 cabc2 1fdf122 1f72312 749b4 1f3863d
1e404bf 1fa5d4b 1fba2da cd034 1fee2bb 1f5d41e 1f967cb 16fc2b 1f2026e 1fd2ea8 1fdd16f 66814 1ff715e 1faea14 1fcb3e9 b7e0a
1fc48dd 25465b 1ffe078 1c465be 1fc61f2 346f8f 1fd470d 1fac088 1fe2471 12a31b 1fff03c 1e232fd 1fe30fb 1a37ae 1fea388 1fd6046
1f13d92 1fa0016 3778a 7960f 1a18a 1f9206f 1f7ef4d c7c1b 1f89ed1 1fd000e 1bbc3 3cb04 d0c4 1fc903b 1fbf7ab 63e07
8b9d2 1e2681f 1fc5dc0 33fe20 1fe7123 1d0268c 928d8 5c552 45ce5 1f1341e 1fe2ee2 19fef6 1ff3892 1e8135e 49468 2e2a6
1fde1a 1fe137e 1ff8e39 1fbdaf8 2c827 4bbc2 12ece9 1f2a286 feefd 1ff09c0 1ffc71d 1fded7e 16412 25ddf 9766b 1f9514a
11ffb67 1e8116c 13e853 1f7e59e da38a 1f43f6e 1e1fa87 dc89ef 18ffe24 1f408c2 9f420 1fbf2d3 6d1be 1fa1fbd 1f0fd52 6e4489
// Color = 0 Testing symmetry of checkerboard patterns // Color = 0 Testing symmetry of checkerboard patterns
...@@ -387,81 +386,81 @@ a a a a 0 0 0 0 a a a a 0 0 0 0 ...@@ -387,81 +386,81 @@ a a a a 0 0 0 0 a a a a 0 0 0 0
// Color = 0 Testing antisymmetry of checkerboard patterns // Color = 0 Testing antisymmetry of checkerboard patterns
// 1b913de 1c3f50e 1e87edc 1b4714 1efcb3c 27d0a6 1d022d8 3ff6ce // dc8912 1e1faa4 1f43f7a da37c 1f7e5a6 13e840 1e81184 11ffc48
// 1e5450c 25d9d2 97784 5904e 1f7b5f0 1ff1c72 1fc26fc 3fbc34 // 1f2a294 12ecd6 4bbbe 2c824 1fbdafc 1ff8e3a 1fe1380 1fddfa
// b8aa4 1251b0 1a04d18 1fce246 67fc40 1f8bb80 1c4d03e 1173a4 // 5c54c 928d0 1d026bc 1fe7124 33fdec 1fc5dc4 1e2683c 8b9ca
// 18f836 1efde9a 1f240de 34314 f2c1e 6ef14 1f4002c 1e27b24 // c7c0e 1f7ef56 1f92076 1a188 79608 37786 1fa001c 1f13da2
// 1f58110 1fa8e1a 68df1e 1f8c3e4 188cb7c 1ffc0f0 4a8cb6 1f891ba // 1fac08c 1fd4710 346f5c 1fc61f6 1c465fa 1ffe078 254636 1fc48e2
// 2df856 1f2cf96 1eba83c 1fdc576 19a068 1f745b4 1f4ba96 1c8097e // 16fc14 1f967d2 1f5d428 1fee2bc cd028 1fba2de 1fa5d50 1e404dc
// 1ce18c2 1d26ee 1dc8c24 1f7c47e 32af3c 1f55978 1f41b70 4baa8c // 1e70c7a e9368 1ee4624 1fbe244 195784 1faacc2 1fa0dbe 25d520
// 2e95be 5699d8 171f8a 1eb0234 1fc6b1a 1c90d94 20c116 1e17060 // 1174bc8 2b4cc0 b8fba 1f58124 1fe358e 1e486e6 10607a f0b740
// 2e95be 5699d8 171f8a 1eb0234 1fc6b1a 1c90d94 20c116 1e17060 // 1174bc8 2b4cc0 b8fba 1f58124 1fe358e 1e486e6 10607a f0b740
// 1ce18c2 1d26ee 1dc8c24 1f7c47e 32af3c 1f55978 1f41b70 4baa8c // 1e70c7a e9368 1ee4624 1fbe244 195784 1faacc2 1fa0dbe 25d520
// 2df856 1f2cf96 1eba83c 1fdc576 19a068 1f745b4 1f4ba96 1c8097e // 16fc14 1f967d2 1f5d428 1fee2bc cd028 1fba2de 1fa5d50 1e404dc
// 1f58110 1fa8e1a 68df1e 1f8c3e4 188cb7c 1ffc0f0 4a8cb6 1f891ba // 1fac08c 1fd4710 346f5c 1fc61f6 1c465fa 1ffe078 254636 1fc48e2
// 18f836 1efde9a 1f240de 34314 f2c1e 6ef14 1f4002c 1e27b24 // c7c0e 1f7ef56 1f92076 1a188 79608 37786 1fa001c 1f13da2
// b8aa4 1251b0 1a04d18 1fce246 67fc40 1f8bb80 1c4d03e 1173a4 // 5c54c 928d0 1d026bc 1fe7124 33fdec 1fc5dc4 1e2683c 8b9ca
// 1e5450c 25d9d2 97784 5904e 1f7b5f0 1ff1c72 1fc26fc 3fbc34 // 1f2a294 12ecd6 4bbbe 2c824 1fbdafc 1ff8e3a 1fe1380 1fddfa
// 1b913de 1c3f50e 1e87edc 1b4714 1efcb3c 27d0a6 1d022d8 3ff6ce // dc8912 1e1faa4 1f43f7a da37c 1f7e5a6 13e840 1e81184 11ffc48
// Color = 1: DTT output range: -1017.836480 ... 1017.836480 // Color = 1: DTT output range: -1017.836480 ... 1017.836480
bab4bd 64828 1f5a0e7 1fadaeb 2a5c1 1d639 1efc498 fe7589 5d5a01 32411 1fad079 1fd6d78 152df eb1b 1f7e254 7f3a45
1ff7be2 1fc248c 7a37e 3d3d7 1d2e0 1ff891d 1fac4f9 1228b 1ffbdf1 1fe1248 3d1bb 1e9ea e96f 1ffc48f 1fd627f 9145
5bb51 1fa358a 595b8 1fd2a7c 1fca1bb 1fecaaa 3c24c 1f6ee57 2dda6 1fd1ac8 2cad9 1fe9540 1fe50df 1ff6555 1e124 1fb7730
1ffd1d1 1ffba68 29c6b 4567 26028 2d8fa 2b7cf 1fd7403 1ffe8e9 1ffdd34 14e34 22b3 13013 16c7b 15be6 1feba03
1fa8828 45a21 1f4ab58 c481 1fb8734 1fcb7fa 1f9b5dc 7902d 1fd4417 22d0e 1fa55b1 6240 1fdc39c 1fe5bfe 1fcdaf1 3c812
1fe6d20 32e3d 1fbe5ee 1fe6d3b 28b5b 497d0 363d9 379fa 1ff3691 1971d 1fdf2f9 1ff369e 145ac 24be6 1b1eb 1bcfb
37999 1fe7d5f 1fec01e 7ea63 1f88a6f 1fc746d 37d4f 1f648f1 1bccb 1ff3eb0 1ff6010 3f52e 1fc453b 1fe3a38 1bea6 1fb247e
13dfc83 1fbd7a0 a1844 ae61 3039c 1698b 796fe 10d97fb 19efea2 1fdebd2 50c1d 5730 181cc b4c5 3cb7b 186cc77
13dfc83 1fbd7a0 a1844 ae61 3039c 1698b 796fe 10d97fb 19efea2 1fdebd2 50c1d 5730 181cc b4c5 3cb7b 186cc77
37999 1fe7d5f 1fec01e 7ea63 1f88a6f 1fc746d 37d4f 1f648f1 1bccb 1ff3eb0 1ff6010 3f52e 1fc453b 1fe3a38 1bea6 1fb247e
1fe6d20 32e3d 1fbe5ee 1fe6d3b 28b5b 497d0 363d9 379fa 1ff3691 1971d 1fdf2f9 1ff369e 145ac 24be6 1b1eb 1bcfb
1fa8828 45a21 1f4ab58 c481 1fb8734 1fcb7fa 1f9b5dc 7902d 1fd4417 22d0e 1fa55b1 6240 1fdc39c 1fe5bfe 1fcdaf1 3c812
1ffd1d1 1ffba68 29c6b 4567 26028 2d8fa 2b7cf 1fd7403 1ffe8e9 1ffdd34 14e34 22b3 13013 16c7b 15be6 1feba03
5bb51 1fa358a 595b8 1fd2a7c 1fca1bb 1fecaaa 3c24c 1f6ee57 2dda6 1fd1ac8 2cad9 1fe9540 1fe50df 1ff6555 1e124 1fb7730
1ff7be2 1fc248c 7a37e 3d3d7 1d2e0 1ff891d 1fac4f9 1228b 1ffbdf1 1fe1248 3d1bb 1e9ea e96f 1ffc48f 1fd627f 9145
bab4bd 64828 1f5a0e7 1fadaeb 2a5c1 1d639 1efc498 fe7589 5d5a01 32411 1fad079 1fd6d78 152df eb1b 1f7e254 7f3a45
1018a77 103b68 1fe29c7 1fd5a3f 52515 a5f19 1f9b7d8 1454b43 180c5bb 81dac 1ff14e5 1fead21 29288 52f87 1fcdbef 1a2a5ff
1fedd75 53b07 76e3 1fe2d20 1fc2c29 1f85c82 3db74 841e 1ff6ebb 29d81 3b71 1ff1691 1fe1616 1fc2e45 1edb8 420f
911a9 1fc3db4 13556 35e45 2d584 1fa6a48 5ca76 1fa44af 488d0 1fe1edc 9aab 1af21 16ac0 1fd3527 2e538 1fd225a
28bfd 1fd4831 1fd2706 1fd9fd8 1ffba99 1fd6395 4598 2e2f 145fd 1fea41a 1fe9385 1fecfed 1ffdd4d 1feb1cc 22cc 1717
1f86fd3 64a24 34806 478cc 1ff3b7f b54a8 1fba5df 577d8 1fc37ee 3250f 1a402 23c64 1ff9dc0 5aa4f 1fdd2f2 2bbe9
1fc8606 1fc9c27 1fb6830 1fd74a5 192c5 41a12 1fcd1c3 192e0 1fe4305 1fe4e15 1fdb41a 1feba54 c962 20d07 1fe68e3 c96f
9b70f 1fc82b1 38b93 77591 1f8159d 13fe2 182a1 1fc8667 4db82 1fe415a 1c5c8 3bac5 1fc0ad2 9ff0 c150 1fe4335
f26805 1f86902 1fe9675 1fcfc64 1ff519f 1f5e7bc 42860 c2037d 793389 1fc3485 1ff4b3b 1fe7e34 1ffa8d0 1faf3e3 2142e 61015e
f26805 1f86902 1fe9675 1fcfc64 1ff519f 1f5e7bc 42860 c2037d 793389 1fc3485 1ff4b3b 1fe7e34 1ffa8d0 1faf3e3 2142e 61015e
9b70f 1fc82b1 38b93 77591 1f8159d 13fe2 182a1 1fc8667 4db82 1fe415a 1c5c8 3bac5 1fc0ad2 9ff0 c150 1fe4335
1fc8606 1fc9c27 1fb6830 1fd74a5 192c5 41a12 1fcd1c3 192e0 1fe4305 1fe4e15 1fdb41a 1feba54 c962 20d07 1fe68e3 c96f
1f86fd3 64a24 34806 478cc 1ff3b7f b54a8 1fba5df 577d8 1fc37ee 3250f 1a402 23c64 1ff9dc0 5aa4f 1fdd2f2 2bbe9
28bfd 1fd4831 1fd2706 1fd9fd8 1ffba99 1fd6395 4598 2e2f 145fd 1fea41a 1fe9385 1fecfed 1ffdd4d 1feb1cc 22cc 1717
911a9 1fc3db4 13556 35e45 2d584 1fa6a48 5ca76 1fa44af 488d0 1fe1edc 9aab 1af21 16ac0 1fd3527 2e538 1fd225a
1fedd75 53b07 76e3 1fe2d20 1fc2c29 1f85c82 3db74 841e 1ff6ebb 29d81 3b71 1ff1691 1fe1616 1fc2e45 1edb8 420f
1018a77 103b68 1fe29c7 1fd5a3f 52515 a5f19 1f9b7d8 1454b43 180c5bb 81dac 1ff14e5 1fead21 29288 52f87 1fcdbef 1a2a5ff
// Color = 1 Testing symmetry of checkerboard patterns // Color = 1 Testing symmetry of checkerboard patterns
// 175697a c9050 1eb41ce 1f5b5d6 54b82 3ac72 1df8930 1fceb12 // bab402 64822 1f5a0f2 1fadaf0 2a5be 1d636 1efc4a8 fe748a
// 1fef7c4 1f84918 f46fc 7a7ae 3a5c0 1ff123a 1f589f2 24516 // 1ff7be2 1fc2490 7a376 3d3d4 1d2de 1ff891e 1fac4fe 1228a
// b76a2 1f46b14 b2b70 1fa54f8 1f94376 1fd9554 78498 1eddcae // 5bb4c 1fa3590 595b2 1fd2a80 1fca1be 1fecaaa 3c248 1f6ee60
// 1ffa3a2 1ff74d0 538d6 8ace 4c050 5b1f4 56f9e 1fae806 // 1ffd1d2 1ffba68 29c68 4566 26026 2d8f6 2b7cc 1fd7406
// 1f51050 8b442 1e956b0 18902 1f70e68 1f96ff4 1f36bb8 f205a // 1fa882e 45a1c 1f4ab62 c480 1fb8738 1fcb7fc 1f9b5e2 79024
// 1fcda40 65c7a 1f7cbdc 1fcda76 516b6 92fa0 6c7b2 6f3f4 // 1fe6d22 32e3a 1fbe5f2 1fe6d3c 28b58 497cc 363d6 379f6
// 6f332 1fcfabe 1fd803c fd4c6 1f114de 1f8e8da 6fa9e 1ec91e2 // 37996 1fe7d60 1fec020 7ea5c 1f88a76 1fc7470 37d4c 1f648fc
// 7bf906 1f7af40 143088 15cc2 60738 2d316 f2dfc 1b2ff6 // 13dfd44 1fbd7a4 a183a ae60 30398 1698a 796f6 10d98ee
// 7bf906 1f7af40 143088 15cc2 60738 2d316 f2dfc 1b2ff6 // 13dfd44 1fbd7a4 a183a ae60 30398 1698a 796f6 10d98ee
// 6f332 1fcfabe 1fd803c fd4c6 1f114de 1f8e8da 6fa9e 1ec91e2 // 37996 1fe7d60 1fec020 7ea5c 1f88a76 1fc7470 37d4c 1f648fc
// 1fcda40 65c7a 1f7cbdc 1fcda76 516b6 92fa0 6c7b2 6f3f4 // 1fe6d22 32e3a 1fbe5f2 1fe6d3c 28b58 497cc 363d6 379f6
// 1f51050 8b442 1e956b0 18902 1f70e68 1f96ff4 1f36bb8 f205a // 1fa882e 45a1c 1f4ab62 c480 1fb8738 1fcb7fc 1f9b5e2 79024
// 1ffa3a2 1ff74d0 538d6 8ace 4c050 5b1f4 56f9e 1fae806 // 1ffd1d2 1ffba68 29c68 4566 26026 2d8f6 2b7cc 1fd7406
// b76a2 1f46b14 b2b70 1fa54f8 1f94376 1fd9554 78498 1eddcae // 5bb4c 1fa3590 595b2 1fd2a80 1fca1be 1fecaaa 3c248 1f6ee60
// 1fef7c4 1f84918 f46fc 7a7ae 3a5c0 1ff123a 1f589f2 24516 // 1ff7be2 1fc2490 7a376 3d3d4 1d2de 1ff891e 1fac4fe 1228a
// 175697a c9050 1eb41ce 1f5b5d6 54b82 3ac72 1df8930 1fceb12 // bab402 64822 1f5a0f2 1fadaf0 2a5be 1d636 1efc4a8 fe748a
// Color = 1 Testing antisymmetry of checkerboard patterns // Color = 1 Testing antisymmetry of checkerboard patterns
...@@ -485,41 +484,41 @@ a a a a 0 0 0 0 a a a a 0 0 0 0 ...@@ -485,41 +484,41 @@ a a a a 0 0 0 0 a a a a 0 0 0 0
// Color = 2: DTT output range: -549.382667 ... 423.390240 // Color = 2: DTT output range: -549.382667 ... 423.390240
62a212 1f24602 87aaa 1fa041e 4c39d 2fe1f 1fa01a1 7510d 3150d8 1f92308 43d51 1fd0212 261cc 17f0e 1fd00d4 3a883
36c5 68f6e 1f22bd7 c8371 1f92abf 1fed109 92217 1f1990b 1b63 347b4 1f915f2 641b2 1fc9563 1ff6885 49107 1f8cc8d
1fdee23 2e5d6 1fbdfd4 50b43 1fc5882 1fe20ea 37cd9 1f8b1ba 1fef713 172e9 1fdefec 2859f 1fe2c43 1ff1076 1be6b 1fc58e0
2af60 1f18630 1237bf 1ef1f31 acfee 1ffec15 1f80671 ccfee 157ae 1f8c31f 91bd6 1f78fa1 567f1 1fff60a 1fc033d 667f0
1fd8989 1fd6a63 1ff709d 1ffa735 1dd34 1fd8ee8 39b31 1fb424a 1fec4c6 1feb533 1ffb84f 1ffd39b ee99 1fec775 1cd97 1fda127
1fad64c 996c1 1eff738 c5f22 1f8832e 1fe3822 910e9 1f39008 1fd6b29 4cb5c 1f7fba4 62f8b 1fc419b 1ff1c12 48870 1f9c80a
1fcc6 1f90590 a1c45 1fa0db2 36e1b 1ffda6a 1fb18bd c611f fe62 1fc82cc 50e1d 1fd06dc 1b70c 1ffed35 1fd8c61 63089
3b069 1f7c9ff bd15b 1f46b44 46ee1 5a54a 1f0c63d 69d8fa 1d833 1fbe504 5e8a7 1fa35a8 2376e 2d2a2 1f86326 34ec48
1ac8a6c 62ce4 1f7f933 6edfd 1fda078 1fd163e 597e6 1f86dd4 1d64560 3166f 1fbfc9d 376fb 1fed03d 1fe8b20 2cbf0 1fc36ee
1ff8f1a 1fc9ed6 57509 1fafe90 1ff003f 1feea77 1ff600e 6a3 1ffc78d 1fe4f6d 2ba82 1fd7f4a 1ff8020 1ff753c 1ffb008 352
6983b 1e9121b 1e5928 1e56502 1046c1 a673 1f024d4 180257 34c1a 1f48919 f2c85 1f2b28e 82358 5339 1f81272 c0120
2e85e 1f43a73 d9f14 1f29666 8c64d 1a1c5 1f9cfc8 b8152 1742e 1fa1d3f 6cf83 1f94b39 46322 d0e2 1fce7e7 5c0a3
1fd0c9b 84fee 1f4cb9f 9b034 1f9f944 1fe1875 5b7be 1f81527 1fe864f 427f3 1fa65d5 4d815 1fcfca5 1ff0c3b 2dbdc 1fc0a98
261a6 1fd3754 56edd 1fc9977 33f90 1169c 1fee6f3 56eea 130d2 1fe9bab 2b76c 1fe4cbd 19fc7 8b4d 1ff737a 2b772
39890 1fc4937 6d806 1fa4bc5 25879 ba12 1fb0545 1ff0ae1 1cc46 1fe249e 36bff 1fd25e5 12c3b 5d09 1fd82a5 1ff8571
1fb9722 f4d1a 1eab7fd 118d2d 1f88b36 1faced7 159d22 176a782 1fdcb93 7a685 1f55c09 8c68e 1fc459f 1fd676e ace86 1bb5406
176a782 159d22 1faced7 1f88b36 118d2d 1eab7fd f4d1a 1fb9722 1bb5406 ace86 1fd676e 1fc459f 8c68e 1f55c09 7a685 1fdcb93
1ff0ae1 1fb0545 ba12 25879 1fa4bc5 6d806 1fc4937 39890 1ff8571 1fd82a5 5d09 12c3b 1fd25e5 36bff 1fe249e 1cc46
56eea 1fee6f3 1169c 33f90 1fc9977 56edd 1fd3754 261a6 2b772 1ff737a 8b4d 19fc7 1fe4cbd 2b76c 1fe9bab 130d2
1f81527 5b7be 1fe1875 1f9f944 9b034 1f4cb9f 84fee 1fd0c9b 1fc0a98 2dbdc 1ff0c3b 1fcfca5 4d815 1fa65d5 427f3 1fe864f
b8152 1f9cfc8 1a1c5 8c64d 1f29666 d9f14 1f43a73 2e85e 5c0a3 1fce7e7 d0e2 46322 1f94b39 6cf83 1fa1d3f 1742e
180257 1f024d4 a673 1046c1 1e56502 1e5928 1e9121b 6983b c0120 1f81272 5339 82358 1f2b28e f2c85 1f48919 34c1a
6a3 1ff600e 1feea77 1ff003f 1fafe90 57509 1fc9ed6 1ff8f1a 352 1ffb008 1ff753c 1ff8020 1fd7f4a 2ba82 1fe4f6d 1ffc78d
1f86dd4 597e6 1fd163e 1fda078 6edfd 1f7f933 62ce4 1ac8a6c 1fc36ee 2cbf0 1fe8b20 1fed03d 376fb 1fbfc9d 3166f 1d64560
69d8fa 1f0c63d 5a54a 46ee1 1f46b44 bd15b 1f7c9ff 3b069 34ec48 1f86326 2d2a2 2376e 1fa35a8 5e8a7 1fbe504 1d833
c611f 1fb18bd 1ffda6a 36e1b 1fa0db2 a1c45 1f90590 1fcc6 63089 1fd8c61 1ffed35 1b70c 1fd06dc 50e1d 1fc82cc fe62
1f39008 910e9 1fe3822 1f8832e c5f22 1eff738 996c1 1fad64c 1f9c80a 48870 1ff1c12 1fc419b 62f8b 1f7fba4 4cb5c 1fd6b29
1fb424a 39b31 1fd8ee8 1dd34 1ffa735 1ff709d 1fd6a63 1fd8989 1fda127 1cd97 1fec775 ee99 1ffd39b 1ffb84f 1feb533 1fec4c6
ccfee 1f80671 1ffec15 acfee 1ef1f31 1237bf 1f18630 2af60 667f0 1fc033d 1fff60a 567f1 1f78fa1 91bd6 1f8c31f 157ae
1f8b1ba 37cd9 1fe20ea 1fc5882 50b43 1fbdfd4 2e5d6 1fdee23 1fc58e0 1be6b 1ff1076 1fe2c43 2859f 1fdefec 172e9 1fef713
1f1990b 92217 1fed109 1f92abf c8371 1f22bd7 68f6e 36c5 1f8cc8d 49107 1ff6885 1fc9563 641b2 1f915f2 347b4 1b63
7510d 1fa01a1 2fe1f 4c39d 1fa041e 87aaa 1f24602 62a212 3a883 1fd00d4 17f0e 261cc 1fd0212 43d51 1f92308 3150d8
// Color = 2 Testing symmetry of checkerboard patterns // Color = 2 Testing symmetry of checkerboard patterns
...@@ -543,136 +542,136 @@ a a a a 0 0 0 0 a a a a 0 0 0 0 ...@@ -543,136 +542,136 @@ a a a a 0 0 0 0 a a a a 0 0 0 0
// Color = 2 Testing antisymmetry of checkerboard patterns // Color = 2 Testing antisymmetry of checkerboard patterns
// c54424 1e48c04 10f554 1f4083c 9873a 5fc3e 1f40342 ea21a // 62a1b0 1f24610 87aa2 1fa0424 4c398 2fe1c 1fa01a8 75106
// 6d8a d1edc 1e457ae 1906e2 1f2557e 1fda212 12442e 1e33216 // 36c6 68f68 1f22be4 c8364 1f92ac6 1fed10a 9220e 1f1991a
// 1fbdc46 5cbac 1f7bfa8 a1686 1f8b104 1fc41d4 6f9b2 1f16374 // 1fdee26 2e5d2 1fbdfd8 50b3e 1fc5886 1fe20ec 37cd6 1f8b1c0
// 55ec0 1e30c60 246f7e 1de3e62 159fdc 1ffd82a 1f00ce2 199fdc // 2af5c 1f1863e 1237ac 1ef1f42 acfe2 1ffec14 1f8067a ccfe0
// 1fb1312 1fad4c6 1fee13a 1ff4e6a 3ba68 1fb1dd0 73662 1f68494 // 1fd898c 1fd6a66 1ff709e 1ffa736 1dd32 1fd8eea 39b2e 1fb424e
// 1f5ac98 132d82 1dfee70 18be44 1f1065c 1fc7044 1221d2 1e72010 // 1fad652 996b8 1eff748 c5f16 1f88336 1fe3824 910e0 1f39014
// 3f98c 1f20b20 14388a 1f41b64 6dc36 1ffb4d4 1f6317a 18c23e // 1fcc4 1f90598 a1c3a 1fa0db8 36e18 1ffda6a 1fb18c2 c6112
// 760d2 1ef93fe 17a2b6 1e8d688 8ddc2 b4a94 1e18c7a d3b1f4 // 3b066 1f7ca08 bd14e 1f46b50 46edc 5a544 1f0c64c 69d890
// 15914d8 c59c8 1eff266 ddbfa 1fb40f0 1fa2c7c b2fcc 1f0dba8 // 1ac8ac0 62cde 1f7f93a 6edf6 1fda07a 1fd1640 597e0 1f86ddc
// 1ff1e34 1f93dac aea12 1f5fd20 1fe007e 1fdd4ee 1fec01c d46 // 1ff8f1a 1fc9eda 57504 1fafe94 1ff0040 1feea78 1ff6010 6a4
// d3076 1d22436 3cb250 1caca04 208d82 14ce6 1e049a8 3004ae // 69834 1e91232 1e590a 1e5651c 1046b0 a672 1f024e4 180240
// 5d0bc 1e874e6 1b3e28 1e52ccc 118c9a 3438a 1f39f90 1702a4 // 2e85c 1f43a7e d9f06 1f29672 8c644 1a1c4 1f9cfce b8146
// 1fa1936 109fdc 1e9973e 136068 1f3f288 1fc30ea b6f7c 1f02a4e // 1fd0c9e 84fe6 1f4cbaa 9b02a 1f9f94a 1fe1876 5b7b8 1f81530
// 4c34c 1fa6ea8 addba 1f932ee 67f20 22d38 1fdcde6 addd4 // 261a4 1fd3756 56ed8 1fc997a 33f8e 1169a 1fee6f4 56ee4
// 73120 1f8926e db00c 1f4978a 4b0f2 17424 1f60a8a 1fe15c2 // 3988c 1fc493c 6d7fe 1fa4bca 25876 ba12 1fb054a 1ff0ae2
// 1f72e44 1e9a34 1d56ffa 231a5a 1f1166c 1f59dae 2b3a44 ed4f04 // 1fb9726 f4d0a 1eab812 118d1c 1f88b3e 1facedc 159d0c 176a80c
// Color = 0: DTT rotated, shift_x=0.460938. shift_y = -0.218750 // Color = 0: DTT rotated, shift_x=0.460938. shift_y = -0.218750
// DTT rotated range: -1495.218153 ... 1357.956283 // DTT rotated range: -1495.218153 ... 1357.956283
e5ed06 1db376f 1f84c60 b8995 1fe2772 e1015 1d89e33 1ccc73d 72f683 1ed9bb8 1fc2630 5c4ca 1ff13b9 7080a 1ec4f1a 1e6639f
1fab466 e2ba9 9501c 6b39 1f76eff 52105 75e6a cb80f 1fd5a33 715d5 4a80e 359c 1fbb77f 29083 3af35 65c08
1fc01c5 7ecde 1da0309 b50b9 25c636 1ed3ad3 1f168eb d2313 1fe00e3 3f66f 1ed0184 5a85c 12e31b 1f69d69 1f8b476 6918a
cbd6a 1f7b20e 1dcdf02 f8f8a 27a53d 1f1e7e7 1e69844 2840 65eb5 1fbd907 1ee6f81 7c7c5 13d29e 1f8f3f3 1f34c22 1420
1f3ae4e 7d00f 277bad 1eebff3 1d3a034 105418 1b8323 1feed9e 1f9d727 3e808 13bdd6 1f75ffa 1e9d01a 82a0c dc191 1ff76cf
6affa 1f79e08 21f667 1f5d096 1de50e4 105a65 c7c6e 1f293dc 357fd 1fbcf04 10fb34 1fae84b 1ef2872 82d32 63e37 1f949ee
21d2e 1f42896 1f4bacd d7b afece 1f974f5 1f94735 1f5bfd9 10e97 1fa144b 1fa5d66 6bd 57f67 1fcba7b 1fca39a 1fadfec
1030d60 29a282 83a1a 1f36153 11f0e 1efd6ca 2b2cda 38be8f 18186b0 14d141 41d0d 1f9b0a9 8f87 1f7eb65 15966d 1c5f48
135cdac 29e437 4c3ae 1f672e2 1fa31a6 1edfee5 21681e 30433d 19ae6d6 14f21c 261d7 1fb3971 1fd18d3 1f6ff73 10b40f 18219e
1e65614 1227fe 1ef7000 3d371 145e55 1f421e2 4d515 136223 1f32b0a 913ff 1f7b800 1e9b8 a2f2b 1fa10f1 26a8b 9b112
164184 1fbc6b9 1e17291 88979 1f17e4 1ed683a 1efb520 1fcdc7f b20c2 1fde35c 1f0b949 444bc f8bf2 1f6b41d 1f7da90 1fe6e3f
2a79a 1fc7e36 25ba99 1f13dfc 1d6ef27 131e67 12c60f 1f884d8 153cd 1fe3f1b 12dd4d 1f89efe 1eb7794 98f34 96308 1fc426c
431b9 1fb80b9 212520 1f34207 1dc1897 113fed f85ca 1f8982c 218dc 1fdc05d 109290 1f9a103 1ee0c4c 89ff6 7c2e5 1fc4c16
159989 1fcc736 1dd06f3 9dba0 237bc4 1eb3fd1 1ee0b48 1fe7e37 accc4 1fe639b 1ee8379 4edd0 11bde2 1f59fe9 1f705a4 1ff3f1b
1e5e18c 13c11a 1f0b3ba 3d933 132aac 1f4d976 5b2b2 14cb66 1f2f0c6 9e08d 1f859dd 1ec99 99556 1fa6cbb 2d959 a65b3
153782a 2512e0 3c929 1f7eed3 1fa02fb 1efda3f 1c55af 29a12e 1a9bc15 128970 1e494 1fbf769 1fd017d 1f7ed20 e2ad7 14d097
1010ac5 1eb3db8 18834b 1f424be 1070b2 1ea7ee9 1f0bc3e 1537a8d 1808562 1f59edc c41a6 1fa125f 83859 1f53f74 1f85e1f a9bd46
14ccb1 1fde734 1fefdfe 1f4930a 79276 7d69f c48c3 1eeb628 a6659 1fef39a 1ff7eff 1fa4985 3c93b 3eb4f 62462 1f75b14
14458b 1e69f17 6e4e3 279487 1efa330 1de42de 1639ee 1f00d99 a22c5 1f34f8c 37272 13ca44 1f7d198 1ef216f b1cf7 1f806cc
1f5bf7f 1e5f335 a98c3 26844b 1f39804 1de1f5d a1b42 105a13 1fadfc0 1f2f99a 54c62 134225 1f9cc02 1ef0faf 50da1 82d0a
8b938 1d2de7 1f4b865 1d4c0a2 e19f3 25ad38 1f38736 1f0f16c 45c9c e96f3 1fa5c32 1ea6051 70cfa 12d69c 1f9c39b 1f878b6
1e925e0 170831 1f94863 1dcc89e e77be 1e83c7 1eae8a4 13aaa8 1f492f0 b8419 1fca432 1ee644f 73bdf f41e3 1f57452 9d554
1f10126 105b9 c8ea e2e4a 1f70b63 1f6ca40 1f632a6 b25ae 1f88093 82dd 6475 71725 1fb85b2 1fb6520 1fb1953 592d7
118fef0 15af3d 1e4577e bceb2 1eec113 17e7dd 126d78 8a34f5 8c7f78 ad79f 1f22bbf 5e759 1f7608a bf3ef 936bc 1451a7b
e45f85 8d642 1e4cc7f 53d8 1f868b6 14f06d 1ac6c5 d2d251 722fc2 46b21 1f26640 29ec 1fc345b a7836 d6363 1696928
2e2308 1f759d5 1fe3d71 1735af 1f43bc1 1f45044 13859a 1cee48b 171184 1fbaceb 1ff1eb8 b9ad7 1fa1de0 1fa2822 9c2cd 1e77245
1e9acb8 1ee63c2 1056f 2137b0 1f186b5 1e7bc19 7e829 1f5df9 1f4d65c 1f731e1 82b7 109bd8 1f8c35b 1f3de0d 3f414 faefd
1f424bc 1b2a20 1f9c501 1d6fca9 e9c44 211e0d 1ec0e59 992e4 1fa125e d9510 1fce281 1eb7e54 74e22 108f07 1f6072d 4c972
1f2fa4c 17c57f 1fb1d12 1dc02a0 cfb5d 1cb8ac 1ed7174 b80e1 1f97d26 be2bf 1fd8e89 1ee0150 67dae e5c56 1f6b8ba 5c070
1ec52f5 1eb6a5f 1db82 25d011 1efa1d2 1e3c98a a9172 1d2ddb 1f6297b 1f5b52f edc1 12e809 1f7d0e9 1f1e4c5 548b9 e96ed
305602 1f728c7 1fe213f 15a2f4 1f53fb2 1f55c66 14e0f8 1cd2551 182b01 1fb9463 1ff10a0 ad17a 1fa9fd9 1faae33 a707c 1e692a8
c37232 63ab8 1e80107 1fedfab 1fa7a83 12263b 18b4de fea472 61b919 31d5c 1f40084 1ff6fd5 1fd3d42 9131d c5a6f 17f5239
// Color = 1: DTT rotated, shift_x=0.062500. shift_y = 0.375000 // Color = 1: DTT rotated, shift_x=0.062500. shift_y = 0.375000
// DTT rotated range: -1315.936119 ... 1138.483876 // DTT rotated range: -1315.936119 ... 1138.483876
cf7da3 29a14 1f6dd1b 1fccda5 1fee33e 1f9a76f 1fbc727 11c9cbf 67bed1 14d0a 1fb6e8d 1fe66d2 1ff719f 1fcd3b7 1fde393 8e4e5f
1ff77c6 1fb1eba 70b6b 41ba6 3d3b9 554e6 1f9cf78 1886 1ffbbe3 1fd8f5d 385b5 20dd3 1e9dc 2aa73 1fce7bc c43
51eb3 1faf263 4e661 1fbe38d 1fb8bbc 33184 1fd27db 107d1 28f5a 1fd7932 27330 1fdf1c7 1fdc5de 198c2 1fe93ee 83e9
de1 153d 474d0 1888c 24b40 4bd05 157de 1fed370 6f1 a9e 23a68 c446 125a0 25e83 abef 1ff69b8
1fb2c6d 2d075 1f3f028 1fe516c 1fcbda3 1f52ba1 1ffc9f9 1feab56 1fd9636 1683b 1f9f814 1ff28b6 1fe5ed2 1fa95d0 1ffe4fd 1ff55ab
1fe04d0 475e5 1fd3402 7107 19ed3 1ffc328 4db54 403 1ff0268 23af3 1fe9a01 3883 cf69 1ffe194 26daa 202
2c8cd 1475 1fc7bdb 27f77 1fe665d 1fbdd7a 1be7a 1febe84 16466 a3a 1fe3ded 13fbb 1ff332e 1fdeebd df3d 1ff5f42
10abfb0 1fd2d05 b68a5 29fa7 2f1fd 949ab 1b9aa b706a9 1855fd8 1fe9683 5b452 14fd4 178fe 4a4d5 dcd5 15b8354
12f376d 1fda359 9d0a1 20a08 2c81e 8351a eb53 e931a5 1979bb6 1fed1ad 4e850 10504 1640f 41a8d 75a9 17498d3
2bbab 1ff1c5c 1fdd0f1 35d2e 1ff2137 1fcd83c 8c0a 1febd19 15dd5 1ff8e2e 1fee878 1ae97 1ff909c 1fe6c1e 4605 1ff5e8c
1feff97 38af3 1fe1f7e 1ffa1e5 c423 6494 462d9 3892 1ff7fcb 1c57a 1ff0fbf 1ffd0f3 6212 324a 2316d 1c49
1fb16fb 2e2cc 1f49696 1fe9712 1fd221a 1f5e699 d50 1fe68e0 1fd8b7d 17166 1fa4b4b 1ff4b89 1fe910d 1faf34d 6a8 1ff3470
1ff1862 a4f6 224f4 13a97 1b0ca 2ad54 153db 1fe89c9 1ff8c31 527b 1127a 9d4c d865 156aa a9ee 1ff44e5
4d37e 1fbbc2f 47089 1fbe56a 1fbc7e9 3356e 1fe10e7 10dc9 269bf 1fdde17 23844 1fdf2b5 1fde3f4 19ab7 1ff0874 86e4
2e4 1fb0a52 67bb3 4af73 3956f 49d16 1fa093d 1ffd90f 172 1fd8529 33dd9 257ba 1cab8 24e8b 1fd049e 1ffec87
a2c5b2 21751 1f8f43c 1fd4336 1ff73a4 1fb608e 1fc09d4 e0c04d 5162d9 10ba9 1fc7a1e 1fea19b 1ffb9d2 1fdb047 1fe04ea 706026
10d3304 115073 1fa869b 1fb306c 5ab00 88dc7 1ef020e 90ea53 1869982 8a839 1fd434d 1fd9836 2d580 446e3 1f78107 48752a
1fe7709 46491 31330 1ffeac5 1fe812a 1fa7698 1fdcf1d 19f2f 1ff3b85 23248 18998 1fff563 1ff4095 1fd3b4c 1fee78e cf97
9aaec 1fb3bad 37c10 1b6d1 1fffd57 1fae7cf 6567a 1f51be3 4d576 1fd9dd7 1be08 db69 1fffeac 1fd73e8 32b3d 1fa8df2
332eb 1fcb0b4 1fe6064 1fdb522 187f9 1ffcb67 306ac 1fd061b 19975 1fe585a 1ff3032 1feda91 c3fc 1ffe5b4 18356 1fe830e
1f7d341 75884 1ff2dd9 474c9 1fc86d3 55fd3 1f822ec 96647 1fbe9a1 3ac42 1ff96ec 23a65 1fe436a 2afe9 1fc1176 4b324
1fb2d0d 1fe13cf 1f9de6f 1fcd4e2 2c21f 6bc16 11be 5370a 1fd9686 1ff09e7 1fcef38 1fe6a71 1610f 35e0b 8df 29b85
a00ee 1fba2af 250e8 a363d 1f59c0c 1ff34b3 40070 1f5b13c 50077 1fdd158 12874 51b1e 1face06 1ff9a59 20038 1fad89e
10b8fc7 1f4ac73 345eb 1fea340 412c 1f89c2f b8b82 166a8ab 85c7e4 1fa563a 1a2f5 1ff51a0 2096 1fc4e18 5c5c1 1b35456
e081e6 1f7e550 23f94 1fda772 16312 1fa2ab2 86427 1807aed 7040f3 1fbf2a8 11fca 1fed3b9 b189 1fd1559 43213 1c03d77
9e4f0 1fc6c7c 2f91a a653b 1f51bc9 1fe16c6 3a4f0 1f5d01f 4f278 1fe363e 17c8d 5329d 1fa8de4 1ff0b63 1d278 1fae810
1fd0126 1fd176d 1fa7121 1fd1c48 2cf6d 5da72 154d2 3269a 1fe8093 1fe8bb7 1fd3890 1fe8e24 167b6 2ed39 aa69 1934d
1f84d26 6d4d2 1fed70f 41667 1fcc360 57051 1f89593 8fddf 1fc2693 36a69 1ff6b88 20b33 1fe61b0 2b828 1fc4aca 47eef
1a2b0 1fe162a 1fe2e72 1fe8c8e dec9 dc0a 1856c 1fed5d2 d158 1ff0b15 1ff1739 1ff4647 6f64 6e05 c2b6 1ff6ae9
8e5c3 1fac1de 25556 11e13 89bf 1fc2534 679ca 1f5eed2 472e1 1fd60ef 12aab 8f09 44df 1fe129a 33ce5 1faf769
6cbd 39c59 3988c 1f25c 1fc6891 1fa3263 1fe8fe6 1ff9a6f 365f 1ce2d 1cc46 f92e 1fe3448 1fd1932 1ff47f3 1ffcd37
13da9f3 f6687 1fb11d2 1fad2ed 5d464 7405f 1f0f8b9 7540c1 19ed4f9 7b344 1fd88e9 1fd6976 2ea32 3a030 1f87c5c 3aa060
// Color = 2: DTT rotated, shift_x=-0.234375. shift_y = 0.078125 // Color = 2: DTT rotated, shift_x=-0.234375. shift_y = 0.078125
// DTT rotated range: -792.799879 ... 442.768833 // DTT rotated range: -792.799879 ... 442.768833
60b47d 1f1a02f 87451 1fb267d 2441b 64b28 1f76e45 7be2a 305a3f 1f8d017 43a29 1fd933f 1220d 32594 1fbb723 3df15
23be 648bb 1f309e7 b5691 1fa0cf0 1fd534c 9b38e 1f13d74 11df 3245e 1f984f4 5ab49 1fd0678 1fea9a6 4d9c7 1f89eba
1ff7386 1fd8c6f 2d890 1feb1a1 3858 1fe1367 1ffe334 1fe2542 1ffb9c3 1fec637 16c48 1ff58d1 1c2c 1ff09b4 1fff19a 1ff12a1
39aee 1ee424b 15ba03 1ec690e ba8f9 2404c 1f543f2 1031ed 1cd77 1f72125 add02 1f63487 5d47d 12026 1faa1f9 818f7
1fc515f 162ea 1fae188 23bc5 1e99f 1f9b739 8c7a4 1f7d193 1fe28b0 b175 1fd70c4 11de3 f4d0 1fcdb9d 463d2 1fbe8ca
1fc5f3e 796c7 1f4abb4 7c850 1fdf084 1fadd13 af1af 1f6e34a 1fe2f9f 3cb63 1fa55da 3e428 1fef842 1fd6e89 578d7 1fb71a5
3ca80 1f7f00b c4ad7 1f86bf6 3b710 d5a7 1f919e9 97d72 1e540 1fbf806 6256c 1fc35fb 1db88 6ad4 1fc8cf5 4beb9
e02 362b1 1fb99b4 21abd 1fe78dd 12a30 2c561 1faaa4b 701 1b159 1fdccda 10d5f 1ff3c6e 9518 162b0 1fd5525
1a662ca 789cd 1f72a9a 6a502 1ff2357 1fad948 782d3 1f76c12 1d33165 3c4e6 1fb954d 35281 1ff91ac 1fd6ca4 3c16a 1fbb609
1ff57fe 1fbf241 74e32 1f90771 a761 1fd9417 1ff6def 19e60 1ffabff 1fdf921 3a719 1fc83b9 53b0 1feca0c 1ffb6f7 cf30
718bd 1e89f20 1e8cf9 1e5f674 ec1da 3dfe6 1ee1d03 19a6f4 38c5e 1f44f90 f467c 1f2fb3a 760ed 1eff3 1f70e82 cd37a
1f035 1f95991 7435d 1f8450a 5521f 10b32 1fdba63 6fef2 f81a 1fcacc8 3a1ae 1fc2285 2a90f 8599 1fedd31 37f79
1fe2e62 8dc81 1f60dc2 84634 1fb2d28 1fd5eb2 56505 1fa81d8 1ff1731 46e40 1fb06e1 4231a 1fd9694 1feaf59 2b283 1fd40ec
4dcac 1f86dfc ca37a 1f8447f 406fd 4ddd2 1f80bc1 ba3d4 26e56 1fc36fe 651bd 1fc223f 2037f 26ee9 1fc05e0 5d1ea
208db 7f35 1fffd42 1ff303c 1fe3206 31bd2 1fd3913 1f85838 1046e 3f9b 1fffea1 1ff981e 1ff1903 18de9 1fe9c89 1fc2c1c
1fa1759 11626b 1e7d160 143b1c 1f8c082 1f68db8 1cb687 139ce5b 1fd0bac 8b135 1f3e8b0 a1d8e 1fc6041 1fb46dc e5b43 19ce72e
17d241e 144001 1fbb562 1f830ed 117a4e 1ec0f2b d79ef 1fd76c6 1be920f a2001 1fddab1 1fc1876 8bd27 1f60796 6bcf7 1febb63
c1e9 1faad41 1ffb4a8 4089a 1f8a4b1 7d4f9 1fd3a60 7b42 60f5 1fd56a1 1ffda54 2044d 1fc5258 3ea7d 1fe9d30 3da1
271fb e30e dfc6 15294 1ff895f 1541d 1ff7172 bcd5 138fe 7187 6fe3 a94a 1ffc4b0 aa0e 1ffb8b9 5e6a
1f70b1e 5c14d 1ff1526 1f8bb90 ac983 1f56c2e 50a23 1e41 1fb858f 2e0a6 1ff8a93 1fc5dc8 564c1 1fab617 28512 f21
fa223 1f72e25 112d0 cb22f 1ed0326 1303e6 1f0d65c 1ed59 7d112 1fb9712 8968 65918 1f68193 981f3 1f86b2e f6ad
1166cf 1f42914 1feca24 d5fbd 1eab0f5 180502 1ef2fd0 2c223 8b368 1fa148a 1ff6512 6afde 1f5587b c0281 1f797e8 16111
1f7f7b4 442d1 1ff60b4 1fa7b78 37493 1fcd0ea 1ff86ae 1f8f5 1fbfbda 22168 1ffb05a 1fd3dbc 1ba4a 1fe6875 1ffc357 fc7b
1fed26e a719 1ff5200 17002 155d2 1ff65b6 1fc8031 1fd2983 1ff6937 538c 1ffa900 b801 aae9 1ffb2db 1fe4019 1fe94c2
6eb057 1f0206d 53782 583e2 1f362b6 c172c 1f86e9b 1fbde 37582c 1f81037 29bc1 2c1f1 1f9b15b 60b96 1fc374e fdef
c6266 1fba339 50b5 25749 1faefe1 8ca4f 1f95acf 1e483 63133 1fdd19d 285a 12ba4 1fd77f0 46528 1fcad67 f242
1f2c24a 8029e 5c2a 1f51db1 efe8a 1ef9126 68eb3 49d1 1f96125 4014f 2e15 1fa8ed9 77f45 1f7c893 34759 24e8
1fe09f9 14e51 1fed707 2dd2e 1fd4f7e 33cb8 1fa5aea 32f0 1ff04fd a729 1ff6b83 16e97 1fea7bf 19e5c 1fd2d75 1978
71252 1fb97ce 1fe816b 74ba0 1f52e1b ae899 1f86762 939 38929 1fdcbe7 1ff40b6 3a5d0 1fa970e 5744d 1fc33b1 49d
1ee0ace a669f 1ff037b 1f403c4 120972 1ee3e0f c51f3 1fd955e 1f70567 5334f 1ff81bd 1fa01e2 904b9 1f71f08 628fa 1fecaaf
1f41d61 7ee08 1ffa17a 1faccb3 d08d8 1f1d217 6e92e 1fea4b7 1fa0eb0 3f704 1ffd0bd 1fd665a 6846c 1f8e90b 37497 1ff525b
a5f6b 1f89bec 250f5 7652c 1f5e149 a3508 1f6fe66 56434a 52fb5 1fc4df6 1287b 3b296 1faf0a5 51a84 1fb7f33 2b21a5
mclt_test_04.sav
View file @ 74bffdd3
[*] [*]
[*] GTKWave Analyzer v3.3.78 (w)1999-2016 BSI [*] GTKWave Analyzer v3.3.78 (w)1999-2016 BSI
[*] Tue Dec 26 08:22:23 2017 [*] Wed Dec 27 05:08:10 2017
[*] [*]
[dumpfile] "/home/eyesis/nc393/elphel393/fpga-elphel/x393_branch_dct/simulation/mclt_test_04-20171226012033452.fst" [dumpfile] "/home/eyesis/nc393/elphel393/fpga-elphel/x393_branch_dct/simulation/mclt_test_04-20171226172318550.fst"
[dumpfile_mtime] "Tue Dec 26 08:20:36 2017" [dumpfile_mtime] "Wed Dec 27 00:23:21 2017"
[dumpfile_size] 856099 [dumpfile_size] 842624
[savefile] "/home/eyesis/nc393/elphel393/fpga-elphel/x393_branch_dct/mclt_test_04.sav" [savefile] "/home/eyesis/nc393/elphel393/fpga-elphel/x393_branch_dct/mclt_test_04.sav"
[timestart] 0 [timestart] 4875410
[size] 1824 1171 [size] 1920 1171
[pos] 0 0 [pos] -1920 0
*-21.178318 3655000 3905000 5225000 7935000 9215000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 *-14.216505 4955000 3905000 5225000 7935000 9215000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] mclt_test_04. [treeopen] mclt_test_04.
[treeopen] mclt_test_04.mclt16x16_bayer_i. [treeopen] mclt_test_04.mclt16x16_bayer_i.
[treeopen] mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.
[treeopen] mclt_test_04.mclt16x16_bayer_i.mclt_baeyer_fold_accum_i. [treeopen] mclt_test_04.mclt16x16_bayer_i.mclt_baeyer_fold_accum_i.
[treeopen] mclt_test_04.mclt16x16_bayer_i.mclt_baeyer_fold_accum_i.dsp_fold_cc_i. [treeopen] mclt_test_04.mclt16x16_bayer_i.mclt_baeyer_fold_accum_i.dsp_fold_cc_i.
[treeopen] mclt_test_04.mclt16x16_bayer_i.mclt_baeyer_fold_accum_i.dsp_fold_cc_i.DSP48E1_i. [treeopen] mclt_test_04.mclt16x16_bayer_i.mclt_baeyer_fold_accum_i.dsp_fold_cc_i.DSP48E1_i.
...@@ -19,9 +20,10 @@ ...@@ -19,9 +20,10 @@
[treeopen] mclt_test_04.mclt16x16_bayer_i.mclt_bayer_fold_i. [treeopen] mclt_test_04.mclt16x16_bayer_i.mclt_bayer_fold_i.
[treeopen] mclt_test_04.mclt16x16_bayer_i.mclt_bayer_fold_i.mclt_wnd_i. [treeopen] mclt_test_04.mclt16x16_bayer_i.mclt_bayer_fold_i.mclt_wnd_i.
[treeopen] mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i. [treeopen] mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.
[treeopen] mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.dsp_1_i.
[treeopen] mclt_test_04.mclt16x16_bayer_i.phase_rotator1_i. [treeopen] mclt_test_04.mclt16x16_bayer_i.phase_rotator1_i.
[sst_width] 233 [sst_width] 262
[signals_width] 408 [signals_width] 356
[sst_expanded] 1 [sst_expanded] 1
[sst_vpaned_height] 343 [sst_vpaned_height] 343
@800200 @800200
...@@ -177,10 +179,98 @@ mclt_test_04.diff61 ...@@ -177,10 +179,98 @@ mclt_test_04.diff61
@8420 @8420
mclt_test_04.diff60 mclt_test_04.diff60
mclt_test_04.diff61 mclt_test_04.diff61
@420
mclt_test_04.n7
mclt_test_04.cntr7
@22
mclt_test_04.mclt16x16_bayer_i.dout0[24:0]
mclt_test_04.mclt16x16_bayer_i.dout1[24:0]
mclt_test_04.java_data_dtt_rot0[24:0]
mclt_test_04.java_data_dtt_rot1[24:0]
@8420
mclt_test_04.diff70
mclt_test_04.diff71
@200 @200
- -
@28
mclt_test_04.dv
@22
mclt_test_04.dout0[24:0]
mclt_test_04.dout1[24:0]
mclt_test_04.mclt16x16_bayer_i.dtt_rd_cntr_pre[8:0]
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.out_wd[24:0]
@800200 @800200
-mclt16x16_bayer -mclt16x16_bayer
@c00200
-dtt_iv_8x8_ad
@28
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.start
@22
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.xin[24:0]
@c00022
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.x_wa[5:0]
@28
(0)mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.x_wa[5:0]
(1)mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.x_wa[5:0]
(2)mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.x_wa[5:0]
(3)mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.x_wa[5:0]
(4)mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.x_wa[5:0]
(5)mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.x_wa[5:0]
@1401200
-group_end
@28
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.x_ra0h
@22
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.x_ra0[2:0]
@28
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.x_ra1h
@22
[color] 2
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.x_ra1[2:0]
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.dcth_xin0[24:0]
[color] 2
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.dcth_xin1[24:0]
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.dcth_dout0[24:0]
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.dcth_dout1[24:0]
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.transpose_di[24:0]
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.transpose_wa[7:0]
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.transpose_we[1:0]
@28
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.transpose_out_start
@22
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.transpose_out_run[2:0]
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.transpose_ra[7:0]
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.transpose_out[24:0]
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.dctv_dout0[24:0]
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.dctv_dout1[24:0]
@28
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.start_out
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.out_we
@22
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.out_wa[3:0]
mclt_test_04.mclt16x16_bayer_i.dtt_iv_8x8_ad_i.out_wd[24:0]
@200
-
@1401200
-dtt_iv_8x8_ad
@22
mclt_test_04.mclt16x16_bayer_i.dtt_rd_cntr_pre[8:0]
mclt_test_04.mclt16x16_bayer_i.dtt_rd_ra0[8:0]
mclt_test_04.mclt16x16_bayer_i.dtt_rd_ra1[8:0]
mclt_test_04.mclt16x16_bayer_i.dtt_rd_data0[24:0]
mclt_test_04.mclt16x16_bayer_i.dtt_rd_data1[24:0]
[color] 2
mclt_test_04.mclt16x16_bayer_i.dbg_dtt_rd_data0[24:0]
[color] 2
mclt_test_04.mclt16x16_bayer_i.dbg_dtt_rd_data1[24:0]
@200
-
@22
mclt_test_04.mclt16x16_bayer_i.dtt_out_ram_wa[8:0]
@28
mclt_test_04.mclt16x16_bayer_i.dtt_out_we
@22
mclt_test_04.mclt16x16_bayer_i.dtt_out_wd[24:0]
@28 @28
mclt_test_04.mclt16x16_bayer_i.dtt_start_fill mclt_test_04.mclt16x16_bayer_i.dtt_start_fill
mclt_test_04.mclt16x16_bayer_i.dtt_first_quad_out mclt_test_04.mclt16x16_bayer_i.dtt_first_quad_out
...@@ -198,14 +288,11 @@ mclt_test_04.mclt16x16_bayer_i.dtt_start_out[1:0] ...@@ -198,14 +288,11 @@ mclt_test_04.mclt16x16_bayer_i.dtt_start_out[1:0]
@22 @22
mclt_test_04.mclt16x16_bayer_i.dtt_out_ram_cntr[4:0] mclt_test_04.mclt16x16_bayer_i.dtt_out_ram_cntr[4:0]
mclt_test_04.mclt16x16_bayer_i.dtt_out_ram_wa[8:0] mclt_test_04.mclt16x16_bayer_i.dtt_out_ram_wa[8:0]
mclt_test_04.mclt16x16_bayer_i.dtt_rd_cntr_pre[8:0] @8022
@8023
mclt_test_04.mclt16x16_bayer_i.dtt_rd_cntr_pre[8:0] mclt_test_04.mclt16x16_bayer_i.dtt_rd_cntr_pre[8:0]
@20000 @20000
- -
@22 @22
mclt_test_04.mclt16x16_bayer_i.dtt_rd_ra0[8:0]
mclt_test_04.mclt16x16_bayer_i.dtt_rd_ra1[8:0]
mclt_test_04.mclt16x16_bayer_i.dtt_rd_regen_dv[3:0] mclt_test_04.mclt16x16_bayer_i.dtt_rd_regen_dv[3:0]
@8022 @8022
mclt_test_04.mclt16x16_bayer_i.dtt_out_ram_wa[8:0] mclt_test_04.mclt16x16_bayer_i.dtt_out_ram_wa[8:0]
...@@ -344,19 +431,6 @@ mclt_test_04.mclt16x16_bayer_i.mclt_bayer_fold_i.pix_addr[8:0] ...@@ -344,19 +431,6 @@ mclt_test_04.mclt16x16_bayer_i.mclt_bayer_fold_i.pix_addr[8:0]
- -
@1000200 @1000200
-mclt16x16_bayer -mclt16x16_bayer
@c00200
-mclt_test_04.java_sgn_w
@1401200
-group_end
@c00200
-mclt_test_04.cntr4
@1401200
-group_end
@c00200
-mclt_test_04.mclt16x16_i.dtt_rd_cntr
@1401200
-group_end
@1000200
-top -top
@800200 @800200
-mclt_bayer -mclt_bayer
...@@ -382,12 +456,6 @@ mclt_test_04.mclt16x16_bayer_i.dbg_dout0[24:0] ...@@ -382,12 +456,6 @@ mclt_test_04.mclt16x16_bayer_i.dbg_dout0[24:0]
[color] 7 [color] 7
mclt_test_04.mclt16x16_bayer_i.dbg_dout1[24:0] mclt_test_04.mclt16x16_bayer_i.dbg_dout1[24:0]
@22 @22
mclt_test_04.mclt16x16_bayer_i.dtt_rd_data0[24:0]
mclt_test_04.mclt16x16_bayer_i.dtt_rd_data1[24:0]
[color] 2
mclt_test_04.mclt16x16_bayer_i.dbg_dtt_rd_data0[24:0]
[color] 2
mclt_test_04.mclt16x16_bayer_i.dbg_dtt_rd_data1[24:0]
mclt_test_04.mclt16x16_bayer_i.dtt_rd_ra0[8:0] mclt_test_04.mclt16x16_bayer_i.dtt_rd_ra0[8:0]
mclt_test_04.mclt16x16_bayer_i.dtt_rd_ra1[8:0] mclt_test_04.mclt16x16_bayer_i.dtt_rd_ra1[8:0]
mclt_test_04.mclt16x16_bayer_i.dtt_r_data[24:0] mclt_test_04.mclt16x16_bayer_i.dtt_r_data[24:0]
...@@ -414,6 +482,25 @@ mclt_test_04.mclt16x16_bayer_i.mclt_bayer_fold_i.wnd_a_w[7:0] ...@@ -414,6 +482,25 @@ mclt_test_04.mclt16x16_bayer_i.mclt_bayer_fold_i.wnd_a_w[7:0]
-top -top
@200 @200
- -
@22
mclt_test_04.mclt16x16_bayer_i.x_shft[6:0]
@28
mclt_test_04.mclt16x16_bayer_i.start
@22
mclt_test_04.mclt16x16_bayer_i.x_shft_r[6:0]
@28
(0)mclt_test_04.mclt16x16_bayer_i.start_r[1:0]
@22
mclt_test_04.mclt16x16_bayer_i.x_shft_r2[6:0]
@28
mclt_test_04.mclt16x16_bayer_i.start_dtt
@22
mclt_test_04.mclt16x16_bayer_i.x_shft_r3[6:0]
@28
mclt_test_04.mclt16x16_bayer_i.dtt_start_first_fill
mclt_test_04.mclt16x16_bayer_i.dtt_start_second_fill
@22
mclt_test_04.mclt16x16_bayer_i.x_shft_r4[6:0]
@800200 @800200
-rotator0 -rotator0
@28 @28
...@@ -447,12 +534,54 @@ mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.sign_cs[4:0] ...@@ -447,12 +534,54 @@ mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.sign_cs[4:0]
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.negm_1 mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.negm_1
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.negm_2 mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.negm_2
@22 @22
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.cntr_h_consec[6:0]
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.cntr_h[7:0] mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.cntr_h[7:0]
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.cntr_v[7:0] mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.cntr_v[7:0]
@28 @28
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.pre_dv mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.pre_dv
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.pre_first_out mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.pre_first_out
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.cea1_1
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.cea1_2
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.cea2_1
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.cea2_2
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.sela_1
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.negm_1
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.negm_2
(14)mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.ph[16:0]
(13)mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.ph[16:0]
(12)mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.ph[16:0]
(11)mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.ph[16:0]
(10)mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.ph[16:0]
(9)mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.ph[16:0]
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.inv_checker_r2
(2)mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.sign_cs[4:0]
(1)mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.sign_cs[4:0]
(0)mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.sign_cs[4:0]
@22
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.cos_sin_w[17:0]
@28
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.ceb1_1
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.ceb2_1
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.selb_1
@800200
-dsp1
@28
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.dsp_1_i.DSP48E1_i.CEA1
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.dsp_1_i.DSP48E1_i.CEA2
@22
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.dsp_1_i.DSP48E1_i.qa_o_reg1[29:0]
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.dsp_1_i.DSP48E1_i.qa_o_reg2[29:0]
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.dsp_1_i.DSP48E1_i.qad_o_reg1[24:0]
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.dsp_1_i.DSP48E1_i.qb_o_reg1[17:0]
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.dsp_1_i.DSP48E1_i.qb_o_reg2[17:0]
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.dsp_1_i.DSP48E1_i.b_mult[17:0]
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.dsp_1_i.DSP48E1_i.qmult_o_reg[42:0]
@23
mclt_test_04.mclt16x16_bayer_i.phase_rotator0_i.dsp_1_i.DSP48E1_i.qp_o_reg1[47:0]
@200
-
@1000200 @1000200
-dsp1
-rotator0 -rotator0
@800200 @800200
-rotator1 -rotator1
...@@ -486,6 +615,7 @@ mclt_test_04.mclt16x16_bayer_i.phase_rotator1_i.sign_cs[4:0] ...@@ -486,6 +615,7 @@ mclt_test_04.mclt16x16_bayer_i.phase_rotator1_i.sign_cs[4:0]
mclt_test_04.mclt16x16_bayer_i.phase_rotator1_i.negm_1 mclt_test_04.mclt16x16_bayer_i.phase_rotator1_i.negm_1
mclt_test_04.mclt16x16_bayer_i.phase_rotator1_i.negm_2 mclt_test_04.mclt16x16_bayer_i.phase_rotator1_i.negm_2
@22 @22
mclt_test_04.mclt16x16_bayer_i.phase_rotator1_i.cntr_h_consec[6:0]
mclt_test_04.mclt16x16_bayer_i.phase_rotator1_i.cntr_h[7:0] mclt_test_04.mclt16x16_bayer_i.phase_rotator1_i.cntr_h[7:0]
mclt_test_04.mclt16x16_bayer_i.phase_rotator1_i.cntr_v[7:0] mclt_test_04.mclt16x16_bayer_i.phase_rotator1_i.cntr_v[7:0]
@28 @28
...@@ -808,11 +938,5 @@ mclt_test_04.mclt16x16_bayer_i.dtt_rd_ra0[8:0] ...@@ -808,11 +938,5 @@ mclt_test_04.mclt16x16_bayer_i.dtt_rd_ra0[8:0]
-group_end -group_end
@1000200 @1000200
-mclt_bayer -mclt_bayer
@800200
-mono
@200
-
@1000200
-mono
[pattern_trace] 1 [pattern_trace] 1
[pattern_trace] 0 [pattern_trace] 0
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