Commit 609af175 authored by Andrey Filippov's avatar Andrey Filippov
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merged with lwir

parents 955c964c d6956f19
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/*!
 * <b>Module:</b>bit_stuffer_raw_metadata
 * @file bit_stuffer_raw_metadata.v
 * @date 2015-10-25  
 * @author Andrey Filippov     
 *
 * @brief Bit stuffer combines variable length fragments (up to 16 bits long)
 * from the Huffman encoder to a byte stream, escapes every 0xff byte with 
 * 0x00 and adds file length and timestamp metadata
 * Modified from bit_stuffer_metadata to include raw byte stream as alternative
 *
 * @copyright Copyright (c) 2015 Elphel, Inc .
 *
 * <b>License:</b>
 *
 * bit_stuffer_raw_metadata.v is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 *  bit_stuffer_raw_metadata.v is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/> .
 *
 * Additional permission under GNU GPL version 3 section 7:
 * If you modify this Program, or any covered work, by linking or combining it
 * with independent modules provided by the FPGA vendor only (this permission
 * does not extend to any 3-rd party modules, "soft cores" or macros) under
 * different license terms solely for the purpose of generating binary "bitstream"
 * files and/or simulating the code, the copyright holders of this Program give
 * you the right to distribute the covered work without those independent modules
 * as long as the source code for them is available from the FPGA vendor free of
 * charge, and there is no dependence on any encrypted modules for simulating of
 * the combined code. This permission applies to you if the distributed code
 * contains all the components and scripts required to completely simulate it
 * with at least one of the Free Software programs.
 */
`timescale 1ns/1ps

module  bit_stuffer_raw_metadata(
    input              mclk,
    input              mrst,       // @posedge mclk, sync reset
    input              xclk,
    input              xrst,       // @posedge xclk, sync reset
    input              last_block, //  use it to copy timestamp from fifo // TODO: leading edge is Need for raw also
    
    
// time stamping - will copy time at the end of color_first (later than the first hact after vact in the current frame, but before the next one
// and before the data is needed for output 
    input              ts_pre_stb,  // @mclk - 1 cycle before receiving 8 bytes of timestamp data
    input        [7:0] ts_data,     // timestamp data (s0,s1,s2,s3,us0,us1,us2,us3==0)
    input              color_first, // @fradv_clk only used for timestamp

    input       [31:0] din,         // input data, MSB aligned
    input        [1:0] bytes_in,    // number of bytes, valid @ ds (0 means 4)
    input              in_stb,      // input data/bytes_in strobe
    input              flush,       // end of input data 
    input              abort,       // @ any, extracts 0->1 and flushes (for both modes!)

    // RAW mode ports, all @ xclk
    input              compressed_mode,    // operating in raw mode (uncompressed)
    input              raw_mode,    // operating in raw mode (uncompressed)
    input              raw_be16,    // swap byte pairs to outut 16-bit big endian data
    input        [7:0] raw_bytes,   // raw bypass byte data in little endian order 
    input              raw_start,   // single-cycle set "running"
    input              raw_prefb,   // 1 cycle before sequence of 4 bytes
    input              raw_ts_copy, // single-cycle copy timestamp (some time before flush)
    input              raw_flush,   // flush remaining data, length and timestamp

    // outputs @ negedge clk
    output reg  [31:0] data_out,      // [31:0] output data
    output reg         data_out_valid,// output data valid
    output reg         done,        // reset by !en, goes high after some delay after flushing
    output reg         running      // from registering timestamp until done
`ifdef DEBUG_RING
,   output reg [3:0]  dbg_etrax_dma
   ,output            dbg_ts_rstb
   ,output [7:0]      dbg_ts_dout

`endif        
);
// Processing raw
    reg    [31:0] raw32;
    reg           raw_stb;
    reg     [3:0] raw_bs;
    always @ (posedge xclk) begin
        if (xrst) raw_bs <= 0;
        else raw_bs <= raw_be16?
                       {raw_bs[0], raw_bs[3], raw_prefb, raw_bs[1]}:
                       {raw_bs[2], raw_bs[1], raw_bs[0], raw_prefb};
        if (xrst) raw_stb <= 0;
        else      raw_stb <= raw_be16 ? raw_bs[2] : raw_bs[3];
        if (raw_bs[0]) raw32[31:24] <= raw_bytes;
        if (raw_bs[1]) raw32[23:16] <= raw_bytes;
        if (raw_bs[2]) raw32[15: 8] <= raw_bytes;
        if (raw_bs[3]) raw32[ 7: 0] <= raw_bytes;
    end

    reg     [7:0] time_ram0[0:3]; // 0 - seconds, 1 - microseconds MSB in the output 32-bit word, byt LSB of the sec/usec
    reg     [7:0] time_ram1[0:3];
    reg     [7:0] time_ram2[0:3];
    reg     [7:0] time_ram3[0:3];
    reg     [3:0] ts_in=8;         
    reg           last_block_d; // last_block delayed by one clock
    reg           color_first_r;   
    reg     [2:0] abort_r;
    reg           force_flush;
    
//    reg           color_first_r; // registered with the same clock as color_first to extract leading edge
    
// stb_time[2] - single-cycle pulse after color_first goes low 
//    reg    [19:0] imgsz32; // current image size in multiples of 32-bytes
    reg    [21:0] imgsz4; // current image size in multiples of 4-bytes
    reg           last_stb_4; // last stb_in was 4 bytes
    reg           trailer;
    reg           meta_out; 
    reg     [1:0] meta_word;
    reg           raw_flush_d; // raw_flush delayed by 1 cysle
    reg           zeros_out; // output of 32 bytes (8 words) of zeros 
    wire          trailer_done = (imgsz4[2:0] == 7) && zeros_out;
    wire          meta_last = (imgsz4[2:0] == 7) &&    meta_out;
    // re-clock enable to this clock
    
//    wire          ts_rstb= raw_mode ?  raw_ts_copy: (last_block && !last_block_d);  // enough time to have timestamp data; // one cycle before getting timestamp data from FIFO
    wire          ts_rstb= (raw_mode && raw_ts_copy) || ( compressed_mode && last_block && !last_block_d);  // enough time to have timestamp data; // one cycle before getting timestamp data from FIFO
    wire    [7:0] ts_dout; // timestamp data, byte at a time
    wire          write_size = (in_stb && (bytes_in != 0)) || (flush && last_stb_4) || raw_flush_d; // raw_flush; // TODO: never in raw mode?
//    wire          stb_start = raw_mode?  raw_start: (!color_first && color_first_r) ;
    wire          stb_start = (raw_mode && raw_start) ||  (compressed_mode && !color_first && color_first_r) ;
    wire          stb =  compressed_mode && in_stb && !trailer && !force_flush;
    wire          stb1 = raw_mode && raw_stb && !trailer && !force_flush;
    
    always @ (posedge xclk) begin
        raw_flush_d <= raw_mode && raw_flush;
        
        if (xrst ||trailer_done) imgsz4 <= 0;
        else if (stb || stb1 || trailer) imgsz4 <= imgsz4 + 1; // raw included
    
        if (stb || stb1) last_stb_4 <= !raw_mode && (bytes_in == 0);
        
        last_block_d <=  last_block;
        color_first_r <= color_first;
    
        if      (xrst)       ts_in <= 8;
        else if (ts_rstb)    ts_in <= 0;
        else if (!ts_in[3])  ts_in <= ts_in + 1;
        
        if ((!ts_in[3] && (ts_in[1:0] == 0)) || write_size) time_ram0[ts_in[3:2]] <= ts_in[3]? ({imgsz4[5:0],(flush || raw_mode)?2'b0:bytes_in}):ts_dout; //ts_in[3:2] == 2'b10 when write_size
        if ((!ts_in[3] && (ts_in[1:0] == 1)) || write_size) time_ram1[ts_in[3:2]] <= ts_in[3]? (imgsz4[13:6]):ts_dout;
        if ((!ts_in[3] && (ts_in[1:0] == 2)) || write_size) time_ram2[ts_in[3:2]] <= ts_in[3]? (imgsz4[21:14]):ts_dout;
        if ((!ts_in[3] && (ts_in[1:0] == 3)) || write_size) time_ram3[ts_in[3:2]] <= ts_in[3]? (8'hff):ts_dout;
        
        if      (xrst)                                                                 trailer <= 0;
//        else if (force_flush || (raw_mode ? raw_flush : flush)) trailer <= 1;
        else if (force_flush || (raw_mode && raw_flush) || (compressed_mode && flush)) trailer <= 1;
        else if (trailer_done)                                                         trailer <= 0;

        if      (xrst)                                       meta_out <= 0;
        else if (trailer && (imgsz4[2:0] == 4) &&!zeros_out) meta_out <= 1;
        else if (meta_last)                                  meta_out <= 0;
        
        if (!meta_out) meta_word <= 0;
        else           meta_word <= meta_word + 1;
        
        if      (xrst)         zeros_out <= 0;
        else if (meta_last)    zeros_out <= 1;
        else if (trailer_done) zeros_out <= 0;
        
        data_out <= ({32{stb1}} & raw32) | ({32{stb}} & din) | ({32{meta_out}} & {time_ram0[meta_word],time_ram1[meta_word],time_ram2[meta_word],time_ram3[meta_word]});
        data_out_valid <= stb1 || stb || trailer;
        
        
///        if      (xrst || trailer) running <= 0; // FIXME: Was this for quite a while? Was in intentional?
        if      (xrst || trailer_done) running <= 0;
        
        else if (stb_start)       running <= 1; // for raw need color_first trailing edge
        
        done <= trailer_done;
        // re-clock abort, extract leading edge
        abort_r <= {abort_r[0] & ~abort_r[1], abort_r[0], abort & ~trailer};
        
        if      (xrst || trailer)  force_flush <= 0;
        else if (abort_r)          force_flush <= 1;
        
    end
    
    // just for testing
`ifdef DEBUG_RING
    assign dbg_ts_rstb = ts_rstb;
    assign dbg_ts_dout = ts_dout;

    always @ (posedge xclk) begin
       dbg_etrax_dma <= imgsz4[3:0];
    end   
`endif        
    
//color_first && color_first_r
    timestamp_fifo timestamp_fifo_i (
        .sclk     (mclk),         // input
        .srst     (mrst),         // input
        .pre_stb  (ts_pre_stb),   // input
        .din      (ts_data),      // input[7:0] 
        .aclk     (xclk),         //fradv_clk),   // input
        .arst     (xrst),         //fradv_clk),   // input
        .advance  (stb_start),    // triggers at the 0->1
        .rclk     (xclk),         // input
        .rrst     (xrst),         //fradv_clk),   // input
        .rstb     (ts_rstb),      // input
        .dout     (ts_dout)       // output[7:0] reg 
    );

endmodule
+2 −2
Original line number Diff line number Diff line
@@ -66,7 +66,7 @@ module cmprs_buf_average#(
    input  [ 7:0] caddrw,
    input         cwe,
    input  [ 8:0] signed_c,
    output [ 9:0] do,         // [9:0] data out (4:2:0) (signed, average=0)
    output [ 9:0] dout,         // [9:0] data out (4:2:0) (signed, average=0)
    // When is it valid?
    output [ 8:0] avr,        // [8:0]    DC (average value) - RAM output, no register. For Y components 9'h080..9'h07f, for C - 9'h100..9'h0ff!
    output        dv,         // out data valid (will go high for at least 64 cycles)
@@ -170,7 +170,7 @@ module cmprs_buf_average#(
    
    // assign output signals
    assign avr  = avr_r; // avermem[avr_ra[3:0]];
    assign do =                do_r;
    assign dout =                do_r;
    assign tn[2:0] =           raddr[8:6];
// component_num,component_color,component_first for different converters vs tn (1 bit per tn (0..5)
    assign component_num[2:0]= {component_numsH[0],component_numsM[0],component_numsL[0]};
+62 −29
Original line number Diff line number Diff line
@@ -73,7 +73,11 @@
//         3 - combine in window only
// [20] == 1 - set Bayer shift
// [19:18] Bayer shift
// [17:16] - unused
// WAS: [17:16] - unused

// [17] == 1 - set BE16 mode 
// [16]    0 - BE16 mode (1 - byte stream is little endian 16-bit, file is big endian 16 bits

// [15] == 1 - set single/multi frame mode
// [14]    0 - multiframe (compare frame numbers for 'suspend' output)
//         1 - single frame buffer
@@ -85,7 +89,15 @@
//          4 - mono, 4 blocks (but still not actual monochrome JPEG as the blocks are scanned in 2x2 macroblocks)
//          5 - jp4,  4 blocks, dc-improved
//          6 - jp4,  differential
//          7 - 15 - reserved
//          7 - jp4,  4 blocks, differential
//          8 - jp4,  4 blocks, differential, hdr
//          9 - jp4,  4 blocks, differential, divide by 2
//         10 - jp4,  4 blocks, differential, hdr,divide by 2
//         11 - mono JPEG (not yet implemented)
//         12-13 - RESERVED
//         14 - mono 4 blocks
//         15 - uncompressed

// [8:7] == 0,1 - NOP, 2 -   disable, 3 - enable subtracting of average value (DC component), bypassing DCT
// [6] == 1 - enable quantization bank select, 0 - disregard bits [5:3]
// [5:3] = quantization page number (0..7)
@@ -95,7 +107,7 @@
//         2 - enable compressor, compress single frame from memory (async)
//         3 - enable compressor, enable synchronous compression mode


// TODO WARNING: Switching to/from raw(uncompressed) mode requires stopping/restarting compressor!

module  cmprs_cmd_decode#(
        // Bit-fields in compressor control word
@@ -109,6 +121,10 @@ module cmprs_cmd_decode#(
        parameter CMPRS_CBIT_CMODE_BITS =     4, // number of bits to control compressor color modes
        parameter CMPRS_CBIT_FRAMES =        15, // bit # to control compressor multi/single frame buffer modes
        parameter CMPRS_CBIT_FRAMES_BITS =    1, // number of bits to control compressor multi/single frame buffer modes
        
        parameter CMPRS_CBIT_BE16 =          17, // bit # to control compressor multi/single frame buffer modes
        parameter CMPRS_CBIT_BE16_BITS =      1, // number of bits to control compressor multi/single frame buffer modes
        
        parameter CMPRS_CBIT_BAYER =         20, // bit # to control compressor Bayer shift mode
        parameter CMPRS_CBIT_BAYER_BITS =     2, // number of bits to control compressor Bayer shift mode
        parameter CMPRS_CBIT_FOCUS =         23, // bit # to control compressor focus display mode
@@ -118,6 +134,7 @@ module cmprs_cmd_decode#(
//      parameter CMPRS_CBIT_RUN_DISABLE =    2'h1, // disable compression of the new frames, finish any already started
        parameter CMPRS_CBIT_RUN_STANDALONE = 2'h2, // enable compressor, compress single frame from memory (async)
        parameter CMPRS_CBIT_RUN_ENABLE =     2'h3, // enable compressor, enable synchronous compression mode
        
        parameter CMPRS_CBIT_CMODE_JPEG18 =   4'h0, // color 4:2:0
        parameter CMPRS_CBIT_CMODE_MONO6 =    4'h1, // mono 4:2:0 (6 blocks)
        parameter CMPRS_CBIT_CMODE_JP46 =     4'h2, // jp4, 6 blocks, original
@@ -131,6 +148,8 @@ module cmprs_cmd_decode#(
        parameter CMPRS_CBIT_CMODE_JP4DIFFHDRDIV2 = 4'ha, // jp4,  4 blocks, differential, hdr,divide by 2
        parameter CMPRS_CBIT_CMODE_MONO1 =    4'hb, // mono JPEG (not yet implemented)
        parameter CMPRS_CBIT_CMODE_MONO4 =    4'he, // mono 4 blocks
        parameter CMPRS_CBIT_CMODE_RAW =      4'hf, // uncompressed
        
        parameter CMPRS_CBIT_FRAMES_SINGLE =  0, //1, // use a single-frame buffer for images

        parameter CMPRS_COLOR18 =             0, // JPEG 4:2:0 with 18x18 overlapping tiles for de-bayer
@@ -138,6 +157,7 @@ module cmprs_cmd_decode#(
        parameter CMPRS_MONO16 =              2, // JPEG 4:2:0 with 16x16 non-overlapping tiles, color components zeroed
        parameter CMPRS_JP4 =                 3, // JP4 mode with 16x16 macroblocks
        parameter CMPRS_JP4DIFF =             4, // JP4DIFF mode TODO: see if correct
        parameter CMPRS_RAW =                 6, // Not comressed, raw data
        parameter CMPRS_MONO8 =               7, // Regular JPEG monochrome with 8x8 macroblocks (not yet implemented)
        
        parameter CMPRS_FRMT_MBCM1 =           0, // bit # of number of macroblock columns minus 1 field in format word
@@ -152,11 +172,8 @@ module cmprs_cmd_decode#(
        parameter CMPRS_CSAT_CR_BITS =        10, // number of bits in red scale field in color saturation word
        parameter CMPRS_CORING_BITS =          3 // number of bits in coring mode
        
        //parameter CMPRS_STUFFER_NEG =          1  // stuffer runs @ negedge xclk2x

    
)(
//    input                         rst,
    input                         xclk,               // global clock input, compressor single clock rate
    input                         mclk,               // global system/memory clock
    input                         mrst,      // @posedge mclk, sync reset
@@ -165,17 +182,14 @@ module cmprs_cmd_decode#(
    input                         color_sat_we,       // input - @mclk write color saturation values
    input                         coring_we,          // input - @mclk write coring values
    
//                    rs,      // 0 - bit modes,
//                           // 1 - write ntiles;
    input                  [31:0] di,     // [15:0] data from CPU (sync to negedge sclk)
//                    cr_w,   // data written to cr (1 cycle long) - just to reset legacy IRQ
//                    ntiles,//[17:0] - number of tiles in a frame to process
    input                         frame_start,        // @mclk
    output                        frame_start_xclk,   // frame start, parameters are copied at this pulse
    
                                  //  outputs sync @ posedge mclk:
    output                        cmprs_en_mclk,      // @mclk 0 resets immediately
    input                         cmprs_en_extend,    // @mclk keep compressor enabled for graceful shutdown
    input                         compressor_running,  // @xclk - reading frame or running stuffer/trailer
    
    output reg                    cmprs_run_mclk,     // @mclk enable propagation of vsync_late to frame_start_dst in bonded(sync to src) mode
    output reg                    cmprs_standalone,   // @mclk single-cycle: generate a single frame_start_dst in unbonded (not synchronized) mode.
@@ -183,14 +197,13 @@ module cmprs_cmd_decode#(
    output reg                    sigle_frame_buf,    // memory controller uses a single frame buffer (frame_number_* == 0), use other sync
                                  //  outputs sync @ posedge xclk:
    output reg                    cmprs_en_xclk,      // enable compressor, turn off immedaitely
    output reg                    cmprs_en_late_xclk, // enable stuffer, extends control fields for graceful shutdown
//                    cmprs_start, // single cycle when single or constant compression is turned on
//                    cmprs_repeat,// high in repetitive mode
    output reg                    cmprs_en_xclk_jp,      // enable compressor, turn off immedaitely
    output reg                    cmprs_en_xclk_raw,      // enable compressor, turn off immedaitely

    output reg                    cmprs_en_late_xclk, // enable stuffer, extends control fields for graceful shutdown (should be for raw also?)
                                  // outputs @posedge xclk, frozen when the new frame is requested
    output reg             [ 2:0] cmprs_qpage, // [2:0] - quantizator page number (0..7)
    output reg                    cmprs_dcsub, // subtract dc level before DCT, restore later
//    output reg             [ 3:0] cmprs_mode,  // [3:0] - compressor mode
//                    cmprs_shift, // tile shift from top left corner
    output reg             [ 1:0] cmprs_fmode, //[1:0] - focus mode
    output reg             [ 1:0] bayer_shift, // additional shift to bayer mosaic
                                  
@@ -208,16 +221,12 @@ module cmprs_cmd_decode#(
    output reg [CMPRS_CSAT_CB_BITS-1:0] color_sat_cb,    // scale for Cb color component (color saturation)
    output reg [CMPRS_CSAT_CR_BITS-1:0] color_sat_cr,    // scale for Cr color component (color saturation)
    
    output reg [CMPRS_CORING_BITS-1:0]  coring           // scale for Cb color component (color saturation)
    
    output reg [CMPRS_CORING_BITS-1:0]  coring,           // scale for Cb color component (color saturation)
    output reg                    compressed,      // late on, early off running compressor chain
    output reg                    uncompressed,    // late on, early off running raw chain
    output reg                    be16
    );

//    input                         is_compressing, // high from start of compressing till EOT (sync to posedge clk)
//                    abort_compress,
 //   input                         stuffer_done_mclk,

//    output reg                    force_flush); // abort compress - generate flush pulse, force end of image over DMA, update counter

    reg   [30:0]  di_r;
    reg           ctrl_we_r;
    
@@ -253,8 +262,12 @@ module cmprs_cmd_decode#(
    reg   [23:0] color_sat_xclk; // color saturation values (only 10 LSB in each 12 are used
    reg   [ 2:0] coring_xclk; // color saturation values (only 10 LSB in each 12 are used
    
//    wire         frame_start_xclk;
    wire         uncompressed_mclk;
    wire         uncompressed_xclk;
    
    assign cmprs_en_mclk = cmprs_en_mclk_r;
    assign uncompressed_mclk = cmprs_mode_mclk[3:0] == CMPRS_CBIT_CMODE_RAW;
    assign uncompressed_xclk = cmprs_mode_xclk[3:0] == CMPRS_CBIT_CMODE_RAW;
    
    always @ (posedge mclk) begin
        if (mrst) ctrl_we_r <= 0;
@@ -279,12 +292,14 @@ module cmprs_cmd_decode#(
        else if (ctrl_we_r && di_r[CMPRS_CBIT_RUN]) cmprs_run_mclk <= (di_r[CMPRS_CBIT_RUN-1 -:CMPRS_CBIT_RUN_BITS] == CMPRS_CBIT_RUN_ENABLE);
        
        if      (mrst)      cmprs_standalone <= 0;
//        else if (ctrl_we_r) cmprs_standalone <=  ctrl_we_r && di_r[CMPRS_CBIT_RUN] && (di_r[CMPRS_CBIT_RUN-1 -:CMPRS_CBIT_RUN_BITS] == CMPRS_CBIT_RUN_STANDALONE);
        else cmprs_standalone <=  ctrl_we_r && di_r[CMPRS_CBIT_RUN] && (di_r[CMPRS_CBIT_RUN-1 -:CMPRS_CBIT_RUN_BITS] == CMPRS_CBIT_RUN_STANDALONE);

        if      (mrst)                                 sigle_frame_buf <= 0;
        else if (ctrl_we_r && di_r[CMPRS_CBIT_FRAMES]) sigle_frame_buf <= (di_r[CMPRS_CBIT_FRAMES-1 -:CMPRS_CBIT_FRAMES_BITS] == CMPRS_CBIT_FRAMES_SINGLE);

        if      (mrst)                                 be16 <= 0;
        else if (ctrl_we_r && di_r[CMPRS_CBIT_BE16])   be16 <= (di_r[CMPRS_CBIT_BE16-1 -:CMPRS_CBIT_BE16_BITS] == 1);

        if      (mrst)                                 cmprs_qpage_mclk <= 0;
        else if (ctrl_we_r && di_r[CMPRS_CBIT_QBANK])  cmprs_qpage_mclk <= di_r[CMPRS_CBIT_QBANK-1 -:CMPRS_CBIT_QBANK_BITS];

@@ -316,9 +331,14 @@ module cmprs_cmd_decode#(
    always @ (posedge xclk)  begin
        cmprs_en_xclk   <=      cmprs_en_mclk_r;
        cmprs_en_late_xclk  <=  cmprs_en_mclk_r || cmprs_en_extend;
        if      (!cmprs_en_mclk_r) cmprs_en_xclk_jp <= 0;
        else if (ctrl_we_xclk)     cmprs_en_xclk_jp <= cmprs_en_mclk_r && !uncompressed_mclk;

        if      (!cmprs_en_mclk_r) cmprs_en_xclk_raw <= 0;
        else if (ctrl_we_xclk)     cmprs_en_xclk_raw <= cmprs_en_mclk_r && uncompressed_mclk;
        
    end    
    always @ (posedge xclk) if (ctrl_we_xclk) begin
//        cmprs_en_late_xclk  <=  cmprs_en_mclk_r || cmprs_en_extend;
        cmprs_qpage_xclk <=     cmprs_qpage_mclk;
        cmprs_dcsub_xclk <=     cmprs_dcsub_mclk;
        cmprs_mode_xclk <=      cmprs_mode_mclk;
@@ -450,6 +470,11 @@ module cmprs_cmd_decode#(
                jp4_dc_improved  <= 0;
                converter_type[2:0] <= CMPRS_MONO8; // 0 - color18, 1 - color20, 2 - mono, 3 - jp4, 4 - jp4-diff
              end

            CMPRS_CBIT_CMODE_RAW:   begin // uncompressed
                converter_type[2:0] <= CMPRS_RAW;   // 0 - color18, 1 - color20, 2 - mono, 3 - jp4, 4 - jp4-diff
              end

            default: begin // 
                ignore_color     <=    'bx;
                four_blocks      <=    'bx;
@@ -457,9 +482,17 @@ module cmprs_cmd_decode#(
                converter_type[2:0] <= 'bx;
              end
       endcase
//       uncompressed <= cmprs_mode_xclk[3:0] == CMPRS_CBIT_CMODE_RAW;
    end
    always @ (posedge xclk) begin
        if (!cmprs_en_mclk_r || (!uncompressed_xclk && !compressor_running)) uncompressed <= 0;
        else if (frame_start_xclk)                                           uncompressed <= uncompressed_xclk;

    
        if (!cmprs_en_mclk_r || ( uncompressed_xclk && !compressor_running)) compressed <= 0;
        else if (frame_start_xclk)                                           compressed <= !uncompressed_xclk;
    end
    
    
//frame_start_xclk
    pulse_cross_clock ctrl_we_xclk_i       (.rst(mrst), .src_clk(mclk), .dst_clk(xclk), .in_pulse(ctrl_we_r),      .out_pulse(ctrl_we_xclk),.busy());
    pulse_cross_clock format_we_xclk_i     (.rst(mrst), .src_clk(mclk), .dst_clk(xclk), .in_pulse(format_we_r),    .out_pulse(format_we_xclk),.busy());
+2 −23

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